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Linux kernel mirror (for testing)
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1/*
2 * Header for MultiMediaCard (MMC)
3 *
4 * Copyright 2002 Hewlett-Packard Company
5 *
6 * Use consistent with the GNU GPL is permitted,
7 * provided that this copyright notice is
8 * preserved in its entirety in all copies and derived works.
9 *
10 * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
11 * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
12 * FITNESS FOR ANY PARTICULAR PURPOSE.
13 *
14 * Many thanks to Alessandro Rubini and Jonathan Corbet!
15 *
16 * Based strongly on code by:
17 *
18 * Author: Yong-iL Joh <tolkien@mizi.com>
19 * Date : $Date: 2002/06/18 12:37:30 $
20 *
21 * Author: Andrew Christian
22 * 15 May 2002
23 */
24
25#ifndef MMC_MMC_H
26#define MMC_MMC_H
27
28/* Standard MMC commands (4.1) type argument response */
29 /* class 1 */
30#define MMC_GO_IDLE_STATE 0 /* bc */
31#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
32#define MMC_ALL_SEND_CID 2 /* bcr R2 */
33#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
34#define MMC_SET_DSR 4 /* bc [31:16] RCA */
35#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
36#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
37#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
38#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
39#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
40#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
41#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
42#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
43#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
44
45 /* class 2 */
46#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
47#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
48#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
49
50 /* class 3 */
51#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
52
53 /* class 4 */
54#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
55#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
56#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
57#define MMC_PROGRAM_CID 26 /* adtc R1 */
58#define MMC_PROGRAM_CSD 27 /* adtc R1 */
59
60 /* class 6 */
61#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
62#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
63#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
64
65 /* class 5 */
66#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
67#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
68#define MMC_ERASE 38 /* ac R1b */
69
70 /* class 9 */
71#define MMC_FAST_IO 39 /* ac <Complex> R4 */
72#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
73
74 /* class 7 */
75#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
76
77 /* class 8 */
78#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
79#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
80
81/*
82 * MMC_SWITCH argument format:
83 *
84 * [31:26] Always 0
85 * [25:24] Access Mode
86 * [23:16] Location of target Byte in EXT_CSD
87 * [15:08] Value Byte
88 * [07:03] Always 0
89 * [02:00] Command Set
90 */
91
92/*
93 MMC status in R1
94 Type
95 e : error bit
96 s : status bit
97 r : detected and set for the actual command response
98 x : detected and set during command execution. the host must poll
99 the card by sending status command in order to read these bits.
100 Clear condition
101 a : according to the card state
102 b : always related to the previous command. Reception of
103 a valid command will clear it (with a delay of one command)
104 c : clear by read
105 */
106
107#define R1_OUT_OF_RANGE (1 << 31) /* er, c */
108#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
109#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
110#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
111#define R1_ERASE_PARAM (1 << 27) /* ex, c */
112#define R1_WP_VIOLATION (1 << 26) /* erx, c */
113#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
114#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
115#define R1_COM_CRC_ERROR (1 << 23) /* er, b */
116#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
117#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
118#define R1_CC_ERROR (1 << 20) /* erx, c */
119#define R1_ERROR (1 << 19) /* erx, c */
120#define R1_UNDERRUN (1 << 18) /* ex, c */
121#define R1_OVERRUN (1 << 17) /* ex, c */
122#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
123#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
124#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
125#define R1_ERASE_RESET (1 << 13) /* sr, c */
126#define R1_STATUS(x) (x & 0xFFFFE000)
127#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
128#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
129#define R1_APP_CMD (1 << 5) /* sr, c */
130
131/* These are unpacked versions of the actual responses */
132
133struct _mmc_csd {
134 u8 csd_structure;
135 u8 spec_vers;
136 u8 taac;
137 u8 nsac;
138 u8 tran_speed;
139 u16 ccc;
140 u8 read_bl_len;
141 u8 read_bl_partial;
142 u8 write_blk_misalign;
143 u8 read_blk_misalign;
144 u8 dsr_imp;
145 u16 c_size;
146 u8 vdd_r_curr_min;
147 u8 vdd_r_curr_max;
148 u8 vdd_w_curr_min;
149 u8 vdd_w_curr_max;
150 u8 c_size_mult;
151 union {
152 struct { /* MMC system specification version 3.1 */
153 u8 erase_grp_size;
154 u8 erase_grp_mult;
155 } v31;
156 struct { /* MMC system specification version 2.2 */
157 u8 sector_size;
158 u8 erase_grp_size;
159 } v22;
160 } erase;
161 u8 wp_grp_size;
162 u8 wp_grp_enable;
163 u8 default_ecc;
164 u8 r2w_factor;
165 u8 write_bl_len;
166 u8 write_bl_partial;
167 u8 file_format_grp;
168 u8 copy;
169 u8 perm_write_protect;
170 u8 tmp_write_protect;
171 u8 file_format;
172 u8 ecc;
173};
174
175/*
176 * OCR bits are mostly in host.h
177 */
178#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */
179
180/*
181 * Card Command Classes (CCC)
182 */
183#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
184 /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
185#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
186 /* (CMD11) */
187#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */
188 /* (CMD16,17,18) */
189#define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */
190 /* (CMD20) */
191#define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */
192 /* (CMD16,24,25,26,27) */
193#define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */
194 /* (CMD32,33,34,35,36,37,38,39) */
195#define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */
196 /* (CMD28,29,30) */
197#define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */
198 /* (CMD16,CMD42) */
199#define CCC_APP_SPEC (1<<8) /* (8) Application specific */
200 /* (CMD55,56,57,ACMD*) */
201#define CCC_IO_MODE (1<<9) /* (9) I/O mode */
202 /* (CMD5,39,40,52,53) */
203#define CCC_SWITCH (1<<10) /* (10) High speed switch */
204 /* (CMD6,34,35,36,37,50) */
205 /* (11) Reserved */
206 /* (CMD?) */
207
208/*
209 * CSD field definitions
210 */
211
212#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */
213#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */
214#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
215#define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */
216
217#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */
218#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */
219#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */
220#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */
221#define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */
222
223/*
224 * EXT_CSD fields
225 */
226
227#define EXT_CSD_BUS_WIDTH 183 /* R/W */
228#define EXT_CSD_HS_TIMING 185 /* R/W */
229#define EXT_CSD_CARD_TYPE 196 /* RO */
230#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
231
232/*
233 * EXT_CSD field definitions
234 */
235
236#define EXT_CSD_CMD_SET_NORMAL (1<<0)
237#define EXT_CSD_CMD_SET_SECURE (1<<1)
238#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
239
240#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
241#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
242
243#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
244#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
245#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
246
247/*
248 * MMC_SWITCH access modes
249 */
250
251#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
252#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
253#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
254#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
255
256#endif /* MMC_MMC_PROTOCOL_H */
257