tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * MPC8540 ADS Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12
13/ {
14 model = "MPC8540ADS";
15 compatible = "MPC8540ADS", "MPC85xxADS";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 cpus {
20 #address-cells = <1>;
21 #size-cells = <0>;
22
23 PowerPC,8540@0 {
24 device_type = "cpu";
25 reg = <0>;
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <8000>; // L1, 32K
29 i-cache-size = <8000>; // L1, 32K
30 timebase-frequency = <0>; // 33 MHz, from uboot
31 bus-frequency = <0>; // 166 MHz
32 clock-frequency = <0>; // 825 MHz, from uboot
33 32-bit;
34 };
35 };
36
37 memory {
38 device_type = "memory";
39 reg = <00000000 08000000>; // 128M at 0x0
40 };
41
42 soc8540@e0000000 {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 #interrupt-cells = <2>;
46 device_type = "soc";
47 ranges = <0 e0000000 00100000>;
48 reg = <e0000000 00100000>; // CCSRBAR 1M
49 bus-frequency = <0>;
50
51 memory-controller@2000 {
52 compatible = "fsl,8540-memory-controller";
53 reg = <2000 1000>;
54 interrupt-parent = <&mpic>;
55 interrupts = <12 2>;
56 };
57
58 l2-cache-controller@20000 {
59 compatible = "fsl,8540-l2-cache-controller";
60 reg = <20000 1000>;
61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>;
64 interrupts = <10 2>;
65 };
66
67 i2c@3000 {
68 device_type = "i2c";
69 compatible = "fsl-i2c";
70 reg = <3000 100>;
71 interrupts = <2b 2>;
72 interrupt-parent = <&mpic>;
73 dfsrr;
74 };
75
76 mdio@24520 {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 device_type = "mdio";
80 compatible = "gianfar";
81 reg = <24520 20>;
82 phy0: ethernet-phy@0 {
83 interrupt-parent = <&mpic>;
84 interrupts = <5 1>;
85 reg = <0>;
86 device_type = "ethernet-phy";
87 };
88 phy1: ethernet-phy@1 {
89 interrupt-parent = <&mpic>;
90 interrupts = <5 1>;
91 reg = <1>;
92 device_type = "ethernet-phy";
93 };
94 phy3: ethernet-phy@3 {
95 interrupt-parent = <&mpic>;
96 interrupts = <7 1>;
97 reg = <3>;
98 device_type = "ethernet-phy";
99 };
100 };
101
102 ethernet@24000 {
103 #address-cells = <1>;
104 #size-cells = <0>;
105 device_type = "network";
106 model = "TSEC";
107 compatible = "gianfar";
108 reg = <24000 1000>;
109 /*
110 * address is deprecated and will be removed
111 * in 2.6.25. Only recent versions of
112 * U-Boot support local-mac-address, however.
113 */
114 address = [ 00 00 00 00 00 00 ];
115 local-mac-address = [ 00 00 00 00 00 00 ];
116 interrupts = <1d 2 1e 2 22 2>;
117 interrupt-parent = <&mpic>;
118 phy-handle = <&phy0>;
119 };
120
121 ethernet@25000 {
122 #address-cells = <1>;
123 #size-cells = <0>;
124 device_type = "network";
125 model = "TSEC";
126 compatible = "gianfar";
127 reg = <25000 1000>;
128 /*
129 * address is deprecated and will be removed
130 * in 2.6.25. Only recent versions of
131 * U-Boot support local-mac-address, however.
132 */
133 address = [ 00 00 00 00 00 00 ];
134 local-mac-address = [ 00 00 00 00 00 00 ];
135 interrupts = <23 2 24 2 28 2>;
136 interrupt-parent = <&mpic>;
137 phy-handle = <&phy1>;
138 };
139
140 ethernet@26000 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 device_type = "network";
144 model = "FEC";
145 compatible = "gianfar";
146 reg = <26000 1000>;
147 /*
148 * address is deprecated and will be removed
149 * in 2.6.25. Only recent versions of
150 * U-Boot support local-mac-address, however.
151 */
152 address = [ 00 00 00 00 00 00 ];
153 local-mac-address = [ 00 00 00 00 00 00 ];
154 interrupts = <29 2>;
155 interrupt-parent = <&mpic>;
156 phy-handle = <&phy3>;
157 };
158
159 serial@4500 {
160 device_type = "serial";
161 compatible = "ns16550";
162 reg = <4500 100>; // reg base, size
163 clock-frequency = <0>; // should we fill in in uboot?
164 interrupts = <2a 2>;
165 interrupt-parent = <&mpic>;
166 };
167
168 serial@4600 {
169 device_type = "serial";
170 compatible = "ns16550";
171 reg = <4600 100>; // reg base, size
172 clock-frequency = <0>; // should we fill in in uboot?
173 interrupts = <2a 2>;
174 interrupt-parent = <&mpic>;
175 };
176 pci@8000 {
177 interrupt-map-mask = <f800 0 0 7>;
178 interrupt-map = <
179
180 /* IDSEL 0x02 */
181 1000 0 0 1 &mpic 1 1
182 1000 0 0 2 &mpic 2 1
183 1000 0 0 3 &mpic 3 1
184 1000 0 0 4 &mpic 4 1
185
186 /* IDSEL 0x03 */
187 1800 0 0 1 &mpic 4 1
188 1800 0 0 2 &mpic 1 1
189 1800 0 0 3 &mpic 2 1
190 1800 0 0 4 &mpic 3 1
191
192 /* IDSEL 0x04 */
193 2000 0 0 1 &mpic 3 1
194 2000 0 0 2 &mpic 4 1
195 2000 0 0 3 &mpic 1 1
196 2000 0 0 4 &mpic 2 1
197
198 /* IDSEL 0x05 */
199 2800 0 0 1 &mpic 2 1
200 2800 0 0 2 &mpic 3 1
201 2800 0 0 3 &mpic 4 1
202 2800 0 0 4 &mpic 1 1
203
204 /* IDSEL 0x0c */
205 6000 0 0 1 &mpic 1 1
206 6000 0 0 2 &mpic 2 1
207 6000 0 0 3 &mpic 3 1
208 6000 0 0 4 &mpic 4 1
209
210 /* IDSEL 0x0d */
211 6800 0 0 1 &mpic 4 1
212 6800 0 0 2 &mpic 1 1
213 6800 0 0 3 &mpic 2 1
214 6800 0 0 4 &mpic 3 1
215
216 /* IDSEL 0x0e */
217 7000 0 0 1 &mpic 3 1
218 7000 0 0 2 &mpic 4 1
219 7000 0 0 3 &mpic 1 1
220 7000 0 0 4 &mpic 2 1
221
222 /* IDSEL 0x0f */
223 7800 0 0 1 &mpic 2 1
224 7800 0 0 2 &mpic 3 1
225 7800 0 0 3 &mpic 4 1
226 7800 0 0 4 &mpic 1 1
227
228 /* IDSEL 0x12 */
229 9000 0 0 1 &mpic 1 1
230 9000 0 0 2 &mpic 2 1
231 9000 0 0 3 &mpic 3 1
232 9000 0 0 4 &mpic 4 1
233
234 /* IDSEL 0x13 */
235 9800 0 0 1 &mpic 4 1
236 9800 0 0 2 &mpic 1 1
237 9800 0 0 3 &mpic 2 1
238 9800 0 0 4 &mpic 3 1
239
240 /* IDSEL 0x14 */
241 a000 0 0 1 &mpic 3 1
242 a000 0 0 2 &mpic 4 1
243 a000 0 0 3 &mpic 1 1
244 a000 0 0 4 &mpic 2 1
245
246 /* IDSEL 0x15 */
247 a800 0 0 1 &mpic 2 1
248 a800 0 0 2 &mpic 3 1
249 a800 0 0 3 &mpic 4 1
250 a800 0 0 4 &mpic 1 1>;
251 interrupt-parent = <&mpic>;
252 interrupts = <18 2>;
253 bus-range = <0 0>;
254 ranges = <02000000 0 80000000 80000000 0 20000000
255 01000000 0 00000000 e2000000 0 00100000>;
256 clock-frequency = <3f940aa>;
257 #interrupt-cells = <1>;
258 #size-cells = <2>;
259 #address-cells = <3>;
260 reg = <8000 1000>;
261 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
262 device_type = "pci";
263 };
264
265 mpic: pic@40000 {
266 clock-frequency = <0>;
267 interrupt-controller;
268 #address-cells = <0>;
269 #interrupt-cells = <2>;
270 reg = <40000 40000>;
271 built-in;
272 compatible = "chrp,open-pic";
273 device_type = "open-pic";
274 big-endian;
275 };
276 };
277};