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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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1/*
2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
20 */
21#ifndef IOATDMA_H
22#define IOATDMA_H
23
24#include <linux/dmaengine.h>
25#include "ioatdma_hw.h"
26#include <linux/init.h>
27#include <linux/dmapool.h>
28#include <linux/cache.h>
29#include <linux/pci_ids.h>
30
31#define IOAT_LOW_COMPLETION_MASK 0xffffffc0
32
33/**
34 * struct ioat_device - internal representation of a IOAT device
35 * @pdev: PCI-Express device
36 * @reg_base: MMIO register space base address
37 * @dma_pool: for allocating DMA descriptors
38 * @common: embedded struct dma_device
39 * @msi: Message Signaled Interrupt number
40 */
41
42struct ioat_device {
43 struct pci_dev *pdev;
44 void __iomem *reg_base;
45 struct pci_pool *dma_pool;
46 struct pci_pool *completion_pool;
47
48 struct dma_device common;
49 u8 msi;
50};
51
52/**
53 * struct ioat_dma_chan - internal representation of a DMA channel
54 * @device:
55 * @reg_base:
56 * @sw_in_use:
57 * @completion:
58 * @completion_low:
59 * @completion_high:
60 * @completed_cookie: last cookie seen completed on cleanup
61 * @cookie: value of last cookie given to client
62 * @last_completion:
63 * @xfercap:
64 * @desc_lock:
65 * @free_desc:
66 * @used_desc:
67 * @resource:
68 * @device_node:
69 */
70
71struct ioat_dma_chan {
72
73 void __iomem *reg_base;
74
75 dma_cookie_t completed_cookie;
76 unsigned long last_completion;
77
78 u32 xfercap; /* XFERCAP register value expanded out */
79
80 spinlock_t cleanup_lock;
81 spinlock_t desc_lock;
82 struct list_head free_desc;
83 struct list_head used_desc;
84
85 int pending;
86
87 struct ioat_device *device;
88 struct dma_chan common;
89
90 dma_addr_t completion_addr;
91 union {
92 u64 full; /* HW completion writeback */
93 struct {
94 u32 low;
95 u32 high;
96 };
97 } *completion_virt;
98};
99
100/* wrapper around hardware descriptor format + additional software fields */
101
102/**
103 * struct ioat_desc_sw - wrapper around hardware descriptor
104 * @hw: hardware DMA descriptor
105 * @node: this descriptor will either be on the free list,
106 * or attached to a transaction list (async_tx.tx_list)
107 * @tx_cnt: number of descriptors required to complete the transaction
108 * @async_tx: the generic software descriptor for all engines
109 */
110struct ioat_desc_sw {
111 struct ioat_dma_descriptor *hw;
112 struct list_head node;
113 int tx_cnt;
114 DECLARE_PCI_UNMAP_ADDR(src)
115 DECLARE_PCI_UNMAP_LEN(src_len)
116 DECLARE_PCI_UNMAP_ADDR(dst)
117 DECLARE_PCI_UNMAP_LEN(dst_len)
118 struct dma_async_tx_descriptor async_tx;
119};
120
121#endif /* IOATDMA_H */