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1/*
2 * include/asm-xtensa/io.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_IO_H
12#define _XTENSA_IO_H
13
14#ifdef __KERNEL__
15#include <asm/byteorder.h>
16#include <asm/page.h>
17
18#include <linux/types.h>
19
20#define XCHAL_KIO_CACHED_VADDR 0xf0000000
21#define XCHAL_KIO_BYPASS_VADDR 0xf8000000
22#define XCHAL_KIO_PADDR 0xf0000000
23#define XCHAL_KIO_SIZE 0x08000000
24
25/*
26 * swap functions to change byte order from little-endian to big-endian and
27 * vice versa.
28 */
29
30static inline unsigned short _swapw (unsigned short v)
31{
32 return (v << 8) | (v >> 8);
33}
34
35static inline unsigned int _swapl (unsigned int v)
36{
37 return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24);
38}
39
40/*
41 * Change virtual addresses to physical addresses and vv.
42 * These are trivial on the 1:1 Linux/Xtensa mapping
43 */
44
45static inline unsigned long virt_to_phys(volatile void * address)
46{
47 return __pa(address);
48}
49
50static inline void * phys_to_virt(unsigned long address)
51{
52 return __va(address);
53}
54
55/*
56 * virt_to_bus and bus_to_virt are deprecated.
57 */
58
59#define virt_to_bus(x) virt_to_phys(x)
60#define bus_to_virt(x) phys_to_virt(x)
61
62/*
63 * Return the virtual (cached) address for the specified bus memory.
64 * Note that we currently don't support any address outside the KIO segment.
65 */
66
67static inline void *ioremap(unsigned long offset, unsigned long size)
68{
69 if (offset >= XCHAL_KIO_PADDR
70 && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE)
71 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR);
72
73 else
74 BUG();
75}
76
77static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
78{
79 if (offset >= XCHAL_KIO_PADDR
80 && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE)
81 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR);
82 else
83 BUG();
84}
85
86static inline void iounmap(void *addr)
87{
88}
89
90/*
91 * Generic I/O
92 */
93
94#define readb(addr) \
95 ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; })
96#define readw(addr) \
97 ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; })
98#define readl(addr) \
99 ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; })
100#define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b))
101#define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b))
102#define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b))
103
104static inline __u8 __raw_readb(const volatile void __iomem *addr)
105{
106 return *(__force volatile __u8 *)(addr);
107}
108static inline __u16 __raw_readw(const volatile void __iomem *addr)
109{
110 return *(__force volatile __u16 *)(addr);
111}
112static inline __u32 __raw_readl(const volatile void __iomem *addr)
113{
114 return *(__force volatile __u32 *)(addr);
115}
116static inline void __raw_writeb(__u8 b, volatile void __iomem *addr)
117{
118 *(__force volatile __u8 *)(addr) = b;
119}
120static inline void __raw_writew(__u16 b, volatile void __iomem *addr)
121{
122 *(__force volatile __u16 *)(addr) = b;
123}
124static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
125{
126 *(__force volatile __u32 *)(addr) = b;
127}
128
129/* These are the definitions for the x86 IO instructions
130 * inb/inw/inl/outb/outw/outl, the "string" versions
131 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
132 * inb_p/inw_p/...
133 * The macros don't do byte-swapping.
134 */
135
136#define inb(port) readb((u8 *)((port)))
137#define outb(val, port) writeb((val),(u8 *)((unsigned long)(port)))
138#define inw(port) readw((u16 *)((port)))
139#define outw(val, port) writew((val),(u16 *)((unsigned long)(port)))
140#define inl(port) readl((u32 *)((port)))
141#define outl(val, port) writel((val),(u32 *)((unsigned long)(port)))
142
143#define inb_p(port) inb((port))
144#define outb_p(val, port) outb((val), (port))
145#define inw_p(port) inw((port))
146#define outw_p(val, port) outw((val), (port))
147#define inl_p(port) inl((port))
148#define outl_p(val, port) outl((val), (port))
149
150extern void insb (unsigned long port, void *dst, unsigned long count);
151extern void insw (unsigned long port, void *dst, unsigned long count);
152extern void insl (unsigned long port, void *dst, unsigned long count);
153extern void outsb (unsigned long port, const void *src, unsigned long count);
154extern void outsw (unsigned long port, const void *src, unsigned long count);
155extern void outsl (unsigned long port, const void *src, unsigned long count);
156
157#define IO_SPACE_LIMIT ~0
158
159#define memset_io(a,b,c) memset((void *)(a),(b),(c))
160#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
161#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
162
163/* At this point the Xtensa doesn't provide byte swap instructions */
164
165#ifdef __XTENSA_EB__
166# define in_8(addr) (*(u8*)(addr))
167# define in_le16(addr) _swapw(*(u16*)(addr))
168# define in_le32(addr) _swapl(*(u32*)(addr))
169# define out_8(b, addr) *(u8*)(addr) = (b)
170# define out_le16(b, addr) *(u16*)(addr) = _swapw(b)
171# define out_le32(b, addr) *(u32*)(addr) = _swapl(b)
172#elif defined(__XTENSA_EL__)
173# define in_8(addr) (*(u8*)(addr))
174# define in_le16(addr) (*(u16*)(addr))
175# define in_le32(addr) (*(u32*)(addr))
176# define out_8(b, addr) *(u8*)(addr) = (b)
177# define out_le16(b, addr) *(u16*)(addr) = (b)
178# define out_le32(b, addr) *(u32*)(addr) = (b)
179#else
180# error processor byte order undefined!
181#endif
182
183
184/*
185 * Convert a physical pointer to a virtual kernel pointer for /dev/mem access
186 */
187#define xlate_dev_mem_ptr(p) __va(p)
188
189/*
190 * Convert a virtual cached pointer to an uncached pointer
191 */
192#define xlate_dev_kmem_ptr(p) p
193
194
195#endif /* __KERNEL__ */
196
197#endif /* _XTENSA_IO_H */