tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * include/asm-v850/teg.h -- NB85E-TEG cpu chip
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_TEG_H__
15#define __V850_TEG_H__
16
17
18/* The TEG uses the V850E cpu core. */
19#include <asm/v850e.h>
20#include <asm/v850e_cache.h>
21
22
23#define CPU_MODEL "v850e/nb85e-teg"
24#define CPU_MODEL_LONG "NEC V850E/NB85E TEG"
25
26
27/* For <asm/entry.h> */
28/* We use on-chip RAM, for a few miscellaneous variables that must be
29 accessible using a load instruction relative to R0. On the NB85E/TEG,
30 There's 60KB of iRAM starting at 0xFFFF0000, however we need the base
31 address to be addressable by a 16-bit signed offset, so we only use the
32 second half of it starting from 0xFFFF8000. */
33#define R0_RAM_ADDR 0xFFFF8000
34
35
36/* Hardware-specific interrupt numbers (in the kernel IRQ namespace).
37 Some of these are parameterized even though there's only a single
38 interrupt, for compatibility with some generic code that works on other
39 processor models. */
40#define IRQ_INTCMD(n) 6 /* interval timer interrupt */
41#define IRQ_INTCMD_NUM 1
42#define IRQ_INTSER(n) 16 /* UART reception error */
43#define IRQ_INTSER_NUM 1
44#define IRQ_INTSR(n) 17 /* UART reception completion */
45#define IRQ_INTSR_NUM 1
46#define IRQ_INTST(n) 18 /* UART transmission completion */
47#define IRQ_INTST_NUM 1
48
49/* For <asm/irq.h> */
50#define NUM_CPU_IRQS 64
51
52
53/* TEG UART details. */
54#define V850E_UART_BASE_ADDR(n) (0xFFFFF600 + 0x10 * (n))
55#define V850E_UART_ASIM_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x0)
56#define V850E_UART_ASIS_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x2)
57#define V850E_UART_ASIF_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x4)
58#define V850E_UART_CKSR_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x6)
59#define V850E_UART_BRGC_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x8)
60#define V850E_UART_TXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0xA)
61#define V850E_UART_RXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0xC)
62#define V850E_UART_NUM_CHANNELS 1
63#define V850E_UART_BASE_FREQ CPU_CLOCK_FREQ
64/* This is a function that gets called before configuring the UART. */
65#define V850E_UART_PRE_CONFIGURE teg_uart_pre_configure
66#ifndef __ASSEMBLY__
67extern void teg_uart_pre_configure (unsigned chan,
68 unsigned cflags, unsigned baud);
69#endif
70
71
72/* The TEG RTPU. */
73#define V850E_RTPU_BASE_ADDR 0xFFFFF210
74
75
76/* TEG series timer D details. */
77#define V850E_TIMER_D_BASE_ADDR 0xFFFFF210
78#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
79#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
80#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x8)
81#define V850E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ
82
83
84/* `Interrupt Source Select' control register. */
85#define TEG_ISS_ADDR 0xFFFFF7FA
86#define TEG_ISS (*(volatile u8 *)TEG_ISS_ADDR)
87
88/* Port 0 I/O register (bits 0-3 used). */
89#define TEG_PORT0_IO_ADDR 0xFFFFF7F2
90#define TEG_PORT0_IO (*(volatile u8 *)TEG_PORT0_IO_ADDR)
91/* Port 0 control register (bits 0-3 control mode, 0 = output, 1 = input). */
92#define TEG_PORT0_PM_ADDR 0xFFFFF7F4
93#define TEG_PORT0_PM (*(volatile u8 *)TEG_PORT0_PM_ADDR)
94
95
96#ifndef __ASSEMBLY__
97extern void teg_init_irqs (void);
98#endif
99
100
101#endif /* __V850_TEG_H__ */