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1/* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20#ifndef LINUX_SERIAL_CORE_H 21#define LINUX_SERIAL_CORE_H 22 23/* 24 * The type definitions. These are from Ted Ts'o's serial.h 25 */ 26#define PORT_UNKNOWN 0 27#define PORT_8250 1 28#define PORT_16450 2 29#define PORT_16550 3 30#define PORT_16550A 4 31#define PORT_CIRRUS 5 32#define PORT_16650 6 33#define PORT_16650V2 7 34#define PORT_16750 8 35#define PORT_STARTECH 9 36#define PORT_16C950 10 37#define PORT_16654 11 38#define PORT_16850 12 39#define PORT_RSA 13 40#define PORT_NS16550A 14 41#define PORT_XSCALE 15 42#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 43#define PORT_MAX_8250 16 /* max port ID */ 44 45/* 46 * ARM specific type numbers. These are not currently guaranteed 47 * to be implemented, and will change in the future. These are 48 * separate so any additions to the old serial.c that occur before 49 * we are merged can be easily merged here. 50 */ 51#define PORT_PXA 31 52#define PORT_AMBA 32 53#define PORT_CLPS711X 33 54#define PORT_SA1100 34 55#define PORT_UART00 35 56#define PORT_21285 37 57 58/* Sparc type numbers. */ 59#define PORT_SUNZILOG 38 60#define PORT_SUNSAB 39 61 62/* NEC v850. */ 63#define PORT_V850E_UART 40 64 65/* DZ */ 66#define PORT_DZ 47 67 68/* Parisc type numbers. */ 69#define PORT_MUX 48 70 71/* Atmel AT91 / AT32 SoC */ 72#define PORT_ATMEL 49 73 74/* Macintosh Zilog type numbers */ 75#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 76#define PORT_PMAC_ZILOG 51 77 78/* SH-SCI */ 79#define PORT_SCI 52 80#define PORT_SCIF 53 81#define PORT_IRDA 54 82 83/* Samsung S3C2410 SoC and derivatives thereof */ 84#define PORT_S3C2410 55 85 86/* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 87#define PORT_IP22ZILOG 56 88 89/* Sharp LH7a40x -- an ARM9 SoC series */ 90#define PORT_LH7A40X 57 91 92/* PPC CPM type number */ 93#define PORT_CPM 58 94 95/* MPC52xx type numbers */ 96#define PORT_MPC52xx 59 97 98/* IBM icom */ 99#define PORT_ICOM 60 100 101/* Samsung S3C2440 SoC */ 102#define PORT_S3C2440 61 103 104/* Motorola i.MX SoC */ 105#define PORT_IMX 62 106 107/* Marvell MPSC */ 108#define PORT_MPSC 63 109 110/* TXX9 type number */ 111#define PORT_TXX9 64 112 113/* NEC VR4100 series SIU/DSIU */ 114#define PORT_VR41XX_SIU 65 115#define PORT_VR41XX_DSIU 66 116 117/* Samsung S3C2400 SoC */ 118#define PORT_S3C2400 67 119 120/* M32R SIO */ 121#define PORT_M32R_SIO 68 122 123/*Digi jsm */ 124#define PORT_JSM 69 125 126#define PORT_PNX8XXX 70 127 128/* Hilscher netx */ 129#define PORT_NETX 71 130 131/* SUN4V Hypervisor Console */ 132#define PORT_SUNHV 72 133 134#define PORT_S3C2412 73 135 136/* Xilinx uartlite */ 137#define PORT_UARTLITE 74 138 139/* Blackfin bf5xx */ 140#define PORT_BFIN 75 141 142/* Micrel KS8695 */ 143#define PORT_KS8695 76 144 145 146#ifdef __KERNEL__ 147 148#include <linux/compiler.h> 149#include <linux/interrupt.h> 150#include <linux/circ_buf.h> 151#include <linux/spinlock.h> 152#include <linux/sched.h> 153#include <linux/tty.h> 154#include <linux/mutex.h> 155#include <linux/sysrq.h> 156 157struct uart_port; 158struct uart_info; 159struct serial_struct; 160struct device; 161 162/* 163 * This structure describes all the operations that can be 164 * done on the physical hardware. 165 */ 166struct uart_ops { 167 unsigned int (*tx_empty)(struct uart_port *); 168 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 169 unsigned int (*get_mctrl)(struct uart_port *); 170 void (*stop_tx)(struct uart_port *); 171 void (*start_tx)(struct uart_port *); 172 void (*send_xchar)(struct uart_port *, char ch); 173 void (*stop_rx)(struct uart_port *); 174 void (*enable_ms)(struct uart_port *); 175 void (*break_ctl)(struct uart_port *, int ctl); 176 int (*startup)(struct uart_port *); 177 void (*shutdown)(struct uart_port *); 178 void (*set_termios)(struct uart_port *, struct ktermios *new, 179 struct ktermios *old); 180 void (*pm)(struct uart_port *, unsigned int state, 181 unsigned int oldstate); 182 int (*set_wake)(struct uart_port *, unsigned int state); 183 184 /* 185 * Return a string describing the type of the port 186 */ 187 const char *(*type)(struct uart_port *); 188 189 /* 190 * Release IO and memory resources used by the port. 191 * This includes iounmap if necessary. 192 */ 193 void (*release_port)(struct uart_port *); 194 195 /* 196 * Request IO and memory resources used by the port. 197 * This includes iomapping the port if necessary. 198 */ 199 int (*request_port)(struct uart_port *); 200 void (*config_port)(struct uart_port *, int); 201 int (*verify_port)(struct uart_port *, struct serial_struct *); 202 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 203}; 204 205#define UART_CONFIG_TYPE (1 << 0) 206#define UART_CONFIG_IRQ (1 << 1) 207 208struct uart_icount { 209 __u32 cts; 210 __u32 dsr; 211 __u32 rng; 212 __u32 dcd; 213 __u32 rx; 214 __u32 tx; 215 __u32 frame; 216 __u32 overrun; 217 __u32 parity; 218 __u32 brk; 219 __u32 buf_overrun; 220}; 221 222typedef unsigned int __bitwise__ upf_t; 223 224struct uart_port { 225 spinlock_t lock; /* port lock */ 226 unsigned int iobase; /* in/out[bwl] */ 227 unsigned char __iomem *membase; /* read/write[bwl] */ 228 unsigned int irq; /* irq number */ 229 unsigned int uartclk; /* base uart clock */ 230 unsigned int fifosize; /* tx fifo size */ 231 unsigned char x_char; /* xon/xoff char */ 232 unsigned char regshift; /* reg offset shift */ 233 unsigned char iotype; /* io access style */ 234 unsigned char unused1; 235 236#define UPIO_PORT (0) 237#define UPIO_HUB6 (1) 238#define UPIO_MEM (2) 239#define UPIO_MEM32 (3) 240#define UPIO_AU (4) /* Au1x00 type IO */ 241#define UPIO_TSI (5) /* Tsi108/109 type IO */ 242#define UPIO_DWAPB (6) /* DesignWare APB UART */ 243#define UPIO_RM9000 (7) /* RM9000 type IO */ 244 245 unsigned int read_status_mask; /* driver specific */ 246 unsigned int ignore_status_mask; /* driver specific */ 247 struct uart_info *info; /* pointer to parent info */ 248 struct uart_icount icount; /* statistics */ 249 250 struct console *cons; /* struct console, if any */ 251#ifdef CONFIG_SERIAL_CORE_CONSOLE 252 unsigned long sysrq; /* sysrq timeout */ 253#endif 254 255 upf_t flags; 256 257#define UPF_FOURPORT ((__force upf_t) (1 << 1)) 258#define UPF_SAK ((__force upf_t) (1 << 2)) 259#define UPF_SPD_MASK ((__force upf_t) (0x1030)) 260#define UPF_SPD_HI ((__force upf_t) (0x0010)) 261#define UPF_SPD_VHI ((__force upf_t) (0x0020)) 262#define UPF_SPD_CUST ((__force upf_t) (0x0030)) 263#define UPF_SPD_SHI ((__force upf_t) (0x1000)) 264#define UPF_SPD_WARP ((__force upf_t) (0x1010)) 265#define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 266#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 267#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 268#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 269#define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 270#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 271#define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 272#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 273#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 274#define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 275#define UPF_DEAD ((__force upf_t) (1 << 30)) 276#define UPF_IOREMAP ((__force upf_t) (1 << 31)) 277 278#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 279#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 280 281 unsigned int mctrl; /* current modem ctrl settings */ 282 unsigned int timeout; /* character-based timeout */ 283 unsigned int type; /* port type */ 284 const struct uart_ops *ops; 285 unsigned int custom_divisor; 286 unsigned int line; /* port index */ 287 unsigned long mapbase; /* for ioremap */ 288 struct device *dev; /* parent device */ 289 unsigned char hub6; /* this should be in the 8250 driver */ 290 unsigned char unused[3]; 291 void *private_data; /* generic platform data pointer */ 292}; 293 294/* 295 * This is the state information which is persistent across opens. 296 * The low level driver must not to touch any elements contained 297 * within. 298 */ 299struct uart_state { 300 unsigned int close_delay; /* msec */ 301 unsigned int closing_wait; /* msec */ 302 303#define USF_CLOSING_WAIT_INF (0) 304#define USF_CLOSING_WAIT_NONE (~0U) 305 306 int count; 307 int pm_state; 308 struct uart_info *info; 309 struct uart_port *port; 310 311 struct mutex mutex; 312}; 313 314#define UART_XMIT_SIZE PAGE_SIZE 315 316typedef unsigned int __bitwise__ uif_t; 317 318/* 319 * This is the state information which is only valid when the port 320 * is open; it may be freed by the core driver once the device has 321 * been closed. Either the low level driver or the core can modify 322 * stuff here. 323 */ 324struct uart_info { 325 struct tty_struct *tty; 326 struct circ_buf xmit; 327 uif_t flags; 328 329/* 330 * Definitions for info->flags. These are _private_ to serial_core, and 331 * are specific to this structure. They may be queried by low level drivers. 332 */ 333#define UIF_CHECK_CD ((__force uif_t) (1 << 25)) 334#define UIF_CTS_FLOW ((__force uif_t) (1 << 26)) 335#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29)) 336#define UIF_INITIALIZED ((__force uif_t) (1 << 31)) 337#define UIF_SUSPENDED ((__force uif_t) (1 << 30)) 338 339 int blocked_open; 340 341 struct tasklet_struct tlet; 342 343 wait_queue_head_t open_wait; 344 wait_queue_head_t delta_msr_wait; 345}; 346 347/* number of characters left in xmit buffer before we ask for more */ 348#define WAKEUP_CHARS 256 349 350struct module; 351struct tty_driver; 352 353struct uart_driver { 354 struct module *owner; 355 const char *driver_name; 356 const char *dev_name; 357 int major; 358 int minor; 359 int nr; 360 struct console *cons; 361 362 /* 363 * these are private; the low level driver should not 364 * touch these; they should be initialised to NULL 365 */ 366 struct uart_state *state; 367 struct tty_driver *tty_driver; 368}; 369 370void uart_write_wakeup(struct uart_port *port); 371 372/* 373 * Baud rate helpers. 374 */ 375void uart_update_timeout(struct uart_port *port, unsigned int cflag, 376 unsigned int baud); 377unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 378 struct ktermios *old, unsigned int min, 379 unsigned int max); 380unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 381 382/* 383 * Console helpers. 384 */ 385struct uart_port *uart_get_console(struct uart_port *ports, int nr, 386 struct console *c); 387void uart_parse_options(char *options, int *baud, int *parity, int *bits, 388 int *flow); 389int uart_set_options(struct uart_port *port, struct console *co, int baud, 390 int parity, int bits, int flow); 391struct tty_driver *uart_console_device(struct console *co, int *index); 392void uart_console_write(struct uart_port *port, const char *s, 393 unsigned int count, 394 void (*putchar)(struct uart_port *, int)); 395 396/* 397 * Port/driver registration/removal 398 */ 399int uart_register_driver(struct uart_driver *uart); 400void uart_unregister_driver(struct uart_driver *uart); 401int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 402int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 403int uart_match_port(struct uart_port *port1, struct uart_port *port2); 404 405/* 406 * Power Management 407 */ 408int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 409int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 410 411#define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 412#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 413 414#define uart_circ_chars_pending(circ) \ 415 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 416 417#define uart_circ_chars_free(circ) \ 418 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 419 420#define uart_tx_stopped(port) \ 421 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped) 422 423/* 424 * The following are helper functions for the low level drivers. 425 */ 426static inline int 427uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 428{ 429#ifdef SUPPORT_SYSRQ 430 if (port->sysrq) { 431 if (ch && time_before(jiffies, port->sysrq)) { 432 handle_sysrq(ch, port->info->tty); 433 port->sysrq = 0; 434 return 1; 435 } 436 port->sysrq = 0; 437 } 438#endif 439 return 0; 440} 441#ifndef SUPPORT_SYSRQ 442#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 443#endif 444 445/* 446 * We do the SysRQ and SAK checking like this... 447 */ 448static inline int uart_handle_break(struct uart_port *port) 449{ 450 struct uart_info *info = port->info; 451#ifdef SUPPORT_SYSRQ 452 if (port->cons && port->cons->index == port->line) { 453 if (!port->sysrq) { 454 port->sysrq = jiffies + HZ*5; 455 return 1; 456 } 457 port->sysrq = 0; 458 } 459#endif 460 if (port->flags & UPF_SAK) 461 do_SAK(info->tty); 462 return 0; 463} 464 465/** 466 * uart_handle_dcd_change - handle a change of carrier detect state 467 * @port: uart_port structure for the open port 468 * @status: new carrier detect status, nonzero if active 469 */ 470static inline void 471uart_handle_dcd_change(struct uart_port *port, unsigned int status) 472{ 473 struct uart_info *info = port->info; 474 475 port->icount.dcd++; 476 477#ifdef CONFIG_HARD_PPS 478 if ((port->flags & UPF_HARDPPS_CD) && status) 479 hardpps(); 480#endif 481 482 if (info->flags & UIF_CHECK_CD) { 483 if (status) 484 wake_up_interruptible(&info->open_wait); 485 else if (info->tty) 486 tty_hangup(info->tty); 487 } 488} 489 490/** 491 * uart_handle_cts_change - handle a change of clear-to-send state 492 * @port: uart_port structure for the open port 493 * @status: new clear to send status, nonzero if active 494 */ 495static inline void 496uart_handle_cts_change(struct uart_port *port, unsigned int status) 497{ 498 struct uart_info *info = port->info; 499 struct tty_struct *tty = info->tty; 500 501 port->icount.cts++; 502 503 if (info->flags & UIF_CTS_FLOW) { 504 if (tty->hw_stopped) { 505 if (status) { 506 tty->hw_stopped = 0; 507 port->ops->start_tx(port); 508 uart_write_wakeup(port); 509 } 510 } else { 511 if (!status) { 512 tty->hw_stopped = 1; 513 port->ops->stop_tx(port); 514 } 515 } 516 } 517} 518 519#include <linux/tty_flip.h> 520 521static inline void 522uart_insert_char(struct uart_port *port, unsigned int status, 523 unsigned int overrun, unsigned int ch, unsigned int flag) 524{ 525 struct tty_struct *tty = port->info->tty; 526 527 if ((status & port->ignore_status_mask & ~overrun) == 0) 528 tty_insert_flip_char(tty, ch, flag); 529 530 /* 531 * Overrun is special. Since it's reported immediately, 532 * it doesn't affect the current character. 533 */ 534 if (status & ~port->ignore_status_mask & overrun) 535 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 536} 537 538/* 539 * UART_ENABLE_MS - determine if port should enable modem status irqs 540 */ 541#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 542 (cflag) & CRTSCTS || \ 543 !((cflag) & CLOCAL)) 544 545#endif 546 547#endif /* LINUX_SERIAL_CORE_H */