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1/******************************************************************************* 2 3 Copyright(c) 2006 Tundra Semiconductor Corporation. 4 5 This program is free software; you can redistribute it and/or modify it 6 under the terms of the GNU General Public License as published by the Free 7 Software Foundation; either version 2 of the License, or (at your option) 8 any later version. 9 10 This program is distributed in the hope that it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 59 17 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 19*******************************************************************************/ 20 21/* This driver is based on the driver code originally developed 22 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by 23 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation 24 * 25 * Currently changes from original version are: 26 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com) 27 * - modifications to handle two ports independently and support for 28 * additional PHY devices (alexandre.bounine@tundra.com) 29 * - Get hardware information from platform device. (tie-fei.zang@freescale.com) 30 * 31 */ 32 33#include <linux/module.h> 34#include <linux/types.h> 35#include <linux/init.h> 36#include <linux/net.h> 37#include <linux/netdevice.h> 38#include <linux/etherdevice.h> 39#include <linux/skbuff.h> 40#include <linux/slab.h> 41#include <linux/spinlock.h> 42#include <linux/delay.h> 43#include <linux/crc32.h> 44#include <linux/mii.h> 45#include <linux/device.h> 46#include <linux/pci.h> 47#include <linux/rtnetlink.h> 48#include <linux/timer.h> 49#include <linux/platform_device.h> 50#include <linux/etherdevice.h> 51 52#include <asm/system.h> 53#include <asm/io.h> 54#include <asm/tsi108.h> 55 56#include "tsi108_eth.h" 57 58#define MII_READ_DELAY 10000 /* max link wait time in msec */ 59 60#define TSI108_RXRING_LEN 256 61 62/* NOTE: The driver currently does not support receiving packets 63 * larger than the buffer size, so don't decrease this (unless you 64 * want to add such support). 65 */ 66#define TSI108_RXBUF_SIZE 1536 67 68#define TSI108_TXRING_LEN 256 69 70#define TSI108_TX_INT_FREQ 64 71 72/* Check the phy status every half a second. */ 73#define CHECK_PHY_INTERVAL (HZ/2) 74 75static int tsi108_init_one(struct platform_device *pdev); 76static int tsi108_ether_remove(struct platform_device *pdev); 77 78struct tsi108_prv_data { 79 void __iomem *regs; /* Base of normal regs */ 80 void __iomem *phyregs; /* Base of register bank used for PHY access */ 81 82 unsigned int phy; /* Index of PHY for this interface */ 83 unsigned int irq_num; 84 unsigned int id; 85 unsigned int phy_type; 86 87 struct timer_list timer;/* Timer that triggers the check phy function */ 88 unsigned int rxtail; /* Next entry in rxring to read */ 89 unsigned int rxhead; /* Next entry in rxring to give a new buffer */ 90 unsigned int rxfree; /* Number of free, allocated RX buffers */ 91 92 unsigned int rxpending; /* Non-zero if there are still descriptors 93 * to be processed from a previous descriptor 94 * interrupt condition that has been cleared */ 95 96 unsigned int txtail; /* Next TX descriptor to check status on */ 97 unsigned int txhead; /* Next TX descriptor to use */ 98 99 /* Number of free TX descriptors. This could be calculated from 100 * rxhead and rxtail if one descriptor were left unused to disambiguate 101 * full and empty conditions, but it's simpler to just keep track 102 * explicitly. */ 103 104 unsigned int txfree; 105 106 unsigned int phy_ok; /* The PHY is currently powered on. */ 107 108 /* PHY status (duplex is 1 for half, 2 for full, 109 * so that the default 0 indicates that neither has 110 * yet been configured). */ 111 112 unsigned int link_up; 113 unsigned int speed; 114 unsigned int duplex; 115 116 tx_desc *txring; 117 rx_desc *rxring; 118 struct sk_buff *txskbs[TSI108_TXRING_LEN]; 119 struct sk_buff *rxskbs[TSI108_RXRING_LEN]; 120 121 dma_addr_t txdma, rxdma; 122 123 /* txlock nests in misclock and phy_lock */ 124 125 spinlock_t txlock, misclock; 126 127 /* stats is used to hold the upper bits of each hardware counter, 128 * and tmpstats is used to hold the full values for returning 129 * to the caller of get_stats(). They must be separate in case 130 * an overflow interrupt occurs before the stats are consumed. 131 */ 132 133 struct net_device_stats stats; 134 struct net_device_stats tmpstats; 135 136 /* These stats are kept separate in hardware, thus require individual 137 * fields for handling carry. They are combined in get_stats. 138 */ 139 140 unsigned long rx_fcs; /* Add to rx_frame_errors */ 141 unsigned long rx_short_fcs; /* Add to rx_frame_errors */ 142 unsigned long rx_long_fcs; /* Add to rx_frame_errors */ 143 unsigned long rx_underruns; /* Add to rx_length_errors */ 144 unsigned long rx_overruns; /* Add to rx_length_errors */ 145 146 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */ 147 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */ 148 149 unsigned long mc_hash[16]; 150 u32 msg_enable; /* debug message level */ 151 struct mii_if_info mii_if; 152 unsigned int init_media; 153}; 154 155/* Structure for a device driver */ 156 157static struct platform_driver tsi_eth_driver = { 158 .probe = tsi108_init_one, 159 .remove = tsi108_ether_remove, 160 .driver = { 161 .name = "tsi-ethernet", 162 }, 163}; 164 165static void tsi108_timed_checker(unsigned long dev_ptr); 166 167static void dump_eth_one(struct net_device *dev) 168{ 169 struct tsi108_prv_data *data = netdev_priv(dev); 170 171 printk("Dumping %s...\n", dev->name); 172 printk("intstat %x intmask %x phy_ok %d" 173 " link %d speed %d duplex %d\n", 174 TSI_READ(TSI108_EC_INTSTAT), 175 TSI_READ(TSI108_EC_INTMASK), data->phy_ok, 176 data->link_up, data->speed, data->duplex); 177 178 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n", 179 data->txhead, data->txtail, data->txfree, 180 TSI_READ(TSI108_EC_TXSTAT), 181 TSI_READ(TSI108_EC_TXESTAT), 182 TSI_READ(TSI108_EC_TXERR)); 183 184 printk("RX: head %d, tail %d, free %d, stat %x," 185 " estat %x, err %x, pending %d\n\n", 186 data->rxhead, data->rxtail, data->rxfree, 187 TSI_READ(TSI108_EC_RXSTAT), 188 TSI_READ(TSI108_EC_RXESTAT), 189 TSI_READ(TSI108_EC_RXERR), data->rxpending); 190} 191 192/* Synchronization is needed between the thread and up/down events. 193 * Note that the PHY is accessed through the same registers for both 194 * interfaces, so this can't be made interface-specific. 195 */ 196 197static DEFINE_SPINLOCK(phy_lock); 198 199static int tsi108_read_mii(struct tsi108_prv_data *data, int reg) 200{ 201 unsigned i; 202 203 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, 204 (data->phy << TSI108_MAC_MII_ADDR_PHY) | 205 (reg << TSI108_MAC_MII_ADDR_REG)); 206 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0); 207 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ); 208 for (i = 0; i < 100; i++) { 209 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) & 210 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY))) 211 break; 212 udelay(10); 213 } 214 215 if (i == 100) 216 return 0xffff; 217 else 218 return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN)); 219} 220 221static void tsi108_write_mii(struct tsi108_prv_data *data, 222 int reg, u16 val) 223{ 224 unsigned i = 100; 225 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, 226 (data->phy << TSI108_MAC_MII_ADDR_PHY) | 227 (reg << TSI108_MAC_MII_ADDR_REG)); 228 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val); 229 while (i--) { 230 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) & 231 TSI108_MAC_MII_IND_BUSY)) 232 break; 233 udelay(10); 234 } 235} 236 237static int tsi108_mdio_read(struct net_device *dev, int addr, int reg) 238{ 239 struct tsi108_prv_data *data = netdev_priv(dev); 240 return tsi108_read_mii(data, reg); 241} 242 243static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val) 244{ 245 struct tsi108_prv_data *data = netdev_priv(dev); 246 tsi108_write_mii(data, reg, val); 247} 248 249static inline void tsi108_write_tbi(struct tsi108_prv_data *data, 250 int reg, u16 val) 251{ 252 unsigned i = 1000; 253 TSI_WRITE(TSI108_MAC_MII_ADDR, 254 (0x1e << TSI108_MAC_MII_ADDR_PHY) 255 | (reg << TSI108_MAC_MII_ADDR_REG)); 256 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val); 257 while(i--) { 258 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY)) 259 return; 260 udelay(10); 261 } 262 printk(KERN_ERR "%s function time out \n", __FUNCTION__); 263} 264 265static int mii_speed(struct mii_if_info *mii) 266{ 267 int advert, lpa, val, media; 268 int lpa2 = 0; 269 int speed; 270 271 if (!mii_link_ok(mii)) 272 return 0; 273 274 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR); 275 if ((val & BMSR_ANEGCOMPLETE) == 0) 276 return 0; 277 278 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE); 279 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA); 280 media = mii_nway_result(advert & lpa); 281 282 if (mii->supports_gmii) 283 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000); 284 285 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 : 286 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10); 287 return speed; 288} 289 290static void tsi108_check_phy(struct net_device *dev) 291{ 292 struct tsi108_prv_data *data = netdev_priv(dev); 293 u32 mac_cfg2_reg, portctrl_reg; 294 u32 duplex; 295 u32 speed; 296 unsigned long flags; 297 298 /* Do a dummy read, as for some reason the first read 299 * after a link becomes up returns link down, even if 300 * it's been a while since the link came up. 301 */ 302 303 spin_lock_irqsave(&phy_lock, flags); 304 305 if (!data->phy_ok) 306 goto out; 307 308 tsi108_read_mii(data, MII_BMSR); 309 310 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media); 311 data->init_media = 0; 312 313 if (netif_carrier_ok(dev)) { 314 315 speed = mii_speed(&data->mii_if); 316 317 if ((speed != data->speed) || duplex) { 318 319 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2); 320 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL); 321 322 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK; 323 324 if (speed == 1000) { 325 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG; 326 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG; 327 } else { 328 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG; 329 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG; 330 } 331 332 data->speed = speed; 333 334 if (data->mii_if.full_duplex) { 335 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX; 336 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX; 337 data->duplex = 2; 338 } else { 339 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX; 340 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX; 341 data->duplex = 1; 342 } 343 344 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg); 345 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg); 346 347 if (data->link_up == 0) { 348 /* The manual says it can take 3-4 usecs for the speed change 349 * to take effect. 350 */ 351 udelay(5); 352 353 spin_lock(&data->txlock); 354 if (is_valid_ether_addr(dev->dev_addr) && data->txfree) 355 netif_wake_queue(dev); 356 357 data->link_up = 1; 358 spin_unlock(&data->txlock); 359 } 360 } 361 362 } else { 363 if (data->link_up == 1) { 364 netif_stop_queue(dev); 365 data->link_up = 0; 366 printk(KERN_NOTICE "%s : link is down\n", dev->name); 367 } 368 369 goto out; 370 } 371 372 373out: 374 spin_unlock_irqrestore(&phy_lock, flags); 375} 376 377static inline void 378tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift, 379 unsigned long *upper) 380{ 381 if (carry & carry_bit) 382 *upper += carry_shift; 383} 384 385static void tsi108_stat_carry(struct net_device *dev) 386{ 387 struct tsi108_prv_data *data = netdev_priv(dev); 388 u32 carry1, carry2; 389 390 spin_lock_irq(&data->misclock); 391 392 carry1 = TSI_READ(TSI108_STAT_CARRY1); 393 carry2 = TSI_READ(TSI108_STAT_CARRY2); 394 395 TSI_WRITE(TSI108_STAT_CARRY1, carry1); 396 TSI_WRITE(TSI108_STAT_CARRY2, carry2); 397 398 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES, 399 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); 400 401 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS, 402 TSI108_STAT_RXPKTS_CARRY, 403 &data->stats.rx_packets); 404 405 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS, 406 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs); 407 408 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST, 409 TSI108_STAT_RXMCAST_CARRY, 410 &data->stats.multicast); 411 412 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN, 413 TSI108_STAT_RXALIGN_CARRY, 414 &data->stats.rx_frame_errors); 415 416 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH, 417 TSI108_STAT_RXLENGTH_CARRY, 418 &data->stats.rx_length_errors); 419 420 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT, 421 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); 422 423 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO, 424 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); 425 426 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG, 427 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); 428 429 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER, 430 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs); 431 432 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP, 433 TSI108_STAT_RXDROP_CARRY, 434 &data->stats.rx_missed_errors); 435 436 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES, 437 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); 438 439 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS, 440 TSI108_STAT_TXPKTS_CARRY, 441 &data->stats.tx_packets); 442 443 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF, 444 TSI108_STAT_TXEXDEF_CARRY, 445 &data->stats.tx_aborted_errors); 446 447 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL, 448 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort); 449 450 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL, 451 TSI108_STAT_TXTCOL_CARRY, 452 &data->stats.collisions); 453 454 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE, 455 TSI108_STAT_TXPAUSEDROP_CARRY, 456 &data->tx_pause_drop); 457 458 spin_unlock_irq(&data->misclock); 459} 460 461/* Read a stat counter atomically with respect to carries. 462 * data->misclock must be held. 463 */ 464static inline unsigned long 465tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit, 466 int carry_shift, unsigned long *upper) 467{ 468 int carryreg; 469 unsigned long val; 470 471 if (reg < 0xb0) 472 carryreg = TSI108_STAT_CARRY1; 473 else 474 carryreg = TSI108_STAT_CARRY2; 475 476 again: 477 val = TSI_READ(reg) | *upper; 478 479 /* Check to see if it overflowed, but the interrupt hasn't 480 * been serviced yet. If so, handle the carry here, and 481 * try again. 482 */ 483 484 if (unlikely(TSI_READ(carryreg) & carry_bit)) { 485 *upper += carry_shift; 486 TSI_WRITE(carryreg, carry_bit); 487 goto again; 488 } 489 490 return val; 491} 492 493static struct net_device_stats *tsi108_get_stats(struct net_device *dev) 494{ 495 unsigned long excol; 496 497 struct tsi108_prv_data *data = netdev_priv(dev); 498 spin_lock_irq(&data->misclock); 499 500 data->tmpstats.rx_packets = 501 tsi108_read_stat(data, TSI108_STAT_RXPKTS, 502 TSI108_STAT_CARRY1_RXPKTS, 503 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets); 504 505 data->tmpstats.tx_packets = 506 tsi108_read_stat(data, TSI108_STAT_TXPKTS, 507 TSI108_STAT_CARRY2_TXPKTS, 508 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets); 509 510 data->tmpstats.rx_bytes = 511 tsi108_read_stat(data, TSI108_STAT_RXBYTES, 512 TSI108_STAT_CARRY1_RXBYTES, 513 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); 514 515 data->tmpstats.tx_bytes = 516 tsi108_read_stat(data, TSI108_STAT_TXBYTES, 517 TSI108_STAT_CARRY2_TXBYTES, 518 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); 519 520 data->tmpstats.multicast = 521 tsi108_read_stat(data, TSI108_STAT_RXMCAST, 522 TSI108_STAT_CARRY1_RXMCAST, 523 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast); 524 525 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL, 526 TSI108_STAT_CARRY2_TXEXCOL, 527 TSI108_STAT_TXEXCOL_CARRY, 528 &data->tx_coll_abort); 529 530 data->tmpstats.collisions = 531 tsi108_read_stat(data, TSI108_STAT_TXTCOL, 532 TSI108_STAT_CARRY2_TXTCOL, 533 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions); 534 535 data->tmpstats.collisions += excol; 536 537 data->tmpstats.rx_length_errors = 538 tsi108_read_stat(data, TSI108_STAT_RXLENGTH, 539 TSI108_STAT_CARRY1_RXLENGTH, 540 TSI108_STAT_RXLENGTH_CARRY, 541 &data->stats.rx_length_errors); 542 543 data->tmpstats.rx_length_errors += 544 tsi108_read_stat(data, TSI108_STAT_RXRUNT, 545 TSI108_STAT_CARRY1_RXRUNT, 546 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); 547 548 data->tmpstats.rx_length_errors += 549 tsi108_read_stat(data, TSI108_STAT_RXJUMBO, 550 TSI108_STAT_CARRY1_RXJUMBO, 551 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); 552 553 data->tmpstats.rx_frame_errors = 554 tsi108_read_stat(data, TSI108_STAT_RXALIGN, 555 TSI108_STAT_CARRY1_RXALIGN, 556 TSI108_STAT_RXALIGN_CARRY, 557 &data->stats.rx_frame_errors); 558 559 data->tmpstats.rx_frame_errors += 560 tsi108_read_stat(data, TSI108_STAT_RXFCS, 561 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY, 562 &data->rx_fcs); 563 564 data->tmpstats.rx_frame_errors += 565 tsi108_read_stat(data, TSI108_STAT_RXFRAG, 566 TSI108_STAT_CARRY1_RXFRAG, 567 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); 568 569 data->tmpstats.rx_missed_errors = 570 tsi108_read_stat(data, TSI108_STAT_RXDROP, 571 TSI108_STAT_CARRY1_RXDROP, 572 TSI108_STAT_RXDROP_CARRY, 573 &data->stats.rx_missed_errors); 574 575 /* These three are maintained by software. */ 576 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors; 577 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors; 578 579 data->tmpstats.tx_aborted_errors = 580 tsi108_read_stat(data, TSI108_STAT_TXEXDEF, 581 TSI108_STAT_CARRY2_TXEXDEF, 582 TSI108_STAT_TXEXDEF_CARRY, 583 &data->stats.tx_aborted_errors); 584 585 data->tmpstats.tx_aborted_errors += 586 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP, 587 TSI108_STAT_CARRY2_TXPAUSE, 588 TSI108_STAT_TXPAUSEDROP_CARRY, 589 &data->tx_pause_drop); 590 591 data->tmpstats.tx_aborted_errors += excol; 592 593 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors; 594 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors + 595 data->tmpstats.rx_crc_errors + 596 data->tmpstats.rx_frame_errors + 597 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors; 598 599 spin_unlock_irq(&data->misclock); 600 return &data->tmpstats; 601} 602 603static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev) 604{ 605 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH, 606 TSI108_EC_RXQ_PTRHIGH_VALID); 607 608 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO 609 | TSI108_EC_RXCTRL_QUEUE0); 610} 611 612static void tsi108_restart_tx(struct tsi108_prv_data * data) 613{ 614 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH, 615 TSI108_EC_TXQ_PTRHIGH_VALID); 616 617 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT | 618 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0); 619} 620 621/* txlock must be held by caller, with IRQs disabled, and 622 * with permission to re-enable them when the lock is dropped. 623 */ 624static void tsi108_complete_tx(struct net_device *dev) 625{ 626 struct tsi108_prv_data *data = netdev_priv(dev); 627 int tx; 628 struct sk_buff *skb; 629 int release = 0; 630 631 while (!data->txfree || data->txhead != data->txtail) { 632 tx = data->txtail; 633 634 if (data->txring[tx].misc & TSI108_TX_OWN) 635 break; 636 637 skb = data->txskbs[tx]; 638 639 if (!(data->txring[tx].misc & TSI108_TX_OK)) 640 printk("%s: bad tx packet, misc %x\n", 641 dev->name, data->txring[tx].misc); 642 643 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; 644 data->txfree++; 645 646 if (data->txring[tx].misc & TSI108_TX_EOF) { 647 dev_kfree_skb_any(skb); 648 release++; 649 } 650 } 651 652 if (release) { 653 if (is_valid_ether_addr(dev->dev_addr) && data->link_up) 654 netif_wake_queue(dev); 655 } 656} 657 658static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev) 659{ 660 struct tsi108_prv_data *data = netdev_priv(dev); 661 int frags = skb_shinfo(skb)->nr_frags + 1; 662 int i; 663 664 if (!data->phy_ok && net_ratelimit()) 665 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name); 666 667 if (!data->link_up) { 668 printk(KERN_ERR "%s: Transmit while link is down!\n", 669 dev->name); 670 netif_stop_queue(dev); 671 return NETDEV_TX_BUSY; 672 } 673 674 if (data->txfree < MAX_SKB_FRAGS + 1) { 675 netif_stop_queue(dev); 676 677 if (net_ratelimit()) 678 printk(KERN_ERR "%s: Transmit with full tx ring!\n", 679 dev->name); 680 return NETDEV_TX_BUSY; 681 } 682 683 if (data->txfree - frags < MAX_SKB_FRAGS + 1) { 684 netif_stop_queue(dev); 685 } 686 687 spin_lock_irq(&data->txlock); 688 689 for (i = 0; i < frags; i++) { 690 int misc = 0; 691 int tx = data->txhead; 692 693 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with 694 * the interrupt bit. TX descriptor-complete interrupts are 695 * enabled when the queue fills up, and masked when there is 696 * still free space. This way, when saturating the outbound 697 * link, the tx interrupts are kept to a reasonable level. 698 * When the queue is not full, reclamation of skbs still occurs 699 * as new packets are transmitted, or on a queue-empty 700 * interrupt. 701 */ 702 703 if ((tx % TSI108_TX_INT_FREQ == 0) && 704 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ)) 705 misc = TSI108_TX_INT; 706 707 data->txskbs[tx] = skb; 708 709 if (i == 0) { 710 data->txring[tx].buf0 = dma_map_single(NULL, skb->data, 711 skb->len - skb->data_len, DMA_TO_DEVICE); 712 data->txring[tx].len = skb->len - skb->data_len; 713 misc |= TSI108_TX_SOF; 714 } else { 715 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 716 717 data->txring[tx].buf0 = 718 dma_map_page(NULL, frag->page, frag->page_offset, 719 frag->size, DMA_TO_DEVICE); 720 data->txring[tx].len = frag->size; 721 } 722 723 if (i == frags - 1) 724 misc |= TSI108_TX_EOF; 725 726 if (netif_msg_pktdata(data)) { 727 int i; 728 printk("%s: Tx Frame contents (%d)\n", dev->name, 729 skb->len); 730 for (i = 0; i < skb->len; i++) 731 printk(" %2.2x", skb->data[i]); 732 printk(".\n"); 733 } 734 data->txring[tx].misc = misc | TSI108_TX_OWN; 735 736 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN; 737 data->txfree--; 738 } 739 740 tsi108_complete_tx(dev); 741 742 /* This must be done after the check for completed tx descriptors, 743 * so that the tail pointer is correct. 744 */ 745 746 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0)) 747 tsi108_restart_tx(data); 748 749 spin_unlock_irq(&data->txlock); 750 return NETDEV_TX_OK; 751} 752 753static int tsi108_complete_rx(struct net_device *dev, int budget) 754{ 755 struct tsi108_prv_data *data = netdev_priv(dev); 756 int done = 0; 757 758 while (data->rxfree && done != budget) { 759 int rx = data->rxtail; 760 struct sk_buff *skb; 761 762 if (data->rxring[rx].misc & TSI108_RX_OWN) 763 break; 764 765 skb = data->rxskbs[rx]; 766 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; 767 data->rxfree--; 768 done++; 769 770 if (data->rxring[rx].misc & TSI108_RX_BAD) { 771 spin_lock_irq(&data->misclock); 772 773 if (data->rxring[rx].misc & TSI108_RX_CRC) 774 data->stats.rx_crc_errors++; 775 if (data->rxring[rx].misc & TSI108_RX_OVER) 776 data->stats.rx_fifo_errors++; 777 778 spin_unlock_irq(&data->misclock); 779 780 dev_kfree_skb_any(skb); 781 continue; 782 } 783 if (netif_msg_pktdata(data)) { 784 int i; 785 printk("%s: Rx Frame contents (%d)\n", 786 dev->name, data->rxring[rx].len); 787 for (i = 0; i < data->rxring[rx].len; i++) 788 printk(" %2.2x", skb->data[i]); 789 printk(".\n"); 790 } 791 792 skb_put(skb, data->rxring[rx].len); 793 skb->protocol = eth_type_trans(skb, dev); 794 netif_receive_skb(skb); 795 dev->last_rx = jiffies; 796 } 797 798 return done; 799} 800 801static int tsi108_refill_rx(struct net_device *dev, int budget) 802{ 803 struct tsi108_prv_data *data = netdev_priv(dev); 804 int done = 0; 805 806 while (data->rxfree != TSI108_RXRING_LEN && done != budget) { 807 int rx = data->rxhead; 808 struct sk_buff *skb; 809 810 data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2); 811 if (!skb) 812 break; 813 814 skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */ 815 816 data->rxring[rx].buf0 = dma_map_single(NULL, skb->data, 817 TSI108_RX_SKB_SIZE, 818 DMA_FROM_DEVICE); 819 820 /* Sometimes the hardware sets blen to zero after packet 821 * reception, even though the manual says that it's only ever 822 * modified by the driver. 823 */ 824 825 data->rxring[rx].blen = TSI108_RX_SKB_SIZE; 826 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT; 827 828 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN; 829 data->rxfree++; 830 done++; 831 } 832 833 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) & 834 TSI108_EC_RXSTAT_QUEUE0)) 835 tsi108_restart_rx(data, dev); 836 837 return done; 838} 839 840static int tsi108_poll(struct net_device *dev, int *budget) 841{ 842 struct tsi108_prv_data *data = netdev_priv(dev); 843 u32 estat = TSI_READ(TSI108_EC_RXESTAT); 844 u32 intstat = TSI_READ(TSI108_EC_INTSTAT); 845 int total_budget = min(*budget, dev->quota); 846 int num_received = 0, num_filled = 0, budget_used; 847 848 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | 849 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT; 850 851 TSI_WRITE(TSI108_EC_RXESTAT, estat); 852 TSI_WRITE(TSI108_EC_INTSTAT, intstat); 853 854 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT)) 855 num_received = tsi108_complete_rx(dev, total_budget); 856 857 /* This should normally fill no more slots than the number of 858 * packets received in tsi108_complete_rx(). The exception 859 * is when we previously ran out of memory for RX SKBs. In that 860 * case, it's helpful to obey the budget, not only so that the 861 * CPU isn't hogged, but so that memory (which may still be low) 862 * is not hogged by one device. 863 * 864 * A work unit is considered to be two SKBs to allow us to catch 865 * up when the ring has shrunk due to out-of-memory but we're 866 * still removing the full budget's worth of packets each time. 867 */ 868 869 if (data->rxfree < TSI108_RXRING_LEN) 870 num_filled = tsi108_refill_rx(dev, total_budget * 2); 871 872 if (intstat & TSI108_INT_RXERROR) { 873 u32 err = TSI_READ(TSI108_EC_RXERR); 874 TSI_WRITE(TSI108_EC_RXERR, err); 875 876 if (err) { 877 if (net_ratelimit()) 878 printk(KERN_DEBUG "%s: RX error %x\n", 879 dev->name, err); 880 881 if (!(TSI_READ(TSI108_EC_RXSTAT) & 882 TSI108_EC_RXSTAT_QUEUE0)) 883 tsi108_restart_rx(data, dev); 884 } 885 } 886 887 if (intstat & TSI108_INT_RXOVERRUN) { 888 spin_lock_irq(&data->misclock); 889 data->stats.rx_fifo_errors++; 890 spin_unlock_irq(&data->misclock); 891 } 892 893 budget_used = max(num_received, num_filled / 2); 894 895 *budget -= budget_used; 896 dev->quota -= budget_used; 897 898 if (budget_used != total_budget) { 899 data->rxpending = 0; 900 netif_rx_complete(dev); 901 902 TSI_WRITE(TSI108_EC_INTMASK, 903 TSI_READ(TSI108_EC_INTMASK) 904 & ~(TSI108_INT_RXQUEUE0 905 | TSI108_INT_RXTHRESH | 906 TSI108_INT_RXOVERRUN | 907 TSI108_INT_RXERROR | 908 TSI108_INT_RXWAIT)); 909 910 /* IRQs are level-triggered, so no need to re-check */ 911 return 0; 912 } else { 913 data->rxpending = 1; 914 } 915 916 return 1; 917} 918 919static void tsi108_rx_int(struct net_device *dev) 920{ 921 struct tsi108_prv_data *data = netdev_priv(dev); 922 923 /* A race could cause dev to already be scheduled, so it's not an 924 * error if that happens (and interrupts shouldn't be re-masked, 925 * because that can cause harmful races, if poll has already 926 * unmasked them but not cleared LINK_STATE_SCHED). 927 * 928 * This can happen if this code races with tsi108_poll(), which masks 929 * the interrupts after tsi108_irq_one() read the mask, but before 930 * netif_rx_schedule is called. It could also happen due to calls 931 * from tsi108_check_rxring(). 932 */ 933 934 if (netif_rx_schedule_prep(dev)) { 935 /* Mask, rather than ack, the receive interrupts. The ack 936 * will happen in tsi108_poll(). 937 */ 938 939 TSI_WRITE(TSI108_EC_INTMASK, 940 TSI_READ(TSI108_EC_INTMASK) | 941 TSI108_INT_RXQUEUE0 942 | TSI108_INT_RXTHRESH | 943 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | 944 TSI108_INT_RXWAIT); 945 __netif_rx_schedule(dev); 946 } else { 947 if (!netif_running(dev)) { 948 /* This can happen if an interrupt occurs while the 949 * interface is being brought down, as the START 950 * bit is cleared before the stop function is called. 951 * 952 * In this case, the interrupts must be masked, or 953 * they will continue indefinitely. 954 * 955 * There's a race here if the interface is brought down 956 * and then up in rapid succession, as the device could 957 * be made running after the above check and before 958 * the masking below. This will only happen if the IRQ 959 * thread has a lower priority than the task brining 960 * up the interface. Fixing this race would likely 961 * require changes in generic code. 962 */ 963 964 TSI_WRITE(TSI108_EC_INTMASK, 965 TSI_READ 966 (TSI108_EC_INTMASK) | 967 TSI108_INT_RXQUEUE0 | 968 TSI108_INT_RXTHRESH | 969 TSI108_INT_RXOVERRUN | 970 TSI108_INT_RXERROR | 971 TSI108_INT_RXWAIT); 972 } 973 } 974} 975 976/* If the RX ring has run out of memory, try periodically 977 * to allocate some more, as otherwise poll would never 978 * get called (apart from the initial end-of-queue condition). 979 * 980 * This is called once per second (by default) from the thread. 981 */ 982 983static void tsi108_check_rxring(struct net_device *dev) 984{ 985 struct tsi108_prv_data *data = netdev_priv(dev); 986 987 /* A poll is scheduled, as opposed to caling tsi108_refill_rx 988 * directly, so as to keep the receive path single-threaded 989 * (and thus not needing a lock). 990 */ 991 992 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4) 993 tsi108_rx_int(dev); 994} 995 996static void tsi108_tx_int(struct net_device *dev) 997{ 998 struct tsi108_prv_data *data = netdev_priv(dev); 999 u32 estat = TSI_READ(TSI108_EC_TXESTAT); 1000 1001 TSI_WRITE(TSI108_EC_TXESTAT, estat); 1002 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 | 1003 TSI108_INT_TXIDLE | TSI108_INT_TXERROR); 1004 if (estat & TSI108_EC_TXESTAT_Q0_ERR) { 1005 u32 err = TSI_READ(TSI108_EC_TXERR); 1006 TSI_WRITE(TSI108_EC_TXERR, err); 1007 1008 if (err && net_ratelimit()) 1009 printk(KERN_ERR "%s: TX error %x\n", dev->name, err); 1010 } 1011 1012 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) { 1013 spin_lock(&data->txlock); 1014 tsi108_complete_tx(dev); 1015 spin_unlock(&data->txlock); 1016 } 1017} 1018 1019 1020static irqreturn_t tsi108_irq(int irq, void *dev_id) 1021{ 1022 struct net_device *dev = dev_id; 1023 struct tsi108_prv_data *data = netdev_priv(dev); 1024 u32 stat = TSI_READ(TSI108_EC_INTSTAT); 1025 1026 if (!(stat & TSI108_INT_ANY)) 1027 return IRQ_NONE; /* Not our interrupt */ 1028 1029 stat &= ~TSI_READ(TSI108_EC_INTMASK); 1030 1031 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE | 1032 TSI108_INT_TXERROR)) 1033 tsi108_tx_int(dev); 1034 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | 1035 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN | 1036 TSI108_INT_RXERROR)) 1037 tsi108_rx_int(dev); 1038 1039 if (stat & TSI108_INT_SFN) { 1040 if (net_ratelimit()) 1041 printk(KERN_DEBUG "%s: SFN error\n", dev->name); 1042 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN); 1043 } 1044 1045 if (stat & TSI108_INT_STATCARRY) { 1046 tsi108_stat_carry(dev); 1047 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY); 1048 } 1049 1050 return IRQ_HANDLED; 1051} 1052 1053static void tsi108_stop_ethernet(struct net_device *dev) 1054{ 1055 struct tsi108_prv_data *data = netdev_priv(dev); 1056 int i = 1000; 1057 /* Disable all TX and RX queues ... */ 1058 TSI_WRITE(TSI108_EC_TXCTRL, 0); 1059 TSI_WRITE(TSI108_EC_RXCTRL, 0); 1060 1061 /* ...and wait for them to become idle */ 1062 while(i--) { 1063 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE)) 1064 break; 1065 udelay(10); 1066 } 1067 i = 1000; 1068 while(i--){ 1069 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE)) 1070 return; 1071 udelay(10); 1072 } 1073 printk(KERN_ERR "%s function time out \n", __FUNCTION__); 1074} 1075 1076static void tsi108_reset_ether(struct tsi108_prv_data * data) 1077{ 1078 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST); 1079 udelay(100); 1080 TSI_WRITE(TSI108_MAC_CFG1, 0); 1081 1082 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST); 1083 udelay(100); 1084 TSI_WRITE(TSI108_EC_PORTCTRL, 1085 TSI_READ(TSI108_EC_PORTCTRL) & 1086 ~TSI108_EC_PORTCTRL_STATRST); 1087 1088 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST); 1089 udelay(100); 1090 TSI_WRITE(TSI108_EC_TXCFG, 1091 TSI_READ(TSI108_EC_TXCFG) & 1092 ~TSI108_EC_TXCFG_RST); 1093 1094 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST); 1095 udelay(100); 1096 TSI_WRITE(TSI108_EC_RXCFG, 1097 TSI_READ(TSI108_EC_RXCFG) & 1098 ~TSI108_EC_RXCFG_RST); 1099 1100 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, 1101 TSI_READ(TSI108_MAC_MII_MGMT_CFG) | 1102 TSI108_MAC_MII_MGMT_RST); 1103 udelay(100); 1104 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, 1105 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) & 1106 ~(TSI108_MAC_MII_MGMT_RST | 1107 TSI108_MAC_MII_MGMT_CLK)) | 0x07); 1108} 1109 1110static int tsi108_get_mac(struct net_device *dev) 1111{ 1112 struct tsi108_prv_data *data = netdev_priv(dev); 1113 u32 word1 = TSI_READ(TSI108_MAC_ADDR1); 1114 u32 word2 = TSI_READ(TSI108_MAC_ADDR2); 1115 1116 /* Note that the octets are reversed from what the manual says, 1117 * producing an even weirder ordering... 1118 */ 1119 if (word2 == 0 && word1 == 0) { 1120 dev->dev_addr[0] = 0x00; 1121 dev->dev_addr[1] = 0x06; 1122 dev->dev_addr[2] = 0xd2; 1123 dev->dev_addr[3] = 0x00; 1124 dev->dev_addr[4] = 0x00; 1125 if (0x8 == data->phy) 1126 dev->dev_addr[5] = 0x01; 1127 else 1128 dev->dev_addr[5] = 0x02; 1129 1130 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); 1131 1132 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | 1133 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); 1134 1135 TSI_WRITE(TSI108_MAC_ADDR1, word1); 1136 TSI_WRITE(TSI108_MAC_ADDR2, word2); 1137 } else { 1138 dev->dev_addr[0] = (word2 >> 16) & 0xff; 1139 dev->dev_addr[1] = (word2 >> 24) & 0xff; 1140 dev->dev_addr[2] = (word1 >> 0) & 0xff; 1141 dev->dev_addr[3] = (word1 >> 8) & 0xff; 1142 dev->dev_addr[4] = (word1 >> 16) & 0xff; 1143 dev->dev_addr[5] = (word1 >> 24) & 0xff; 1144 } 1145 1146 if (!is_valid_ether_addr(dev->dev_addr)) { 1147 printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2); 1148 return -EINVAL; 1149 } 1150 1151 return 0; 1152} 1153 1154static int tsi108_set_mac(struct net_device *dev, void *addr) 1155{ 1156 struct tsi108_prv_data *data = netdev_priv(dev); 1157 u32 word1, word2; 1158 int i; 1159 1160 if (!is_valid_ether_addr(addr)) 1161 return -EINVAL; 1162 1163 for (i = 0; i < 6; i++) 1164 /* +2 is for the offset of the HW addr type */ 1165 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2]; 1166 1167 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); 1168 1169 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | 1170 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); 1171 1172 spin_lock_irq(&data->misclock); 1173 TSI_WRITE(TSI108_MAC_ADDR1, word1); 1174 TSI_WRITE(TSI108_MAC_ADDR2, word2); 1175 spin_lock(&data->txlock); 1176 1177 if (data->txfree && data->link_up) 1178 netif_wake_queue(dev); 1179 1180 spin_unlock(&data->txlock); 1181 spin_unlock_irq(&data->misclock); 1182 return 0; 1183} 1184 1185/* Protected by dev->xmit_lock. */ 1186static void tsi108_set_rx_mode(struct net_device *dev) 1187{ 1188 struct tsi108_prv_data *data = netdev_priv(dev); 1189 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG); 1190 1191 if (dev->flags & IFF_PROMISC) { 1192 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH); 1193 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE; 1194 goto out; 1195 } 1196 1197 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE); 1198 1199 if (dev->flags & IFF_ALLMULTI || dev->mc_count) { 1200 int i; 1201 struct dev_mc_list *mc = dev->mc_list; 1202 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH; 1203 1204 memset(data->mc_hash, 0, sizeof(data->mc_hash)); 1205 1206 while (mc) { 1207 u32 hash, crc; 1208 1209 if (mc->dmi_addrlen == 6) { 1210 crc = ether_crc(6, mc->dmi_addr); 1211 hash = crc >> 23; 1212 1213 __set_bit(hash, &data->mc_hash[0]); 1214 } else { 1215 printk(KERN_ERR 1216 "%s: got multicast address of length %d " 1217 "instead of 6.\n", dev->name, 1218 mc->dmi_addrlen); 1219 } 1220 1221 mc = mc->next; 1222 } 1223 1224 TSI_WRITE(TSI108_EC_HASHADDR, 1225 TSI108_EC_HASHADDR_AUTOINC | 1226 TSI108_EC_HASHADDR_MCAST); 1227 1228 for (i = 0; i < 16; i++) { 1229 /* The manual says that the hardware may drop 1230 * back-to-back writes to the data register. 1231 */ 1232 udelay(1); 1233 TSI_WRITE(TSI108_EC_HASHDATA, 1234 data->mc_hash[i]); 1235 } 1236 } 1237 1238 out: 1239 TSI_WRITE(TSI108_EC_RXCFG, rxcfg); 1240} 1241 1242static void tsi108_init_phy(struct net_device *dev) 1243{ 1244 struct tsi108_prv_data *data = netdev_priv(dev); 1245 u32 i = 0; 1246 u16 phyval = 0; 1247 unsigned long flags; 1248 1249 spin_lock_irqsave(&phy_lock, flags); 1250 1251 tsi108_write_mii(data, MII_BMCR, BMCR_RESET); 1252 while (i--){ 1253 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET)) 1254 break; 1255 udelay(10); 1256 } 1257 if (i == 0) 1258 printk(KERN_ERR "%s function time out \n", __FUNCTION__); 1259 1260 if (data->phy_type == TSI108_PHY_BCM54XX) { 1261 tsi108_write_mii(data, 0x09, 0x0300); 1262 tsi108_write_mii(data, 0x10, 0x1020); 1263 tsi108_write_mii(data, 0x1c, 0x8c00); 1264 } 1265 1266 tsi108_write_mii(data, 1267 MII_BMCR, 1268 BMCR_ANENABLE | BMCR_ANRESTART); 1269 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART) 1270 cpu_relax(); 1271 1272 /* Set G/MII mode and receive clock select in TBI control #2. The 1273 * second port won't work if this isn't done, even though we don't 1274 * use TBI mode. 1275 */ 1276 1277 tsi108_write_tbi(data, 0x11, 0x30); 1278 1279 /* FIXME: It seems to take more than 2 back-to-back reads to the 1280 * PHY_STAT register before the link up status bit is set. 1281 */ 1282 1283 data->link_up = 1; 1284 1285 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) & 1286 BMSR_LSTATUS)) { 1287 if (i++ > (MII_READ_DELAY / 10)) { 1288 data->link_up = 0; 1289 break; 1290 } 1291 spin_unlock_irqrestore(&phy_lock, flags); 1292 msleep(10); 1293 spin_lock_irqsave(&phy_lock, flags); 1294 } 1295 1296 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval); 1297 data->phy_ok = 1; 1298 data->init_media = 1; 1299 spin_unlock_irqrestore(&phy_lock, flags); 1300} 1301 1302static void tsi108_kill_phy(struct net_device *dev) 1303{ 1304 struct tsi108_prv_data *data = netdev_priv(dev); 1305 unsigned long flags; 1306 1307 spin_lock_irqsave(&phy_lock, flags); 1308 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN); 1309 data->phy_ok = 0; 1310 spin_unlock_irqrestore(&phy_lock, flags); 1311} 1312 1313static int tsi108_open(struct net_device *dev) 1314{ 1315 int i; 1316 struct tsi108_prv_data *data = netdev_priv(dev); 1317 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc); 1318 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc); 1319 1320 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev); 1321 if (i != 0) { 1322 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n", 1323 data->id, data->irq_num); 1324 return i; 1325 } else { 1326 dev->irq = data->irq_num; 1327 printk(KERN_NOTICE 1328 "tsi108_open : Port %d Assigned IRQ %d to %s\n", 1329 data->id, dev->irq, dev->name); 1330 } 1331 1332 data->rxring = dma_alloc_coherent(NULL, rxring_size, 1333 &data->rxdma, GFP_KERNEL); 1334 1335 if (!data->rxring) { 1336 printk(KERN_DEBUG 1337 "TSI108_ETH: failed to allocate memory for rxring!\n"); 1338 return -ENOMEM; 1339 } else { 1340 memset(data->rxring, 0, rxring_size); 1341 } 1342 1343 data->txring = dma_alloc_coherent(NULL, txring_size, 1344 &data->txdma, GFP_KERNEL); 1345 1346 if (!data->txring) { 1347 printk(KERN_DEBUG 1348 "TSI108_ETH: failed to allocate memory for txring!\n"); 1349 pci_free_consistent(0, rxring_size, data->rxring, data->rxdma); 1350 return -ENOMEM; 1351 } else { 1352 memset(data->txring, 0, txring_size); 1353 } 1354 1355 for (i = 0; i < TSI108_RXRING_LEN; i++) { 1356 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc); 1357 data->rxring[i].blen = TSI108_RXBUF_SIZE; 1358 data->rxring[i].vlan = 0; 1359 } 1360 1361 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma; 1362 1363 data->rxtail = 0; 1364 data->rxhead = 0; 1365 1366 for (i = 0; i < TSI108_RXRING_LEN; i++) { 1367 struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN); 1368 1369 if (!skb) { 1370 /* Bah. No memory for now, but maybe we'll get 1371 * some more later. 1372 * For now, we'll live with the smaller ring. 1373 */ 1374 printk(KERN_WARNING 1375 "%s: Could only allocate %d receive skb(s).\n", 1376 dev->name, i); 1377 data->rxhead = i; 1378 break; 1379 } 1380 1381 data->rxskbs[i] = skb; 1382 /* Align the payload on a 4-byte boundary */ 1383 skb_reserve(skb, 2); 1384 data->rxskbs[i] = skb; 1385 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data); 1386 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT; 1387 } 1388 1389 data->rxfree = i; 1390 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma); 1391 1392 for (i = 0; i < TSI108_TXRING_LEN; i++) { 1393 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc); 1394 data->txring[i].misc = 0; 1395 } 1396 1397 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma; 1398 data->txtail = 0; 1399 data->txhead = 0; 1400 data->txfree = TSI108_TXRING_LEN; 1401 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma); 1402 tsi108_init_phy(dev); 1403 1404 setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev); 1405 mod_timer(&data->timer, jiffies + 1); 1406 1407 tsi108_restart_rx(data, dev); 1408 1409 TSI_WRITE(TSI108_EC_INTSTAT, ~0); 1410 1411 TSI_WRITE(TSI108_EC_INTMASK, 1412 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR | 1413 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 | 1414 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT | 1415 TSI108_INT_SFN | TSI108_INT_STATCARRY)); 1416 1417 TSI_WRITE(TSI108_MAC_CFG1, 1418 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN); 1419 netif_start_queue(dev); 1420 return 0; 1421} 1422 1423static int tsi108_close(struct net_device *dev) 1424{ 1425 struct tsi108_prv_data *data = netdev_priv(dev); 1426 1427 netif_stop_queue(dev); 1428 1429 del_timer_sync(&data->timer); 1430 1431 tsi108_stop_ethernet(dev); 1432 tsi108_kill_phy(dev); 1433 TSI_WRITE(TSI108_EC_INTMASK, ~0); 1434 TSI_WRITE(TSI108_MAC_CFG1, 0); 1435 1436 /* Check for any pending TX packets, and drop them. */ 1437 1438 while (!data->txfree || data->txhead != data->txtail) { 1439 int tx = data->txtail; 1440 struct sk_buff *skb; 1441 skb = data->txskbs[tx]; 1442 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; 1443 data->txfree++; 1444 dev_kfree_skb(skb); 1445 } 1446 1447 synchronize_irq(data->irq_num); 1448 free_irq(data->irq_num, dev); 1449 1450 /* Discard the RX ring. */ 1451 1452 while (data->rxfree) { 1453 int rx = data->rxtail; 1454 struct sk_buff *skb; 1455 1456 skb = data->rxskbs[rx]; 1457 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; 1458 data->rxfree--; 1459 dev_kfree_skb(skb); 1460 } 1461 1462 dma_free_coherent(0, 1463 TSI108_RXRING_LEN * sizeof(rx_desc), 1464 data->rxring, data->rxdma); 1465 dma_free_coherent(0, 1466 TSI108_TXRING_LEN * sizeof(tx_desc), 1467 data->txring, data->txdma); 1468 1469 return 0; 1470} 1471 1472static void tsi108_init_mac(struct net_device *dev) 1473{ 1474 struct tsi108_prv_data *data = netdev_priv(dev); 1475 1476 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE | 1477 TSI108_MAC_CFG2_PADCRC); 1478 1479 TSI_WRITE(TSI108_EC_TXTHRESH, 1480 (192 << TSI108_EC_TXTHRESH_STARTFILL) | 1481 (192 << TSI108_EC_TXTHRESH_STOPFILL)); 1482 1483 TSI_WRITE(TSI108_STAT_CARRYMASK1, 1484 ~(TSI108_STAT_CARRY1_RXBYTES | 1485 TSI108_STAT_CARRY1_RXPKTS | 1486 TSI108_STAT_CARRY1_RXFCS | 1487 TSI108_STAT_CARRY1_RXMCAST | 1488 TSI108_STAT_CARRY1_RXALIGN | 1489 TSI108_STAT_CARRY1_RXLENGTH | 1490 TSI108_STAT_CARRY1_RXRUNT | 1491 TSI108_STAT_CARRY1_RXJUMBO | 1492 TSI108_STAT_CARRY1_RXFRAG | 1493 TSI108_STAT_CARRY1_RXJABBER | 1494 TSI108_STAT_CARRY1_RXDROP)); 1495 1496 TSI_WRITE(TSI108_STAT_CARRYMASK2, 1497 ~(TSI108_STAT_CARRY2_TXBYTES | 1498 TSI108_STAT_CARRY2_TXPKTS | 1499 TSI108_STAT_CARRY2_TXEXDEF | 1500 TSI108_STAT_CARRY2_TXEXCOL | 1501 TSI108_STAT_CARRY2_TXTCOL | 1502 TSI108_STAT_CARRY2_TXPAUSE)); 1503 1504 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN); 1505 TSI_WRITE(TSI108_MAC_CFG1, 0); 1506 1507 TSI_WRITE(TSI108_EC_RXCFG, 1508 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE); 1509 1510 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT | 1511 TSI108_EC_TXQ_CFG_EOQ_OWN_INT | 1512 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT << 1513 TSI108_EC_TXQ_CFG_SFNPORT)); 1514 1515 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT | 1516 TSI108_EC_RXQ_CFG_EOQ_OWN_INT | 1517 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT << 1518 TSI108_EC_RXQ_CFG_SFNPORT)); 1519 1520 TSI_WRITE(TSI108_EC_TXQ_BUFCFG, 1521 TSI108_EC_TXQ_BUFCFG_BURST256 | 1522 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << 1523 TSI108_EC_TXQ_BUFCFG_SFNPORT)); 1524 1525 TSI_WRITE(TSI108_EC_RXQ_BUFCFG, 1526 TSI108_EC_RXQ_BUFCFG_BURST256 | 1527 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << 1528 TSI108_EC_RXQ_BUFCFG_SFNPORT)); 1529 1530 TSI_WRITE(TSI108_EC_INTMASK, ~0); 1531} 1532 1533static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1534{ 1535 struct tsi108_prv_data *data = netdev_priv(dev); 1536 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL); 1537} 1538 1539static int 1540tsi108_init_one(struct platform_device *pdev) 1541{ 1542 struct net_device *dev = NULL; 1543 struct tsi108_prv_data *data = NULL; 1544 hw_info *einfo; 1545 int err = 0; 1546 1547 einfo = pdev->dev.platform_data; 1548 1549 if (NULL == einfo) { 1550 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n", 1551 pdev->id); 1552 return -ENODEV; 1553 } 1554 1555 /* Create an ethernet device instance */ 1556 1557 dev = alloc_etherdev(sizeof(struct tsi108_prv_data)); 1558 if (!dev) { 1559 printk("tsi108_eth: Could not allocate a device structure\n"); 1560 return -ENOMEM; 1561 } 1562 1563 printk("tsi108_eth%d: probe...\n", pdev->id); 1564 data = netdev_priv(dev); 1565 1566 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n", 1567 pdev->id, einfo->regs, einfo->phyregs, 1568 einfo->phy, einfo->irq_num); 1569 1570 data->regs = ioremap(einfo->regs, 0x400); 1571 if (NULL == data->regs) { 1572 err = -ENOMEM; 1573 goto regs_fail; 1574 } 1575 1576 data->phyregs = ioremap(einfo->phyregs, 0x400); 1577 if (NULL == data->phyregs) { 1578 err = -ENOMEM; 1579 goto regs_fail; 1580 } 1581/* MII setup */ 1582 data->mii_if.dev = dev; 1583 data->mii_if.mdio_read = tsi108_mdio_read; 1584 data->mii_if.mdio_write = tsi108_mdio_write; 1585 data->mii_if.phy_id = einfo->phy; 1586 data->mii_if.phy_id_mask = 0x1f; 1587 data->mii_if.reg_num_mask = 0x1f; 1588 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if); 1589 1590 data->phy = einfo->phy; 1591 data->phy_type = einfo->phy_type; 1592 data->irq_num = einfo->irq_num; 1593 data->id = pdev->id; 1594 dev->open = tsi108_open; 1595 dev->stop = tsi108_close; 1596 dev->hard_start_xmit = tsi108_send_packet; 1597 dev->set_mac_address = tsi108_set_mac; 1598 dev->set_multicast_list = tsi108_set_rx_mode; 1599 dev->get_stats = tsi108_get_stats; 1600 dev->poll = tsi108_poll; 1601 dev->do_ioctl = tsi108_do_ioctl; 1602 dev->weight = 64; /* 64 is more suitable for GigE interface - klai */ 1603 1604 /* Apparently, the Linux networking code won't use scatter-gather 1605 * if the hardware doesn't do checksums. However, it's faster 1606 * to checksum in place and use SG, as (among other reasons) 1607 * the cache won't be dirtied (which then has to be flushed 1608 * before DMA). The checksumming is done by the driver (via 1609 * a new function skb_csum_dev() in net/core/skbuff.c). 1610 */ 1611 1612 dev->features = NETIF_F_HIGHDMA; 1613 SET_MODULE_OWNER(dev); 1614 1615 spin_lock_init(&data->txlock); 1616 spin_lock_init(&data->misclock); 1617 1618 tsi108_reset_ether(data); 1619 tsi108_kill_phy(dev); 1620 1621 if ((err = tsi108_get_mac(dev)) != 0) { 1622 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n", 1623 dev->name); 1624 goto register_fail; 1625 } 1626 1627 tsi108_init_mac(dev); 1628 err = register_netdev(dev); 1629 if (err) { 1630 printk(KERN_ERR "%s: Cannot register net device, aborting.\n", 1631 dev->name); 1632 goto register_fail; 1633 } 1634 1635 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: " 1636 "%02x:%02x:%02x:%02x:%02x:%02x\n", dev->name, 1637 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], 1638 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); 1639#ifdef DEBUG 1640 data->msg_enable = DEBUG; 1641 dump_eth_one(dev); 1642#endif 1643 1644 return 0; 1645 1646register_fail: 1647 iounmap(data->regs); 1648 iounmap(data->phyregs); 1649 1650regs_fail: 1651 free_netdev(dev); 1652 return err; 1653} 1654 1655/* There's no way to either get interrupts from the PHY when 1656 * something changes, or to have the Tsi108 automatically communicate 1657 * with the PHY to reconfigure itself. 1658 * 1659 * Thus, we have to do it using a timer. 1660 */ 1661 1662static void tsi108_timed_checker(unsigned long dev_ptr) 1663{ 1664 struct net_device *dev = (struct net_device *)dev_ptr; 1665 struct tsi108_prv_data *data = netdev_priv(dev); 1666 1667 tsi108_check_phy(dev); 1668 tsi108_check_rxring(dev); 1669 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL); 1670} 1671 1672static int tsi108_ether_init(void) 1673{ 1674 int ret; 1675 ret = platform_driver_register (&tsi_eth_driver); 1676 if (ret < 0){ 1677 printk("tsi108_ether_init: error initializing ethernet " 1678 "device\n"); 1679 return ret; 1680 } 1681 return 0; 1682} 1683 1684static int tsi108_ether_remove(struct platform_device *pdev) 1685{ 1686 struct net_device *dev = platform_get_drvdata(pdev); 1687 struct tsi108_prv_data *priv = netdev_priv(dev); 1688 1689 unregister_netdev(dev); 1690 tsi108_stop_ethernet(dev); 1691 platform_set_drvdata(pdev, NULL); 1692 iounmap(priv->regs); 1693 iounmap(priv->phyregs); 1694 free_netdev(dev); 1695 1696 return 0; 1697} 1698static void tsi108_ether_exit(void) 1699{ 1700 platform_driver_unregister(&tsi_eth_driver); 1701} 1702 1703module_init(tsi108_ether_init); 1704module_exit(tsi108_ether_exit); 1705 1706MODULE_AUTHOR("Tundra Semiconductor Corporation"); 1707MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver"); 1708MODULE_LICENSE("GPL");