tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1#ifndef __fw_ohci_h
2#define __fw_ohci_h
3
4/* OHCI register map */
5
6#define OHCI1394_Version 0x000
7#define OHCI1394_GUID_ROM 0x004
8#define OHCI1394_ATRetries 0x008
9#define OHCI1394_CSRData 0x00C
10#define OHCI1394_CSRCompareData 0x010
11#define OHCI1394_CSRControl 0x014
12#define OHCI1394_ConfigROMhdr 0x018
13#define OHCI1394_BusID 0x01C
14#define OHCI1394_BusOptions 0x020
15#define OHCI1394_GUIDHi 0x024
16#define OHCI1394_GUIDLo 0x028
17#define OHCI1394_ConfigROMmap 0x034
18#define OHCI1394_PostedWriteAddressLo 0x038
19#define OHCI1394_PostedWriteAddressHi 0x03C
20#define OHCI1394_VendorID 0x040
21#define OHCI1394_HCControlSet 0x050
22#define OHCI1394_HCControlClear 0x054
23#define OHCI1394_HCControl_BIBimageValid 0x80000000
24#define OHCI1394_HCControl_noByteSwapData 0x40000000
25#define OHCI1394_HCControl_programPhyEnable 0x00800000
26#define OHCI1394_HCControl_aPhyEnhanceEnable 0x00400000
27#define OHCI1394_HCControl_LPS 0x00080000
28#define OHCI1394_HCControl_postedWriteEnable 0x00040000
29#define OHCI1394_HCControl_linkEnable 0x00020000
30#define OHCI1394_HCControl_softReset 0x00010000
31#define OHCI1394_SelfIDBuffer 0x064
32#define OHCI1394_SelfIDCount 0x068
33#define OHCI1394_IRMultiChanMaskHiSet 0x070
34#define OHCI1394_IRMultiChanMaskHiClear 0x074
35#define OHCI1394_IRMultiChanMaskLoSet 0x078
36#define OHCI1394_IRMultiChanMaskLoClear 0x07C
37#define OHCI1394_IntEventSet 0x080
38#define OHCI1394_IntEventClear 0x084
39#define OHCI1394_IntMaskSet 0x088
40#define OHCI1394_IntMaskClear 0x08C
41#define OHCI1394_IsoXmitIntEventSet 0x090
42#define OHCI1394_IsoXmitIntEventClear 0x094
43#define OHCI1394_IsoXmitIntMaskSet 0x098
44#define OHCI1394_IsoXmitIntMaskClear 0x09C
45#define OHCI1394_IsoRecvIntEventSet 0x0A0
46#define OHCI1394_IsoRecvIntEventClear 0x0A4
47#define OHCI1394_IsoRecvIntMaskSet 0x0A8
48#define OHCI1394_IsoRecvIntMaskClear 0x0AC
49#define OHCI1394_InitialBandwidthAvailable 0x0B0
50#define OHCI1394_InitialChannelsAvailableHi 0x0B4
51#define OHCI1394_InitialChannelsAvailableLo 0x0B8
52#define OHCI1394_FairnessControl 0x0DC
53#define OHCI1394_LinkControlSet 0x0E0
54#define OHCI1394_LinkControlClear 0x0E4
55#define OHCI1394_LinkControl_rcvSelfID (1 << 9)
56#define OHCI1394_LinkControl_rcvPhyPkt (1 << 10)
57#define OHCI1394_LinkControl_cycleTimerEnable (1 << 20)
58#define OHCI1394_LinkControl_cycleMaster (1 << 21)
59#define OHCI1394_LinkControl_cycleSource (1 << 22)
60#define OHCI1394_NodeID 0x0E8
61#define OHCI1394_NodeID_idValid 0x80000000
62#define OHCI1394_PhyControl 0x0EC
63#define OHCI1394_PhyControl_Read(addr) (((addr) << 8) | 0x00008000)
64#define OHCI1394_PhyControl_ReadDone 0x80000000
65#define OHCI1394_PhyControl_ReadData(r) (((r) & 0x00ff0000) >> 16)
66#define OHCI1394_PhyControl_Write(addr, data) (((addr) << 8) | (data) | 0x00004000)
67#define OHCI1394_PhyControl_WriteDone 0x00004000
68#define OHCI1394_IsochronousCycleTimer 0x0F0
69#define OHCI1394_AsReqFilterHiSet 0x100
70#define OHCI1394_AsReqFilterHiClear 0x104
71#define OHCI1394_AsReqFilterLoSet 0x108
72#define OHCI1394_AsReqFilterLoClear 0x10C
73#define OHCI1394_PhyReqFilterHiSet 0x110
74#define OHCI1394_PhyReqFilterHiClear 0x114
75#define OHCI1394_PhyReqFilterLoSet 0x118
76#define OHCI1394_PhyReqFilterLoClear 0x11C
77#define OHCI1394_PhyUpperBound 0x120
78
79#define OHCI1394_AsReqTrContextBase 0x180
80#define OHCI1394_AsReqTrContextControlSet 0x180
81#define OHCI1394_AsReqTrContextControlClear 0x184
82#define OHCI1394_AsReqTrCommandPtr 0x18C
83
84#define OHCI1394_AsRspTrContextBase 0x1A0
85#define OHCI1394_AsRspTrContextControlSet 0x1A0
86#define OHCI1394_AsRspTrContextControlClear 0x1A4
87#define OHCI1394_AsRspTrCommandPtr 0x1AC
88
89#define OHCI1394_AsReqRcvContextBase 0x1C0
90#define OHCI1394_AsReqRcvContextControlSet 0x1C0
91#define OHCI1394_AsReqRcvContextControlClear 0x1C4
92#define OHCI1394_AsReqRcvCommandPtr 0x1CC
93
94#define OHCI1394_AsRspRcvContextBase 0x1E0
95#define OHCI1394_AsRspRcvContextControlSet 0x1E0
96#define OHCI1394_AsRspRcvContextControlClear 0x1E4
97#define OHCI1394_AsRspRcvCommandPtr 0x1EC
98
99/* Isochronous transmit registers */
100#define OHCI1394_IsoXmitContextBase(n) (0x200 + 16 * (n))
101#define OHCI1394_IsoXmitContextControlSet(n) (0x200 + 16 * (n))
102#define OHCI1394_IsoXmitContextControlClear(n) (0x204 + 16 * (n))
103#define OHCI1394_IsoXmitCommandPtr(n) (0x20C + 16 * (n))
104
105/* Isochronous receive registers */
106#define OHCI1394_IsoRcvContextBase(n) (0x400 + 32 * (n))
107#define OHCI1394_IsoRcvContextControlSet(n) (0x400 + 32 * (n))
108#define OHCI1394_IsoRcvContextControlClear(n) (0x404 + 32 * (n))
109#define OHCI1394_IsoRcvCommandPtr(n) (0x40C + 32 * (n))
110#define OHCI1394_IsoRcvContextMatch(n) (0x410 + 32 * (n))
111
112/* Interrupts Mask/Events */
113#define OHCI1394_reqTxComplete 0x00000001
114#define OHCI1394_respTxComplete 0x00000002
115#define OHCI1394_ARRQ 0x00000004
116#define OHCI1394_ARRS 0x00000008
117#define OHCI1394_RQPkt 0x00000010
118#define OHCI1394_RSPkt 0x00000020
119#define OHCI1394_isochTx 0x00000040
120#define OHCI1394_isochRx 0x00000080
121#define OHCI1394_postedWriteErr 0x00000100
122#define OHCI1394_lockRespErr 0x00000200
123#define OHCI1394_selfIDComplete 0x00010000
124#define OHCI1394_busReset 0x00020000
125#define OHCI1394_phy 0x00080000
126#define OHCI1394_cycleSynch 0x00100000
127#define OHCI1394_cycle64Seconds 0x00200000
128#define OHCI1394_cycleLost 0x00400000
129#define OHCI1394_cycleInconsistent 0x00800000
130#define OHCI1394_unrecoverableError 0x01000000
131#define OHCI1394_cycleTooLong 0x02000000
132#define OHCI1394_phyRegRcvd 0x04000000
133#define OHCI1394_masterIntEnable 0x80000000
134
135#define OHCI1394_evt_no_status 0x0
136#define OHCI1394_evt_long_packet 0x2
137#define OHCI1394_evt_missing_ack 0x3
138#define OHCI1394_evt_underrun 0x4
139#define OHCI1394_evt_overrun 0x5
140#define OHCI1394_evt_descriptor_read 0x6
141#define OHCI1394_evt_data_read 0x7
142#define OHCI1394_evt_data_write 0x8
143#define OHCI1394_evt_bus_reset 0x9
144#define OHCI1394_evt_timeout 0xa
145#define OHCI1394_evt_tcode_err 0xb
146#define OHCI1394_evt_reserved_b 0xc
147#define OHCI1394_evt_reserved_c 0xd
148#define OHCI1394_evt_unknown 0xe
149#define OHCI1394_evt_flushed 0xf
150
151#define OHCI1394_phy_tcode 0xe
152
153#endif /* __fw_ohci_h */