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1/* 2 * Lance ethernet driver for the MIPS processor based 3 * DECstation family 4 * 5 * 6 * adopted from sunlance.c by Richard van den Berg 7 * 8 * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki 9 * 10 * additional sources: 11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, 12 * Revision 1.2 13 * 14 * History: 15 * 16 * v0.001: The kernel accepts the code and it shows the hardware address. 17 * 18 * v0.002: Removed most sparc stuff, left only some module and dma stuff. 19 * 20 * v0.003: Enhanced base address calculation from proposals by 21 * Harald Koerfgen and Thomas Riemer. 22 * 23 * v0.004: lance-regs is pointing at the right addresses, added prom 24 * check. First start of address mapping and DMA. 25 * 26 * v0.005: started to play around with LANCE-DMA. This driver will not 27 * work for non IOASIC lances. HK 28 * 29 * v0.006: added pointer arrays to lance_private and setup routine for 30 * them in dec_lance_init. HK 31 * 32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to 33 * access the init block. This looks like one (short) word at a 34 * time, but the smallest amount the IOASIC can transfer is a 35 * (long) word. So we have a 2-2 padding here. Changed 36 * lance_init_block accordingly. The 16-16 padding for the buffers 37 * seems to be correct. HK 38 * 39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer 40 * 41 * v0.009: Module support fixes, multiple interfaces support, various 42 * bits. macro 43 * 44 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the 45 * PMAX requirement to only use halfword accesses to the 46 * buffer. macro 47 * 48 * v0.011: Converted the PMAD to the driver model. macro 49 */ 50 51#include <linux/crc32.h> 52#include <linux/delay.h> 53#include <linux/errno.h> 54#include <linux/if_ether.h> 55#include <linux/init.h> 56#include <linux/kernel.h> 57#include <linux/module.h> 58#include <linux/netdevice.h> 59#include <linux/etherdevice.h> 60#include <linux/spinlock.h> 61#include <linux/stddef.h> 62#include <linux/string.h> 63#include <linux/tc.h> 64#include <linux/types.h> 65 66#include <asm/addrspace.h> 67#include <asm/system.h> 68 69#include <asm/dec/interrupts.h> 70#include <asm/dec/ioasic.h> 71#include <asm/dec/ioasic_addrs.h> 72#include <asm/dec/kn01.h> 73#include <asm/dec/machtype.h> 74#include <asm/dec/system.h> 75 76static char version[] __devinitdata = 77"declance.c: v0.011 by Linux MIPS DECstation task force\n"; 78 79MODULE_AUTHOR("Linux MIPS DECstation task force"); 80MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); 81MODULE_LICENSE("GPL"); 82 83#define __unused __attribute__ ((unused)) 84 85/* 86 * card types 87 */ 88#define ASIC_LANCE 1 89#define PMAD_LANCE 2 90#define PMAX_LANCE 3 91 92 93#define LE_CSR0 0 94#define LE_CSR1 1 95#define LE_CSR2 2 96#define LE_CSR3 3 97 98#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 99 100#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 101#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 102#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 103#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 104#define LE_C0_MERR 0x0800 /* ME: Memory error */ 105#define LE_C0_RINT 0x0400 /* Received interrupt */ 106#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 107#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 108#define LE_C0_INTR 0x0080 /* Interrupt or error */ 109#define LE_C0_INEA 0x0040 /* Interrupt enable */ 110#define LE_C0_RXON 0x0020 /* Receiver on */ 111#define LE_C0_TXON 0x0010 /* Transmitter on */ 112#define LE_C0_TDMD 0x0008 /* Transmitter demand */ 113#define LE_C0_STOP 0x0004 /* Stop the card */ 114#define LE_C0_STRT 0x0002 /* Start the card */ 115#define LE_C0_INIT 0x0001 /* Init the card */ 116 117#define LE_C3_BSWP 0x4 /* SWAP */ 118#define LE_C3_ACON 0x2 /* ALE Control */ 119#define LE_C3_BCON 0x1 /* Byte control */ 120 121/* Receive message descriptor 1 */ 122#define LE_R1_OWN 0x8000 /* Who owns the entry */ 123#define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ 124#define LE_R1_FRA 0x2000 /* FRA: Frame error */ 125#define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ 126#define LE_R1_CRC 0x0800 /* CRC error */ 127#define LE_R1_BUF 0x0400 /* BUF: Buffer error */ 128#define LE_R1_SOP 0x0200 /* Start of packet */ 129#define LE_R1_EOP 0x0100 /* End of packet */ 130#define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ 131 132/* Transmit message descriptor 1 */ 133#define LE_T1_OWN 0x8000 /* Lance owns the packet */ 134#define LE_T1_ERR 0x4000 /* Error summary */ 135#define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ 136#define LE_T1_EONE 0x0800 /* Error: one retry needed */ 137#define LE_T1_EDEF 0x0400 /* Error: deferred */ 138#define LE_T1_SOP 0x0200 /* Start of packet */ 139#define LE_T1_EOP 0x0100 /* End of packet */ 140#define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ 141 142#define LE_T3_BUF 0x8000 /* Buffer error */ 143#define LE_T3_UFL 0x4000 /* Error underflow */ 144#define LE_T3_LCOL 0x1000 /* Error late collision */ 145#define LE_T3_CLOS 0x0800 /* Error carrier loss */ 146#define LE_T3_RTY 0x0400 /* Error retry */ 147#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 148 149/* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 150 151#ifndef LANCE_LOG_TX_BUFFERS 152#define LANCE_LOG_TX_BUFFERS 4 153#define LANCE_LOG_RX_BUFFERS 4 154#endif 155 156#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 157#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 158 159#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 160#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 161 162#define PKT_BUF_SZ 1536 163#define RX_BUFF_SIZE PKT_BUF_SZ 164#define TX_BUFF_SIZE PKT_BUF_SZ 165 166#undef TEST_HITS 167#define ZERO 0 168 169/* 170 * The DS2100/3100 have a linear 64 kB buffer which supports halfword 171 * accesses only. Each halfword of the buffer is word-aligned in the 172 * CPU address space. 173 * 174 * The PMAD-AA has a 128 kB buffer on-board. 175 * 176 * The IOASIC LANCE devices use a shared memory region. This region 177 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB 178 * boundary. The LANCE sees this as a 64 kB long continuous memory 179 * region. 180 * 181 * The LANCE's DMA address is used as an index in this buffer and DMA 182 * takes place in bursts of eight 16-bit words which are packed into 183 * four 32-bit words by the IOASIC. This leads to a strange padding: 184 * 16 bytes of valid data followed by a 16 byte gap :-(. 185 */ 186 187struct lance_rx_desc { 188 unsigned short rmd0; /* low address of packet */ 189 unsigned short rmd1; /* high address of packet 190 and descriptor bits */ 191 short length; /* 2s complement (negative!) 192 of buffer length */ 193 unsigned short mblength; /* actual number of bytes received */ 194}; 195 196struct lance_tx_desc { 197 unsigned short tmd0; /* low address of packet */ 198 unsigned short tmd1; /* high address of packet 199 and descriptor bits */ 200 short length; /* 2s complement (negative!) 201 of buffer length */ 202 unsigned short misc; 203}; 204 205 206/* First part of the LANCE initialization block, described in databook. */ 207struct lance_init_block { 208 unsigned short mode; /* pre-set mode (reg. 15) */ 209 210 unsigned short phys_addr[3]; /* physical ethernet address */ 211 unsigned short filter[4]; /* multicast filter */ 212 213 /* Receive and transmit ring base, along with extra bits. */ 214 unsigned short rx_ptr; /* receive descriptor addr */ 215 unsigned short rx_len; /* receive len and high addr */ 216 unsigned short tx_ptr; /* transmit descriptor addr */ 217 unsigned short tx_len; /* transmit len and high addr */ 218 219 short gap[4]; 220 221 /* The buffer descriptors */ 222 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 223 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 224}; 225 226#define BUF_OFFSET_CPU sizeof(struct lance_init_block) 227#define BUF_OFFSET_LNC sizeof(struct lance_init_block) 228 229#define shift_off(off, type) \ 230 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) 231 232#define lib_off(rt, type) \ 233 shift_off(offsetof(struct lance_init_block, rt), type) 234 235#define lib_ptr(ib, rt, type) \ 236 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) 237 238#define rds_off(rt, type) \ 239 shift_off(offsetof(struct lance_rx_desc, rt), type) 240 241#define rds_ptr(rd, rt, type) \ 242 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) 243 244#define tds_off(rt, type) \ 245 shift_off(offsetof(struct lance_tx_desc, rt), type) 246 247#define tds_ptr(td, rt, type) \ 248 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) 249 250struct lance_private { 251 struct net_device *next; 252 int type; 253 int dma_irq; 254 volatile struct lance_regs *ll; 255 256 spinlock_t lock; 257 258 int rx_new, tx_new; 259 int rx_old, tx_old; 260 261 struct net_device_stats stats; 262 263 unsigned short busmaster_regval; 264 265 struct timer_list multicast_timer; 266 267 /* Pointers to the ring buffers as seen from the CPU */ 268 char *rx_buf_ptr_cpu[RX_RING_SIZE]; 269 char *tx_buf_ptr_cpu[TX_RING_SIZE]; 270 271 /* Pointers to the ring buffers as seen from the LANCE */ 272 uint rx_buf_ptr_lnc[RX_RING_SIZE]; 273 uint tx_buf_ptr_lnc[TX_RING_SIZE]; 274}; 275 276#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 277 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 278 lp->tx_old - lp->tx_new-1) 279 280/* The lance control ports are at an absolute address, machine and tc-slot 281 * dependent. 282 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, 283 * so we have to give the structure an extra member making rap pointing 284 * at the right address 285 */ 286struct lance_regs { 287 volatile unsigned short rdp; /* register data port */ 288 unsigned short pad; 289 volatile unsigned short rap; /* register address port */ 290}; 291 292int dec_lance_debug = 2; 293 294static struct tc_driver dec_lance_tc_driver; 295static struct net_device *root_lance_dev; 296 297static inline void writereg(volatile unsigned short *regptr, short value) 298{ 299 *regptr = value; 300 iob(); 301} 302 303/* Load the CSR registers */ 304static void load_csrs(struct lance_private *lp) 305{ 306 volatile struct lance_regs *ll = lp->ll; 307 uint leptr; 308 309 /* The address space as seen from the LANCE 310 * begins at address 0. HK 311 */ 312 leptr = 0; 313 314 writereg(&ll->rap, LE_CSR1); 315 writereg(&ll->rdp, (leptr & 0xFFFF)); 316 writereg(&ll->rap, LE_CSR2); 317 writereg(&ll->rdp, leptr >> 16); 318 writereg(&ll->rap, LE_CSR3); 319 writereg(&ll->rdp, lp->busmaster_regval); 320 321 /* Point back to csr0 */ 322 writereg(&ll->rap, LE_CSR0); 323} 324 325/* 326 * Our specialized copy routines 327 * 328 */ 329static void cp_to_buf(const int type, void *to, const void *from, int len) 330{ 331 unsigned short *tp, *fp, clen; 332 unsigned char *rtp, *rfp; 333 334 if (type == PMAD_LANCE) { 335 memcpy(to, from, len); 336 } else if (type == PMAX_LANCE) { 337 clen = len >> 1; 338 tp = (unsigned short *) to; 339 fp = (unsigned short *) from; 340 341 while (clen--) { 342 *tp++ = *fp++; 343 tp++; 344 } 345 346 clen = len & 1; 347 rtp = (unsigned char *) tp; 348 rfp = (unsigned char *) fp; 349 while (clen--) { 350 *rtp++ = *rfp++; 351 } 352 } else { 353 /* 354 * copy 16 Byte chunks 355 */ 356 clen = len >> 4; 357 tp = (unsigned short *) to; 358 fp = (unsigned short *) from; 359 while (clen--) { 360 *tp++ = *fp++; 361 *tp++ = *fp++; 362 *tp++ = *fp++; 363 *tp++ = *fp++; 364 *tp++ = *fp++; 365 *tp++ = *fp++; 366 *tp++ = *fp++; 367 *tp++ = *fp++; 368 tp += 8; 369 } 370 371 /* 372 * do the rest, if any. 373 */ 374 clen = len & 15; 375 rtp = (unsigned char *) tp; 376 rfp = (unsigned char *) fp; 377 while (clen--) { 378 *rtp++ = *rfp++; 379 } 380 } 381 382 iob(); 383} 384 385static void cp_from_buf(const int type, void *to, const void *from, int len) 386{ 387 unsigned short *tp, *fp, clen; 388 unsigned char *rtp, *rfp; 389 390 if (type == PMAD_LANCE) { 391 memcpy(to, from, len); 392 } else if (type == PMAX_LANCE) { 393 clen = len >> 1; 394 tp = (unsigned short *) to; 395 fp = (unsigned short *) from; 396 while (clen--) { 397 *tp++ = *fp++; 398 fp++; 399 } 400 401 clen = len & 1; 402 403 rtp = (unsigned char *) tp; 404 rfp = (unsigned char *) fp; 405 406 while (clen--) { 407 *rtp++ = *rfp++; 408 } 409 } else { 410 411 /* 412 * copy 16 Byte chunks 413 */ 414 clen = len >> 4; 415 tp = (unsigned short *) to; 416 fp = (unsigned short *) from; 417 while (clen--) { 418 *tp++ = *fp++; 419 *tp++ = *fp++; 420 *tp++ = *fp++; 421 *tp++ = *fp++; 422 *tp++ = *fp++; 423 *tp++ = *fp++; 424 *tp++ = *fp++; 425 *tp++ = *fp++; 426 fp += 8; 427 } 428 429 /* 430 * do the rest, if any. 431 */ 432 clen = len & 15; 433 rtp = (unsigned char *) tp; 434 rfp = (unsigned char *) fp; 435 while (clen--) { 436 *rtp++ = *rfp++; 437 } 438 439 440 } 441 442} 443 444/* Setup the Lance Rx and Tx rings */ 445static void lance_init_ring(struct net_device *dev) 446{ 447 struct lance_private *lp = netdev_priv(dev); 448 volatile u16 *ib = (volatile u16 *)dev->mem_start; 449 uint leptr; 450 int i; 451 452 /* Lock out other processes while setting up hardware */ 453 netif_stop_queue(dev); 454 lp->rx_new = lp->tx_new = 0; 455 lp->rx_old = lp->tx_old = 0; 456 457 /* Copy the ethernet address to the lance init block. 458 * XXX bit 0 of the physical address registers has to be zero 459 */ 460 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | 461 dev->dev_addr[0]; 462 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | 463 dev->dev_addr[2]; 464 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | 465 dev->dev_addr[4]; 466 /* Setup the initialization block */ 467 468 /* Setup rx descriptor pointer */ 469 leptr = offsetof(struct lance_init_block, brx_ring); 470 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | 471 (leptr >> 16); 472 *lib_ptr(ib, rx_ptr, lp->type) = leptr; 473 if (ZERO) 474 printk("RX ptr: %8.8x(%8.8x)\n", 475 leptr, lib_off(brx_ring, lp->type)); 476 477 /* Setup tx descriptor pointer */ 478 leptr = offsetof(struct lance_init_block, btx_ring); 479 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | 480 (leptr >> 16); 481 *lib_ptr(ib, tx_ptr, lp->type) = leptr; 482 if (ZERO) 483 printk("TX ptr: %8.8x(%8.8x)\n", 484 leptr, lib_off(btx_ring, lp->type)); 485 486 if (ZERO) 487 printk("TX rings:\n"); 488 489 /* Setup the Tx ring entries */ 490 for (i = 0; i < TX_RING_SIZE; i++) { 491 leptr = lp->tx_buf_ptr_lnc[i]; 492 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; 493 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & 494 0xff; 495 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; 496 /* The ones required by tmd2 */ 497 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; 498 if (i < 3 && ZERO) 499 printk("%d: 0x%8.8x(0x%8.8x)\n", 500 i, leptr, (uint)lp->tx_buf_ptr_cpu[i]); 501 } 502 503 /* Setup the Rx ring entries */ 504 if (ZERO) 505 printk("RX rings:\n"); 506 for (i = 0; i < RX_RING_SIZE; i++) { 507 leptr = lp->rx_buf_ptr_lnc[i]; 508 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr; 509 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) & 510 0xff) | 511 LE_R1_OWN; 512 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE | 513 0xf000; 514 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0; 515 if (i < 3 && ZERO) 516 printk("%d: 0x%8.8x(0x%8.8x)\n", 517 i, leptr, (uint)lp->rx_buf_ptr_cpu[i]); 518 } 519 iob(); 520} 521 522static int init_restart_lance(struct lance_private *lp) 523{ 524 volatile struct lance_regs *ll = lp->ll; 525 int i; 526 527 writereg(&ll->rap, LE_CSR0); 528 writereg(&ll->rdp, LE_C0_INIT); 529 530 /* Wait for the lance to complete initialization */ 531 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) { 532 udelay(10); 533 } 534 if ((i == 100) || (ll->rdp & LE_C0_ERR)) { 535 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 536 i, ll->rdp); 537 return -1; 538 } 539 if ((ll->rdp & LE_C0_ERR)) { 540 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 541 i, ll->rdp); 542 return -1; 543 } 544 writereg(&ll->rdp, LE_C0_IDON); 545 writereg(&ll->rdp, LE_C0_STRT); 546 writereg(&ll->rdp, LE_C0_INEA); 547 548 return 0; 549} 550 551static int lance_rx(struct net_device *dev) 552{ 553 struct lance_private *lp = netdev_priv(dev); 554 volatile u16 *ib = (volatile u16 *)dev->mem_start; 555 volatile u16 *rd; 556 unsigned short bits; 557 int entry, len; 558 struct sk_buff *skb; 559 560#ifdef TEST_HITS 561 { 562 int i; 563 564 printk("["); 565 for (i = 0; i < RX_RING_SIZE; i++) { 566 if (i == lp->rx_new) 567 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 568 lp->type) & 569 LE_R1_OWN ? "_" : "X"); 570 else 571 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 572 lp->type) & 573 LE_R1_OWN ? "." : "1"); 574 } 575 printk("]"); 576 } 577#endif 578 579 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); 580 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); 581 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { 582 entry = lp->rx_new; 583 584 /* We got an incomplete frame? */ 585 if ((bits & LE_R1_POK) != LE_R1_POK) { 586 lp->stats.rx_over_errors++; 587 lp->stats.rx_errors++; 588 } else if (bits & LE_R1_ERR) { 589 /* Count only the end frame as a rx error, 590 * not the beginning 591 */ 592 if (bits & LE_R1_BUF) 593 lp->stats.rx_fifo_errors++; 594 if (bits & LE_R1_CRC) 595 lp->stats.rx_crc_errors++; 596 if (bits & LE_R1_OFL) 597 lp->stats.rx_over_errors++; 598 if (bits & LE_R1_FRA) 599 lp->stats.rx_frame_errors++; 600 if (bits & LE_R1_EOP) 601 lp->stats.rx_errors++; 602 } else { 603 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; 604 skb = dev_alloc_skb(len + 2); 605 606 if (skb == 0) { 607 printk("%s: Memory squeeze, deferring packet.\n", 608 dev->name); 609 lp->stats.rx_dropped++; 610 *rds_ptr(rd, mblength, lp->type) = 0; 611 *rds_ptr(rd, rmd1, lp->type) = 612 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 613 0xff) | LE_R1_OWN; 614 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 615 return 0; 616 } 617 lp->stats.rx_bytes += len; 618 619 skb_reserve(skb, 2); /* 16 byte align */ 620 skb_put(skb, len); /* make room */ 621 622 cp_from_buf(lp->type, skb->data, 623 (char *)lp->rx_buf_ptr_cpu[entry], len); 624 625 skb->protocol = eth_type_trans(skb, dev); 626 netif_rx(skb); 627 dev->last_rx = jiffies; 628 lp->stats.rx_packets++; 629 } 630 631 /* Return the packet to the pool */ 632 *rds_ptr(rd, mblength, lp->type) = 0; 633 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; 634 *rds_ptr(rd, rmd1, lp->type) = 635 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN; 636 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 637 } 638 return 0; 639} 640 641static void lance_tx(struct net_device *dev) 642{ 643 struct lance_private *lp = netdev_priv(dev); 644 volatile u16 *ib = (volatile u16 *)dev->mem_start; 645 volatile struct lance_regs *ll = lp->ll; 646 volatile u16 *td; 647 int i, j; 648 int status; 649 650 j = lp->tx_old; 651 652 spin_lock(&lp->lock); 653 654 for (i = j; i != lp->tx_new; i = j) { 655 td = lib_ptr(ib, btx_ring[i], lp->type); 656 /* If we hit a packet not owned by us, stop */ 657 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN) 658 break; 659 660 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) { 661 status = *tds_ptr(td, misc, lp->type); 662 663 lp->stats.tx_errors++; 664 if (status & LE_T3_RTY) 665 lp->stats.tx_aborted_errors++; 666 if (status & LE_T3_LCOL) 667 lp->stats.tx_window_errors++; 668 669 if (status & LE_T3_CLOS) { 670 lp->stats.tx_carrier_errors++; 671 printk("%s: Carrier Lost\n", dev->name); 672 /* Stop the lance */ 673 writereg(&ll->rap, LE_CSR0); 674 writereg(&ll->rdp, LE_C0_STOP); 675 lance_init_ring(dev); 676 load_csrs(lp); 677 init_restart_lance(lp); 678 goto out; 679 } 680 /* Buffer errors and underflows turn off the 681 * transmitter, restart the adapter. 682 */ 683 if (status & (LE_T3_BUF | LE_T3_UFL)) { 684 lp->stats.tx_fifo_errors++; 685 686 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 687 dev->name); 688 /* Stop the lance */ 689 writereg(&ll->rap, LE_CSR0); 690 writereg(&ll->rdp, LE_C0_STOP); 691 lance_init_ring(dev); 692 load_csrs(lp); 693 init_restart_lance(lp); 694 goto out; 695 } 696 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) == 697 LE_T1_POK) { 698 /* 699 * So we don't count the packet more than once. 700 */ 701 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK); 702 703 /* One collision before packet was sent. */ 704 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE) 705 lp->stats.collisions++; 706 707 /* More than one collision, be optimistic. */ 708 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE) 709 lp->stats.collisions += 2; 710 711 lp->stats.tx_packets++; 712 } 713 j = (j + 1) & TX_RING_MOD_MASK; 714 } 715 lp->tx_old = j; 716out: 717 if (netif_queue_stopped(dev) && 718 TX_BUFFS_AVAIL > 0) 719 netif_wake_queue(dev); 720 721 spin_unlock(&lp->lock); 722} 723 724static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id) 725{ 726 struct net_device *dev = dev_id; 727 728 printk("%s: DMA error\n", dev->name); 729 return IRQ_HANDLED; 730} 731 732static irqreturn_t lance_interrupt(const int irq, void *dev_id) 733{ 734 struct net_device *dev = dev_id; 735 struct lance_private *lp = netdev_priv(dev); 736 volatile struct lance_regs *ll = lp->ll; 737 int csr0; 738 739 writereg(&ll->rap, LE_CSR0); 740 csr0 = ll->rdp; 741 742 /* Acknowledge all the interrupt sources ASAP */ 743 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT)); 744 745 if ((csr0 & LE_C0_ERR)) { 746 /* Clear the error condition */ 747 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 748 LE_C0_CERR | LE_C0_MERR); 749 } 750 if (csr0 & LE_C0_RINT) 751 lance_rx(dev); 752 753 if (csr0 & LE_C0_TINT) 754 lance_tx(dev); 755 756 if (csr0 & LE_C0_BABL) 757 lp->stats.tx_errors++; 758 759 if (csr0 & LE_C0_MISS) 760 lp->stats.rx_errors++; 761 762 if (csr0 & LE_C0_MERR) { 763 printk("%s: Memory error, status %04x\n", dev->name, csr0); 764 765 writereg(&ll->rdp, LE_C0_STOP); 766 767 lance_init_ring(dev); 768 load_csrs(lp); 769 init_restart_lance(lp); 770 netif_wake_queue(dev); 771 } 772 773 writereg(&ll->rdp, LE_C0_INEA); 774 writereg(&ll->rdp, LE_C0_INEA); 775 return IRQ_HANDLED; 776} 777 778struct net_device *last_dev = 0; 779 780static int lance_open(struct net_device *dev) 781{ 782 volatile u16 *ib = (volatile u16 *)dev->mem_start; 783 struct lance_private *lp = netdev_priv(dev); 784 volatile struct lance_regs *ll = lp->ll; 785 int status = 0; 786 787 last_dev = dev; 788 789 /* Stop the Lance */ 790 writereg(&ll->rap, LE_CSR0); 791 writereg(&ll->rdp, LE_C0_STOP); 792 793 /* Set mode and clear multicast filter only at device open, 794 * so that lance_init_ring() called at any error will not 795 * forget multicast filters. 796 * 797 * BTW it is common bug in all lance drivers! --ANK 798 */ 799 *lib_ptr(ib, mode, lp->type) = 0; 800 *lib_ptr(ib, filter[0], lp->type) = 0; 801 *lib_ptr(ib, filter[1], lp->type) = 0; 802 *lib_ptr(ib, filter[2], lp->type) = 0; 803 *lib_ptr(ib, filter[3], lp->type) = 0; 804 805 lance_init_ring(dev); 806 load_csrs(lp); 807 808 netif_start_queue(dev); 809 810 /* Associate IRQ with lance_interrupt */ 811 if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) { 812 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq); 813 return -EAGAIN; 814 } 815 if (lp->dma_irq >= 0) { 816 unsigned long flags; 817 818 if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0, 819 "lance error", dev)) { 820 free_irq(dev->irq, dev); 821 printk("%s: Can't get DMA IRQ %d\n", dev->name, 822 lp->dma_irq); 823 return -EAGAIN; 824 } 825 826 spin_lock_irqsave(&ioasic_ssr_lock, flags); 827 828 fast_mb(); 829 /* Enable I/O ASIC LANCE DMA. */ 830 ioasic_write(IO_REG_SSR, 831 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN); 832 833 fast_mb(); 834 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 835 } 836 837 status = init_restart_lance(lp); 838 return status; 839} 840 841static int lance_close(struct net_device *dev) 842{ 843 struct lance_private *lp = netdev_priv(dev); 844 volatile struct lance_regs *ll = lp->ll; 845 846 netif_stop_queue(dev); 847 del_timer_sync(&lp->multicast_timer); 848 849 /* Stop the card */ 850 writereg(&ll->rap, LE_CSR0); 851 writereg(&ll->rdp, LE_C0_STOP); 852 853 if (lp->dma_irq >= 0) { 854 unsigned long flags; 855 856 spin_lock_irqsave(&ioasic_ssr_lock, flags); 857 858 fast_mb(); 859 /* Disable I/O ASIC LANCE DMA. */ 860 ioasic_write(IO_REG_SSR, 861 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN); 862 863 fast_iob(); 864 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 865 866 free_irq(lp->dma_irq, dev); 867 } 868 free_irq(dev->irq, dev); 869 return 0; 870} 871 872static inline int lance_reset(struct net_device *dev) 873{ 874 struct lance_private *lp = netdev_priv(dev); 875 volatile struct lance_regs *ll = lp->ll; 876 int status; 877 878 /* Stop the lance */ 879 writereg(&ll->rap, LE_CSR0); 880 writereg(&ll->rdp, LE_C0_STOP); 881 882 lance_init_ring(dev); 883 load_csrs(lp); 884 dev->trans_start = jiffies; 885 status = init_restart_lance(lp); 886 return status; 887} 888 889static void lance_tx_timeout(struct net_device *dev) 890{ 891 struct lance_private *lp = netdev_priv(dev); 892 volatile struct lance_regs *ll = lp->ll; 893 894 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 895 dev->name, ll->rdp); 896 lance_reset(dev); 897 netif_wake_queue(dev); 898} 899 900static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 901{ 902 struct lance_private *lp = netdev_priv(dev); 903 volatile struct lance_regs *ll = lp->ll; 904 volatile u16 *ib = (volatile u16 *)dev->mem_start; 905 int entry, len; 906 907 len = skb->len; 908 909 if (len < ETH_ZLEN) { 910 if (skb_padto(skb, ETH_ZLEN)) 911 return 0; 912 len = ETH_ZLEN; 913 } 914 915 lp->stats.tx_bytes += len; 916 917 entry = lp->tx_new; 918 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len); 919 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0; 920 921 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data, len); 922 923 /* Now, give the packet to the lance */ 924 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) = 925 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) | 926 (LE_T1_POK | LE_T1_OWN); 927 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK; 928 929 if (TX_BUFFS_AVAIL <= 0) 930 netif_stop_queue(dev); 931 932 /* Kick the lance: transmit now */ 933 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD); 934 935 dev->trans_start = jiffies; 936 dev_kfree_skb(skb); 937 938 return 0; 939} 940 941static struct net_device_stats *lance_get_stats(struct net_device *dev) 942{ 943 struct lance_private *lp = netdev_priv(dev); 944 945 return &lp->stats; 946} 947 948static void lance_load_multicast(struct net_device *dev) 949{ 950 struct lance_private *lp = netdev_priv(dev); 951 volatile u16 *ib = (volatile u16 *)dev->mem_start; 952 struct dev_mc_list *dmi = dev->mc_list; 953 char *addrs; 954 int i; 955 u32 crc; 956 957 /* set all multicast bits */ 958 if (dev->flags & IFF_ALLMULTI) { 959 *lib_ptr(ib, filter[0], lp->type) = 0xffff; 960 *lib_ptr(ib, filter[1], lp->type) = 0xffff; 961 *lib_ptr(ib, filter[2], lp->type) = 0xffff; 962 *lib_ptr(ib, filter[3], lp->type) = 0xffff; 963 return; 964 } 965 /* clear the multicast filter */ 966 *lib_ptr(ib, filter[0], lp->type) = 0; 967 *lib_ptr(ib, filter[1], lp->type) = 0; 968 *lib_ptr(ib, filter[2], lp->type) = 0; 969 *lib_ptr(ib, filter[3], lp->type) = 0; 970 971 /* Add addresses */ 972 for (i = 0; i < dev->mc_count; i++) { 973 addrs = dmi->dmi_addr; 974 dmi = dmi->next; 975 976 /* multicast address? */ 977 if (!(*addrs & 1)) 978 continue; 979 980 crc = ether_crc_le(ETH_ALEN, addrs); 981 crc = crc >> 26; 982 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf); 983 } 984 return; 985} 986 987static void lance_set_multicast(struct net_device *dev) 988{ 989 struct lance_private *lp = netdev_priv(dev); 990 volatile u16 *ib = (volatile u16 *)dev->mem_start; 991 volatile struct lance_regs *ll = lp->ll; 992 993 if (!netif_running(dev)) 994 return; 995 996 if (lp->tx_old != lp->tx_new) { 997 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100); 998 netif_wake_queue(dev); 999 return; 1000 } 1001 1002 netif_stop_queue(dev); 1003 1004 writereg(&ll->rap, LE_CSR0); 1005 writereg(&ll->rdp, LE_C0_STOP); 1006 1007 lance_init_ring(dev); 1008 1009 if (dev->flags & IFF_PROMISC) { 1010 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM; 1011 } else { 1012 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM; 1013 lance_load_multicast(dev); 1014 } 1015 load_csrs(lp); 1016 init_restart_lance(lp); 1017 netif_wake_queue(dev); 1018} 1019 1020static void lance_set_multicast_retry(unsigned long _opaque) 1021{ 1022 struct net_device *dev = (struct net_device *) _opaque; 1023 1024 lance_set_multicast(dev); 1025} 1026 1027static int __init dec_lance_probe(struct device *bdev, const int type) 1028{ 1029 static unsigned version_printed; 1030 static const char fmt[] = "declance%d"; 1031 char name[10]; 1032 struct net_device *dev; 1033 struct lance_private *lp; 1034 volatile struct lance_regs *ll; 1035 resource_size_t start = 0, len = 0; 1036 int i, ret; 1037 unsigned long esar_base; 1038 unsigned char *esar; 1039 1040 if (dec_lance_debug && version_printed++ == 0) 1041 printk(version); 1042 1043 if (bdev) 1044 snprintf(name, sizeof(name), "%s", bdev->bus_id); 1045 else { 1046 i = 0; 1047 dev = root_lance_dev; 1048 while (dev) { 1049 i++; 1050 lp = (struct lance_private *)dev->priv; 1051 dev = lp->next; 1052 } 1053 snprintf(name, sizeof(name), fmt, i); 1054 } 1055 1056 dev = alloc_etherdev(sizeof(struct lance_private)); 1057 if (!dev) { 1058 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n", 1059 name); 1060 ret = -ENOMEM; 1061 goto err_out; 1062 } 1063 1064 /* 1065 * alloc_etherdev ensures the data structures used by the LANCE 1066 * are aligned. 1067 */ 1068 lp = netdev_priv(dev); 1069 spin_lock_init(&lp->lock); 1070 1071 lp->type = type; 1072 switch (type) { 1073 case ASIC_LANCE: 1074 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); 1075 1076 /* buffer space for the on-board LANCE shared memory */ 1077 /* 1078 * FIXME: ugly hack! 1079 */ 1080 dev->mem_start = CKSEG1ADDR(0x00020000); 1081 dev->mem_end = dev->mem_start + 0x00020000; 1082 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1083 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); 1084 1085 /* Workaround crash with booting KN04 2.1k from Disk */ 1086 memset((void *)dev->mem_start, 0, 1087 dev->mem_end - dev->mem_start); 1088 1089 /* 1090 * setup the pointer arrays, this sucks [tm] :-( 1091 */ 1092 for (i = 0; i < RX_RING_SIZE; i++) { 1093 lp->rx_buf_ptr_cpu[i] = 1094 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1095 2 * i * RX_BUFF_SIZE); 1096 lp->rx_buf_ptr_lnc[i] = 1097 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1098 } 1099 for (i = 0; i < TX_RING_SIZE; i++) { 1100 lp->tx_buf_ptr_cpu[i] = 1101 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1102 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1103 2 * i * TX_BUFF_SIZE); 1104 lp->tx_buf_ptr_lnc[i] = 1105 (BUF_OFFSET_LNC + 1106 RX_RING_SIZE * RX_BUFF_SIZE + 1107 i * TX_BUFF_SIZE); 1108 } 1109 1110 /* Setup I/O ASIC LANCE DMA. */ 1111 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR]; 1112 ioasic_write(IO_REG_LANCE_DMA_P, 1113 CPHYSADDR(dev->mem_start) << 3); 1114 1115 break; 1116#ifdef CONFIG_TC 1117 case PMAD_LANCE: 1118 dev_set_drvdata(bdev, dev); 1119 1120 start = to_tc_dev(bdev)->resource.start; 1121 len = to_tc_dev(bdev)->resource.end - start + 1; 1122 if (!request_mem_region(start, len, bdev->bus_id)) { 1123 printk(KERN_ERR 1124 "%s: Unable to reserve MMIO resource\n", 1125 bdev->bus_id); 1126 ret = -EBUSY; 1127 goto err_out_dev; 1128 } 1129 1130 dev->mem_start = CKSEG1ADDR(start); 1131 dev->mem_end = dev->mem_start + 0x100000; 1132 dev->base_addr = dev->mem_start + 0x100000; 1133 dev->irq = to_tc_dev(bdev)->interrupt; 1134 esar_base = dev->mem_start + 0x1c0002; 1135 lp->dma_irq = -1; 1136 1137 for (i = 0; i < RX_RING_SIZE; i++) { 1138 lp->rx_buf_ptr_cpu[i] = 1139 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1140 i * RX_BUFF_SIZE); 1141 lp->rx_buf_ptr_lnc[i] = 1142 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1143 } 1144 for (i = 0; i < TX_RING_SIZE; i++) { 1145 lp->tx_buf_ptr_cpu[i] = 1146 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1147 RX_RING_SIZE * RX_BUFF_SIZE + 1148 i * TX_BUFF_SIZE); 1149 lp->tx_buf_ptr_lnc[i] = 1150 (BUF_OFFSET_LNC + 1151 RX_RING_SIZE * RX_BUFF_SIZE + 1152 i * TX_BUFF_SIZE); 1153 } 1154 1155 break; 1156#endif 1157 case PMAX_LANCE: 1158 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1159 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); 1160 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); 1161 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE; 1162 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); 1163 lp->dma_irq = -1; 1164 1165 /* 1166 * setup the pointer arrays, this sucks [tm] :-( 1167 */ 1168 for (i = 0; i < RX_RING_SIZE; i++) { 1169 lp->rx_buf_ptr_cpu[i] = 1170 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1171 2 * i * RX_BUFF_SIZE); 1172 lp->rx_buf_ptr_lnc[i] = 1173 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1174 } 1175 for (i = 0; i < TX_RING_SIZE; i++) { 1176 lp->tx_buf_ptr_cpu[i] = 1177 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1178 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1179 2 * i * TX_BUFF_SIZE); 1180 lp->tx_buf_ptr_lnc[i] = 1181 (BUF_OFFSET_LNC + 1182 RX_RING_SIZE * RX_BUFF_SIZE + 1183 i * TX_BUFF_SIZE); 1184 } 1185 1186 break; 1187 1188 default: 1189 printk(KERN_ERR "%s: declance_init called with unknown type\n", 1190 name); 1191 ret = -ENODEV; 1192 goto err_out_dev; 1193 } 1194 1195 ll = (struct lance_regs *) dev->base_addr; 1196 esar = (unsigned char *) esar_base; 1197 1198 /* prom checks */ 1199 /* First, check for test pattern */ 1200 if (esar[0x60] != 0xff && esar[0x64] != 0x00 && 1201 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) { 1202 printk(KERN_ERR 1203 "%s: Ethernet station address prom not found!\n", 1204 name); 1205 ret = -ENODEV; 1206 goto err_out_resource; 1207 } 1208 /* Check the prom contents */ 1209 for (i = 0; i < 8; i++) { 1210 if (esar[i * 4] != esar[0x3c - i * 4] && 1211 esar[i * 4] != esar[0x40 + i * 4] && 1212 esar[0x3c - i * 4] != esar[0x40 + i * 4]) { 1213 printk(KERN_ERR "%s: Something is wrong with the " 1214 "ethernet station address prom!\n", name); 1215 ret = -ENODEV; 1216 goto err_out_resource; 1217 } 1218 } 1219 1220 /* Copy the ethernet address to the device structure, later to the 1221 * lance initialization block so the lance gets it every time it's 1222 * (re)initialized. 1223 */ 1224 switch (type) { 1225 case ASIC_LANCE: 1226 printk("%s: IOASIC onboard LANCE, addr = ", name); 1227 break; 1228 case PMAD_LANCE: 1229 printk("%s: PMAD-AA, addr = ", name); 1230 break; 1231 case PMAX_LANCE: 1232 printk("%s: PMAX onboard LANCE, addr = ", name); 1233 break; 1234 } 1235 for (i = 0; i < 6; i++) { 1236 dev->dev_addr[i] = esar[i * 4]; 1237 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':'); 1238 } 1239 1240 printk(" irq = %d\n", dev->irq); 1241 1242 dev->open = &lance_open; 1243 dev->stop = &lance_close; 1244 dev->hard_start_xmit = &lance_start_xmit; 1245 dev->tx_timeout = &lance_tx_timeout; 1246 dev->watchdog_timeo = 5*HZ; 1247 dev->get_stats = &lance_get_stats; 1248 dev->set_multicast_list = &lance_set_multicast; 1249 1250 /* lp->ll is the location of the registers for lance card */ 1251 lp->ll = ll; 1252 1253 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA 1254 * specification. 1255 */ 1256 lp->busmaster_regval = 0; 1257 1258 dev->dma = 0; 1259 1260 /* We cannot sleep if the chip is busy during a 1261 * multicast list update event, because such events 1262 * can occur from interrupts (ex. IPv6). So we 1263 * use a timer to try again later when necessary. -DaveM 1264 */ 1265 init_timer(&lp->multicast_timer); 1266 lp->multicast_timer.data = (unsigned long) dev; 1267 lp->multicast_timer.function = &lance_set_multicast_retry; 1268 1269 ret = register_netdev(dev); 1270 if (ret) { 1271 printk(KERN_ERR 1272 "%s: Unable to register netdev, aborting.\n", name); 1273 goto err_out_resource; 1274 } 1275 1276 if (!bdev) { 1277 lp->next = root_lance_dev; 1278 root_lance_dev = dev; 1279 } 1280 1281 printk("%s: registered as %s.\n", name, dev->name); 1282 return 0; 1283 1284err_out_resource: 1285 if (bdev) 1286 release_mem_region(start, len); 1287 1288err_out_dev: 1289 free_netdev(dev); 1290 1291err_out: 1292 return ret; 1293} 1294 1295static void __exit dec_lance_remove(struct device *bdev) 1296{ 1297 struct net_device *dev = dev_get_drvdata(bdev); 1298 resource_size_t start, len; 1299 1300 unregister_netdev(dev); 1301 start = to_tc_dev(bdev)->resource.start; 1302 len = to_tc_dev(bdev)->resource.end - start + 1; 1303 release_mem_region(start, len); 1304 free_netdev(dev); 1305} 1306 1307/* Find all the lance cards on the system and initialize them */ 1308static int __init dec_lance_platform_probe(void) 1309{ 1310 int count = 0; 1311 1312 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) { 1313 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) { 1314 if (dec_lance_probe(NULL, ASIC_LANCE) >= 0) 1315 count++; 1316 } else if (!TURBOCHANNEL) { 1317 if (dec_lance_probe(NULL, PMAX_LANCE) >= 0) 1318 count++; 1319 } 1320 } 1321 1322 return (count > 0) ? 0 : -ENODEV; 1323} 1324 1325static void __exit dec_lance_platform_remove(void) 1326{ 1327 while (root_lance_dev) { 1328 struct net_device *dev = root_lance_dev; 1329 struct lance_private *lp = netdev_priv(dev); 1330 1331 unregister_netdev(dev); 1332 root_lance_dev = lp->next; 1333 free_netdev(dev); 1334 } 1335} 1336 1337#ifdef CONFIG_TC 1338static int __init dec_lance_tc_probe(struct device *dev); 1339static int __exit dec_lance_tc_remove(struct device *dev); 1340 1341static const struct tc_device_id dec_lance_tc_table[] = { 1342 { "DEC ", "PMAD-AA " }, 1343 { } 1344}; 1345MODULE_DEVICE_TABLE(tc, dec_lance_tc_table); 1346 1347static struct tc_driver dec_lance_tc_driver = { 1348 .id_table = dec_lance_tc_table, 1349 .driver = { 1350 .name = "declance", 1351 .bus = &tc_bus_type, 1352 .probe = dec_lance_tc_probe, 1353 .remove = __exit_p(dec_lance_tc_remove), 1354 }, 1355}; 1356 1357static int __init dec_lance_tc_probe(struct device *dev) 1358{ 1359 int status = dec_lance_probe(dev, PMAD_LANCE); 1360 if (!status) 1361 get_device(dev); 1362 return status; 1363} 1364 1365static int __exit dec_lance_tc_remove(struct device *dev) 1366{ 1367 put_device(dev); 1368 dec_lance_remove(dev); 1369 return 0; 1370} 1371#endif 1372 1373static int __init dec_lance_init(void) 1374{ 1375 int status; 1376 1377 status = tc_register_driver(&dec_lance_tc_driver); 1378 if (!status) 1379 dec_lance_platform_probe(); 1380 return status; 1381} 1382 1383static void __exit dec_lance_exit(void) 1384{ 1385 dec_lance_platform_remove(); 1386 tc_unregister_driver(&dec_lance_tc_driver); 1387} 1388 1389 1390module_init(dec_lance_init); 1391module_exit(dec_lance_exit);