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Linux kernel mirror (for testing)
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1/************************************************************************
2 *
3 * macros.h
4 *
5 * (c) Copyright 2001-2003 Analog Devices, Inc. All rights reserved.
6 *
7 ************************************************************************/
8
9/* Defines various assembly macros. */
10
11#ifndef _MACROS_H
12#define _MACROS_H
13
14#define LO(con32) ((con32) & 0xFFFF)
15#define lo(con32) ((con32) & 0xFFFF)
16#define HI(con32) (((con32) >> 16) & 0xFFFF)
17#define hi(con32) (((con32) >> 16) & 0xFFFF)
18
19/*
20 * Set the corresponding bits in a System Register (SR);
21 * All bits set in "mask" will be set in the system register
22 * specified by "sys_reg" bitset_SR(sys_reg, mask), where
23 * sys_reg is the system register and mask are the bits to be set.
24 */
25#define bitset_SR(sys_reg, mask)\
26 [--SP] = (R7:6);\
27 r7 = sys_reg;\
28 r6.l = (mask) & 0xffff;\
29 r6.h = (mask) >> 16;\
30 r7 = r7 | r6;\
31 sys_reg = r7;\
32 csync;\
33 (R7:6) = [SP++]
34
35/*
36 * Clear the corresponding bits in a System Register (SR);
37 * All bits set in "mask" will be cleared in the SR
38 * specified by "sys_reg" bitclr_SR(sys_reg, mask), where
39 * sys_reg is the SR and mask are the bits to be cleared.
40 */
41#define bitclr_SR(sys_reg, mask)\
42 [--SP] = (R7:6);\
43 r7 = sys_reg;\
44 r7 =~ r7;\
45 r6.l = (mask) & 0xffff;\
46 r6.h = (mask) >> 16;\
47 r7 = r7 | r6;\
48 r7 =~ r7;\
49 sys_reg = r7;\
50 csync;\
51 (R7:6) = [SP++]
52
53/*
54 * Set the corresponding bits in a Memory Mapped Register (MMR);
55 * All bits set in "mask" will be set in the MMR specified by "mmr_reg"
56 * bitset_MMR(mmr_reg, mask), where mmr_reg is the MMR and mask are
57 * the bits to be set.
58 */
59#define bitset_MMR(mmr_reg, mask)\
60 [--SP] = (R7:6);\
61 [--SP] = P5;\
62 p5.l = mmr_reg & 0xffff;\
63 p5.h = mmr_reg >> 16;\
64 r7 = [p5];\
65 r6.l = (mask) & 0xffff;\
66 r6.h = (mask) >> 16;\
67 r7 = r7 | r6;\
68 [p5] = r7;\
69 csync;\
70 p5 = [SP++];\
71 (R7:6) = [SP++]
72
73/*
74 * Clear the corresponding bits in a Memory Mapped Register (MMR);
75 * All bits set in "mask" will be cleared in the MMR specified by "mmr_reg"
76 * bitclr_MMRreg(mmr_reg, mask), where sys_reg is the MMR and mask are
77 * the bits to be cleared.
78 */
79#define bitclr_MMR(mmr_reg, mask)\
80 [--SP] = (R7:6);\
81 [--SP] = P5;\
82 p5.l = mmr_reg & 0xffff;\
83 p5.h = mmr_reg >> 16;\
84 r7 = [p5];\
85 r7 =~ r7;\
86 r6.l = (mask) & 0xffff;\
87 r6.h = (mask) >> 16;\
88 r7 = r7 | r6;\
89 r7 =~ r7;\
90 [p5] = r7;\
91 csync;\
92 p5 = [SP++];\
93 (R7:6) = [SP++]
94
95#endif /* _MACROS_H */