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1/* 2 * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux. 3 * 4 * Based on skelton.c by Donald Becker. 5 * 6 * This driver is a replacement of older and less maintained version. 7 * This is a header of the older version: 8 * -----<snip>----- 9 * Copyright 2001 MontaVista Software Inc. 10 * Author: MontaVista Software, Inc. 11 * ahennessy@mvista.com 12 * Copyright (C) 2000-2001 Toshiba Corporation 13 * static const char *version = 14 * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n"; 15 * -----<snip>----- 16 * 17 * This file is subject to the terms and conditions of the GNU General Public 18 * License. See the file "COPYING" in the main directory of this archive 19 * for more details. 20 * 21 * (C) Copyright TOSHIBA CORPORATION 2004-2005 22 * All Rights Reserved. 23 */ 24 25#ifdef TC35815_NAPI 26#define DRV_VERSION "1.35-NAPI" 27#else 28#define DRV_VERSION "1.35" 29#endif 30static const char *version = "tc35815.c:v" DRV_VERSION "\n"; 31#define MODNAME "tc35815" 32 33#include <linux/module.h> 34#include <linux/kernel.h> 35#include <linux/types.h> 36#include <linux/fcntl.h> 37#include <linux/interrupt.h> 38#include <linux/ioport.h> 39#include <linux/in.h> 40#include <linux/slab.h> 41#include <linux/string.h> 42#include <linux/spinlock.h> 43#include <linux/errno.h> 44#include <linux/init.h> 45#include <linux/netdevice.h> 46#include <linux/etherdevice.h> 47#include <linux/skbuff.h> 48#include <linux/delay.h> 49#include <linux/pci.h> 50#include <linux/mii.h> 51#include <linux/ethtool.h> 52#include <asm/io.h> 53#include <asm/byteorder.h> 54 55/* First, a few definitions that the brave might change. */ 56 57#define GATHER_TXINT /* On-Demand Tx Interrupt */ 58#define WORKAROUND_LOSTCAR 59#define WORKAROUND_100HALF_PROMISC 60/* #define TC35815_USE_PACKEDBUFFER */ 61 62typedef enum { 63 TC35815CF = 0, 64 TC35815_NWU, 65 TC35815_TX4939, 66} board_t; 67 68/* indexed by board_t, above */ 69static const struct { 70 const char *name; 71} board_info[] __devinitdata = { 72 { "TOSHIBA TC35815CF 10/100BaseTX" }, 73 { "TOSHIBA TC35815 with Wake on LAN" }, 74 { "TOSHIBA TC35815/TX4939" }, 75}; 76 77static const struct pci_device_id tc35815_pci_tbl[] = { 78 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF }, 79 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU }, 80 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 }, 81 {0,} 82}; 83MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl); 84 85/* see MODULE_PARM_DESC */ 86static struct tc35815_options { 87 int speed; 88 int duplex; 89 int doforce; 90} options; 91 92/* 93 * Registers 94 */ 95struct tc35815_regs { 96 volatile __u32 DMA_Ctl; /* 0x00 */ 97 volatile __u32 TxFrmPtr; 98 volatile __u32 TxThrsh; 99 volatile __u32 TxPollCtr; 100 volatile __u32 BLFrmPtr; 101 volatile __u32 RxFragSize; 102 volatile __u32 Int_En; 103 volatile __u32 FDA_Bas; 104 volatile __u32 FDA_Lim; /* 0x20 */ 105 volatile __u32 Int_Src; 106 volatile __u32 unused0[2]; 107 volatile __u32 PauseCnt; 108 volatile __u32 RemPauCnt; 109 volatile __u32 TxCtlFrmStat; 110 volatile __u32 unused1; 111 volatile __u32 MAC_Ctl; /* 0x40 */ 112 volatile __u32 CAM_Ctl; 113 volatile __u32 Tx_Ctl; 114 volatile __u32 Tx_Stat; 115 volatile __u32 Rx_Ctl; 116 volatile __u32 Rx_Stat; 117 volatile __u32 MD_Data; 118 volatile __u32 MD_CA; 119 volatile __u32 CAM_Adr; /* 0x60 */ 120 volatile __u32 CAM_Data; 121 volatile __u32 CAM_Ena; 122 volatile __u32 PROM_Ctl; 123 volatile __u32 PROM_Data; 124 volatile __u32 Algn_Cnt; 125 volatile __u32 CRC_Cnt; 126 volatile __u32 Miss_Cnt; 127}; 128 129/* 130 * Bit assignments 131 */ 132/* DMA_Ctl bit asign ------------------------------------------------------- */ 133#define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */ 134#define DMA_RxAlign_1 0x00400000 135#define DMA_RxAlign_2 0x00800000 136#define DMA_RxAlign_3 0x00c00000 137#define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */ 138#define DMA_IntMask 0x00040000 /* 1:Interupt mask */ 139#define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */ 140#define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */ 141#define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */ 142#define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */ 143#define DMA_TestMode 0x00002000 /* 1:Test Mode */ 144#define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */ 145#define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */ 146 147/* RxFragSize bit asign ---------------------------------------------------- */ 148#define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */ 149#define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */ 150 151/* MAC_Ctl bit asign ------------------------------------------------------- */ 152#define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */ 153#define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */ 154#define MAC_MissRoll 0x00000400 /* 1:Missed Roll */ 155#define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */ 156#define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */ 157#define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/ 158#define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */ 159#define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */ 160#define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */ 161#define MAC_Reset 0x00000004 /* 1:Software Reset */ 162#define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */ 163#define MAC_HaltReq 0x00000001 /* 1:Halt request */ 164 165/* PROM_Ctl bit asign ------------------------------------------------------ */ 166#define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */ 167#define PROM_Read 0x00004000 /*10:Read operation */ 168#define PROM_Write 0x00002000 /*01:Write operation */ 169#define PROM_Erase 0x00006000 /*11:Erase operation */ 170 /*00:Enable or Disable Writting, */ 171 /* as specified in PROM_Addr. */ 172#define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */ 173 /*00xxxx: disable */ 174 175/* CAM_Ctl bit asign ------------------------------------------------------- */ 176#define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */ 177#define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/ 178 /* accept other */ 179#define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */ 180#define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */ 181#define CAM_StationAcc 0x00000001 /* 1:unicast accept */ 182 183/* CAM_Ena bit asign ------------------------------------------------------- */ 184#define CAM_ENTRY_MAX 21 /* CAM Data entry max count */ 185#define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */ 186#define CAM_Ena_Bit(index) (1<<(index)) 187#define CAM_ENTRY_DESTINATION 0 188#define CAM_ENTRY_SOURCE 1 189#define CAM_ENTRY_MACCTL 20 190 191/* Tx_Ctl bit asign -------------------------------------------------------- */ 192#define Tx_En 0x00000001 /* 1:Transmit enable */ 193#define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */ 194#define Tx_NoPad 0x00000004 /* 1:Suppress Padding */ 195#define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */ 196#define Tx_FBack 0x00000010 /* 1:Fast Back-off */ 197#define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */ 198#define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */ 199#define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */ 200#define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */ 201#define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */ 202#define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */ 203#define Tx_EnComp 0x00004000 /* 1:Enable Completion */ 204 205/* Tx_Stat bit asign ------------------------------------------------------- */ 206#define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */ 207#define Tx_ExColl 0x00000010 /* Excessive Collision */ 208#define Tx_TXDefer 0x00000020 /* Transmit Defered */ 209#define Tx_Paused 0x00000040 /* Transmit Paused */ 210#define Tx_IntTx 0x00000080 /* Interrupt on Tx */ 211#define Tx_Under 0x00000100 /* Underrun */ 212#define Tx_Defer 0x00000200 /* Deferral */ 213#define Tx_NCarr 0x00000400 /* No Carrier */ 214#define Tx_10Stat 0x00000800 /* 10Mbps Status */ 215#define Tx_LateColl 0x00001000 /* Late Collision */ 216#define Tx_TxPar 0x00002000 /* Tx Parity Error */ 217#define Tx_Comp 0x00004000 /* Completion */ 218#define Tx_Halted 0x00008000 /* Tx Halted */ 219#define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */ 220 221/* Rx_Ctl bit asign -------------------------------------------------------- */ 222#define Rx_EnGood 0x00004000 /* 1:Enable Good */ 223#define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */ 224#define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */ 225#define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */ 226#define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */ 227#define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */ 228#define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */ 229#define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */ 230#define Rx_ShortEn 0x00000008 /* 1:Short Enable */ 231#define Rx_LongEn 0x00000004 /* 1:Long Enable */ 232#define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */ 233#define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */ 234 235/* Rx_Stat bit asign ------------------------------------------------------- */ 236#define Rx_Halted 0x00008000 /* Rx Halted */ 237#define Rx_Good 0x00004000 /* Rx Good */ 238#define Rx_RxPar 0x00002000 /* Rx Parity Error */ 239 /* 0x00001000 not use */ 240#define Rx_LongErr 0x00000800 /* Rx Long Error */ 241#define Rx_Over 0x00000400 /* Rx Overflow */ 242#define Rx_CRCErr 0x00000200 /* Rx CRC Error */ 243#define Rx_Align 0x00000100 /* Rx Alignment Error */ 244#define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */ 245#define Rx_IntRx 0x00000040 /* Rx Interrupt */ 246#define Rx_CtlRecd 0x00000020 /* Rx Control Receive */ 247 248#define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */ 249 250/* Int_En bit asign -------------------------------------------------------- */ 251#define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */ 252#define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */ 253#define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */ 254#define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */ 255#define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */ 256#define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */ 257#define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */ 258#define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */ 259#define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */ 260#define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */ 261#define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */ 262#define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */ 263 /* Exhausted Enable */ 264 265/* Int_Src bit asign ------------------------------------------------------- */ 266#define Int_NRabt 0x00004000 /* 1:Non Recoverable error */ 267#define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */ 268#define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */ 269#define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */ 270#define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */ 271#define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */ 272#define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */ 273#define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */ 274#define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */ 275#define Int_SWInt 0x00000020 /* 1:Software request & Clear */ 276#define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */ 277#define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */ 278#define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */ 279#define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */ 280#define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */ 281 282/* MD_CA bit asign --------------------------------------------------------- */ 283#define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */ 284#define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */ 285#define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */ 286 287 288/* 289 * Descriptors 290 */ 291 292/* Frame descripter */ 293struct FDesc { 294 volatile __u32 FDNext; 295 volatile __u32 FDSystem; 296 volatile __u32 FDStat; 297 volatile __u32 FDCtl; 298}; 299 300/* Buffer descripter */ 301struct BDesc { 302 volatile __u32 BuffData; 303 volatile __u32 BDCtl; 304}; 305 306#define FD_ALIGN 16 307 308/* Frame Descripter bit asign ---------------------------------------------- */ 309#define FD_FDLength_MASK 0x0000FFFF /* Length MASK */ 310#define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */ 311#define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */ 312#define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */ 313#define FD_FrmOpt_IntTx 0x20000000 /* Tx only */ 314#define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */ 315#define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */ 316#define FD_FrmOpt_Packing 0x04000000 /* Rx only */ 317#define FD_CownsFD 0x80000000 /* FD Controller owner bit */ 318#define FD_Next_EOL 0x00000001 /* FD EOL indicator */ 319#define FD_BDCnt_SHIFT 16 320 321/* Buffer Descripter bit asign --------------------------------------------- */ 322#define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */ 323#define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */ 324#define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */ 325#define BD_CownsBD 0x80000000 /* BD Controller owner bit */ 326#define BD_RxBDID_SHIFT 16 327#define BD_RxBDSeqN_SHIFT 24 328 329 330/* Some useful constants. */ 331#undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */ 332 333#ifdef NO_CHECK_CARRIER 334#define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \ 335 Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \ 336 Tx_En) /* maybe 0x7b01 */ 337#else 338#define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \ 339 Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \ 340 Tx_En) /* maybe 0x7b01 */ 341#endif 342#define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \ 343 | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */ 344#define INT_EN_CMD (Int_NRAbtEn | \ 345 Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \ 346 Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \ 347 Int_STargAbtEn | \ 348 Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/ 349#define DMA_CTL_CMD DMA_BURST_SIZE 350#define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF) 351 352/* Tuning parameters */ 353#define DMA_BURST_SIZE 32 354#define TX_THRESHOLD 1024 355#define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/ 356#define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */ 357 358/* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */ 359#ifdef TC35815_USE_PACKEDBUFFER 360#define FD_PAGE_NUM 2 361#define RX_BUF_NUM 8 /* >= 2 */ 362#define RX_FD_NUM 250 /* >= 32 */ 363#define TX_FD_NUM 128 364#define RX_BUF_SIZE PAGE_SIZE 365#else /* TC35815_USE_PACKEDBUFFER */ 366#define FD_PAGE_NUM 4 367#define RX_BUF_NUM 128 /* < 256 */ 368#define RX_FD_NUM 256 /* >= 32 */ 369#define TX_FD_NUM 128 370#if RX_CTL_CMD & Rx_LongEn 371#define RX_BUF_SIZE PAGE_SIZE 372#elif RX_CTL_CMD & Rx_StripCRC 373#define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */ 374#else 375#define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */ 376#endif 377#endif /* TC35815_USE_PACKEDBUFFER */ 378#define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */ 379#define NAPI_WEIGHT 16 380 381struct TxFD { 382 struct FDesc fd; 383 struct BDesc bd; 384 struct BDesc unused; 385}; 386 387struct RxFD { 388 struct FDesc fd; 389 struct BDesc bd[0]; /* variable length */ 390}; 391 392struct FrFD { 393 struct FDesc fd; 394 struct BDesc bd[RX_BUF_NUM]; 395}; 396 397 398#define tc_readl(addr) readl(addr) 399#define tc_writel(d, addr) writel(d, addr) 400 401#define TC35815_TX_TIMEOUT msecs_to_jiffies(400) 402 403/* Timer state engine. */ 404enum tc35815_timer_state { 405 arbwait = 0, /* Waiting for auto negotiation to complete. */ 406 lupwait = 1, /* Auto-neg complete, awaiting link-up status. */ 407 ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */ 408 asleep = 3, /* Time inactive. */ 409 lcheck = 4, /* Check link status. */ 410}; 411 412/* Information that need to be kept for each board. */ 413struct tc35815_local { 414 struct pci_dev *pci_dev; 415 416 /* statistics */ 417 struct net_device_stats stats; 418 struct { 419 int max_tx_qlen; 420 int tx_ints; 421 int rx_ints; 422 int tx_underrun; 423 } lstats; 424 425 /* Tx control lock. This protects the transmit buffer ring 426 * state along with the "tx full" state of the driver. This 427 * means all netif_queue flow control actions are protected 428 * by this lock as well. 429 */ 430 spinlock_t lock; 431 432 int phy_addr; 433 int fullduplex; 434 unsigned short saved_lpa; 435 struct timer_list timer; 436 enum tc35815_timer_state timer_state; /* State of auto-neg timer. */ 437 unsigned int timer_ticks; /* Number of clicks at each state */ 438 439 /* 440 * Transmitting: Batch Mode. 441 * 1 BD in 1 TxFD. 442 * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER) 443 * 1 circular FD for Free Buffer List. 444 * RX_BUF_NUM BD in Free Buffer FD. 445 * One Free Buffer BD has PAGE_SIZE data buffer. 446 * Or Non-Packing Mode. 447 * 1 circular FD for Free Buffer List. 448 * RX_BUF_NUM BD in Free Buffer FD. 449 * One Free Buffer BD has ETH_FRAME_LEN data buffer. 450 */ 451 void * fd_buf; /* for TxFD, RxFD, FrFD */ 452 dma_addr_t fd_buf_dma; 453 struct TxFD *tfd_base; 454 unsigned int tfd_start; 455 unsigned int tfd_end; 456 struct RxFD *rfd_base; 457 struct RxFD *rfd_limit; 458 struct RxFD *rfd_cur; 459 struct FrFD *fbl_ptr; 460#ifdef TC35815_USE_PACKEDBUFFER 461 unsigned char fbl_curid; 462 void * data_buf[RX_BUF_NUM]; /* packing */ 463 dma_addr_t data_buf_dma[RX_BUF_NUM]; 464 struct { 465 struct sk_buff *skb; 466 dma_addr_t skb_dma; 467 } tx_skbs[TX_FD_NUM]; 468#else 469 unsigned int fbl_count; 470 struct { 471 struct sk_buff *skb; 472 dma_addr_t skb_dma; 473 } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM]; 474#endif 475 struct mii_if_info mii; 476 unsigned short mii_id[2]; 477 u32 msg_enable; 478 board_t boardtype; 479}; 480 481static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt) 482{ 483 return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf); 484} 485#ifdef DEBUG 486static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus) 487{ 488 return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma)); 489} 490#endif 491#ifdef TC35815_USE_PACKEDBUFFER 492static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus) 493{ 494 int i; 495 for (i = 0; i < RX_BUF_NUM; i++) { 496 if (bus >= lp->data_buf_dma[i] && 497 bus < lp->data_buf_dma[i] + PAGE_SIZE) 498 return (void *)((u8 *)lp->data_buf[i] + 499 (bus - lp->data_buf_dma[i])); 500 } 501 return NULL; 502} 503 504#define TC35815_DMA_SYNC_ONDEMAND 505static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle) 506{ 507#ifdef TC35815_DMA_SYNC_ONDEMAND 508 void *buf; 509 /* pci_map + pci_dma_sync will be more effective than 510 * pci_alloc_consistent on some archs. */ 511 if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL) 512 return NULL; 513 *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE, 514 PCI_DMA_FROMDEVICE); 515 if (pci_dma_mapping_error(*dma_handle)) { 516 free_page((unsigned long)buf); 517 return NULL; 518 } 519 return buf; 520#else 521 return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle); 522#endif 523} 524 525static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle) 526{ 527#ifdef TC35815_DMA_SYNC_ONDEMAND 528 pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE); 529 free_page((unsigned long)buf); 530#else 531 pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle); 532#endif 533} 534#else /* TC35815_USE_PACKEDBUFFER */ 535static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev, 536 struct pci_dev *hwdev, 537 dma_addr_t *dma_handle) 538{ 539 struct sk_buff *skb; 540 skb = dev_alloc_skb(RX_BUF_SIZE); 541 if (!skb) 542 return NULL; 543 *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE, 544 PCI_DMA_FROMDEVICE); 545 if (pci_dma_mapping_error(*dma_handle)) { 546 dev_kfree_skb_any(skb); 547 return NULL; 548 } 549 skb_reserve(skb, 2); /* make IP header 4byte aligned */ 550 return skb; 551} 552 553static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle) 554{ 555 pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE, 556 PCI_DMA_FROMDEVICE); 557 dev_kfree_skb_any(skb); 558} 559#endif /* TC35815_USE_PACKEDBUFFER */ 560 561/* Index to functions, as function prototypes. */ 562 563static int tc35815_open(struct net_device *dev); 564static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev); 565static irqreturn_t tc35815_interrupt(int irq, void *dev_id); 566#ifdef TC35815_NAPI 567static int tc35815_rx(struct net_device *dev, int limit); 568static int tc35815_poll(struct net_device *dev, int *budget); 569#else 570static void tc35815_rx(struct net_device *dev); 571#endif 572static void tc35815_txdone(struct net_device *dev); 573static int tc35815_close(struct net_device *dev); 574static struct net_device_stats *tc35815_get_stats(struct net_device *dev); 575static void tc35815_set_multicast_list(struct net_device *dev); 576static void tc35815_tx_timeout(struct net_device *dev); 577static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 578#ifdef CONFIG_NET_POLL_CONTROLLER 579static void tc35815_poll_controller(struct net_device *dev); 580#endif 581static const struct ethtool_ops tc35815_ethtool_ops; 582 583/* Example routines you must write ;->. */ 584static void tc35815_chip_reset(struct net_device *dev); 585static void tc35815_chip_init(struct net_device *dev); 586static void tc35815_find_phy(struct net_device *dev); 587static void tc35815_phy_chip_init(struct net_device *dev); 588 589#ifdef DEBUG 590static void panic_queues(struct net_device *dev); 591#endif 592 593static void tc35815_timer(unsigned long data); 594static void tc35815_start_auto_negotiation(struct net_device *dev, 595 struct ethtool_cmd *ep); 596static int tc_mdio_read(struct net_device *dev, int phy_id, int location); 597static void tc_mdio_write(struct net_device *dev, int phy_id, int location, 598 int val); 599 600static void __devinit tc35815_init_dev_addr (struct net_device *dev) 601{ 602 struct tc35815_regs __iomem *tr = 603 (struct tc35815_regs __iomem *)dev->base_addr; 604 int i; 605 606 /* dev_addr will be overwritten on NETDEV_REGISTER event */ 607 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy) 608 ; 609 for (i = 0; i < 6; i += 2) { 610 unsigned short data; 611 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl); 612 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy) 613 ; 614 data = tc_readl(&tr->PROM_Data); 615 dev->dev_addr[i] = data & 0xff; 616 dev->dev_addr[i+1] = data >> 8; 617 } 618} 619 620static int __devinit tc35815_init_one (struct pci_dev *pdev, 621 const struct pci_device_id *ent) 622{ 623 void __iomem *ioaddr = NULL; 624 struct net_device *dev; 625 struct tc35815_local *lp; 626 int rc; 627 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; 628 629 static int printed_version; 630 if (!printed_version++) { 631 printk(version); 632 dev_printk(KERN_DEBUG, &pdev->dev, 633 "speed:%d duplex:%d doforce:%d\n", 634 options.speed, options.duplex, options.doforce); 635 } 636 637 if (!pdev->irq) { 638 dev_warn(&pdev->dev, "no IRQ assigned.\n"); 639 return -ENODEV; 640 } 641 642 /* dev zeroed in alloc_etherdev */ 643 dev = alloc_etherdev (sizeof (*lp)); 644 if (dev == NULL) { 645 dev_err(&pdev->dev, "unable to alloc new ethernet\n"); 646 return -ENOMEM; 647 } 648 SET_MODULE_OWNER(dev); 649 SET_NETDEV_DEV(dev, &pdev->dev); 650 lp = dev->priv; 651 652 /* enable device (incl. PCI PM wakeup), and bus-mastering */ 653 rc = pci_enable_device (pdev); 654 if (rc) 655 goto err_out; 656 657 mmio_start = pci_resource_start (pdev, 1); 658 mmio_end = pci_resource_end (pdev, 1); 659 mmio_flags = pci_resource_flags (pdev, 1); 660 mmio_len = pci_resource_len (pdev, 1); 661 662 /* set this immediately, we need to know before 663 * we talk to the chip directly */ 664 665 /* make sure PCI base addr 1 is MMIO */ 666 if (!(mmio_flags & IORESOURCE_MEM)) { 667 dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n"); 668 rc = -ENODEV; 669 goto err_out; 670 } 671 672 /* check for weird/broken PCI region reporting */ 673 if ((mmio_len < sizeof(struct tc35815_regs))) { 674 dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n"); 675 rc = -ENODEV; 676 goto err_out; 677 } 678 679 rc = pci_request_regions (pdev, MODNAME); 680 if (rc) 681 goto err_out; 682 683 pci_set_master (pdev); 684 685 /* ioremap MMIO region */ 686 ioaddr = ioremap (mmio_start, mmio_len); 687 if (ioaddr == NULL) { 688 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); 689 rc = -EIO; 690 goto err_out_free_res; 691 } 692 693 /* Initialize the device structure. */ 694 dev->open = tc35815_open; 695 dev->hard_start_xmit = tc35815_send_packet; 696 dev->stop = tc35815_close; 697 dev->get_stats = tc35815_get_stats; 698 dev->set_multicast_list = tc35815_set_multicast_list; 699 dev->do_ioctl = tc35815_ioctl; 700 dev->ethtool_ops = &tc35815_ethtool_ops; 701 dev->tx_timeout = tc35815_tx_timeout; 702 dev->watchdog_timeo = TC35815_TX_TIMEOUT; 703#ifdef TC35815_NAPI 704 dev->poll = tc35815_poll; 705 dev->weight = NAPI_WEIGHT; 706#endif 707#ifdef CONFIG_NET_POLL_CONTROLLER 708 dev->poll_controller = tc35815_poll_controller; 709#endif 710 711 dev->irq = pdev->irq; 712 dev->base_addr = (unsigned long) ioaddr; 713 714 /* dev->priv/lp zeroed and aligned in alloc_etherdev */ 715 lp = dev->priv; 716 spin_lock_init(&lp->lock); 717 lp->pci_dev = pdev; 718 lp->boardtype = ent->driver_data; 719 720 lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK; 721 pci_set_drvdata(pdev, dev); 722 723 /* Soft reset the chip. */ 724 tc35815_chip_reset(dev); 725 726 /* Retrieve the ethernet address. */ 727 tc35815_init_dev_addr(dev); 728 729 rc = register_netdev (dev); 730 if (rc) 731 goto err_out_unmap; 732 733 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); 734 printk(KERN_INFO "%s: %s at 0x%lx, " 735 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " 736 "IRQ %d\n", 737 dev->name, 738 board_info[ent->driver_data].name, 739 dev->base_addr, 740 dev->dev_addr[0], dev->dev_addr[1], 741 dev->dev_addr[2], dev->dev_addr[3], 742 dev->dev_addr[4], dev->dev_addr[5], 743 dev->irq); 744 745 setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev); 746 lp->mii.dev = dev; 747 lp->mii.mdio_read = tc_mdio_read; 748 lp->mii.mdio_write = tc_mdio_write; 749 lp->mii.phy_id_mask = 0x1f; 750 lp->mii.reg_num_mask = 0x1f; 751 tc35815_find_phy(dev); 752 lp->mii.phy_id = lp->phy_addr; 753 lp->mii.full_duplex = 0; 754 lp->mii.force_media = 0; 755 756 return 0; 757 758err_out_unmap: 759 iounmap(ioaddr); 760err_out_free_res: 761 pci_release_regions (pdev); 762err_out: 763 free_netdev (dev); 764 return rc; 765} 766 767 768static void __devexit tc35815_remove_one (struct pci_dev *pdev) 769{ 770 struct net_device *dev = pci_get_drvdata (pdev); 771 unsigned long mmio_addr; 772 773 mmio_addr = dev->base_addr; 774 775 unregister_netdev (dev); 776 777 if (mmio_addr) { 778 iounmap ((void __iomem *)mmio_addr); 779 pci_release_regions (pdev); 780 } 781 782 free_netdev (dev); 783 784 pci_set_drvdata (pdev, NULL); 785} 786 787static int 788tc35815_init_queues(struct net_device *dev) 789{ 790 struct tc35815_local *lp = dev->priv; 791 int i; 792 unsigned long fd_addr; 793 794 if (!lp->fd_buf) { 795 BUG_ON(sizeof(struct FDesc) + 796 sizeof(struct BDesc) * RX_BUF_NUM + 797 sizeof(struct FDesc) * RX_FD_NUM + 798 sizeof(struct TxFD) * TX_FD_NUM > 799 PAGE_SIZE * FD_PAGE_NUM); 800 801 if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0) 802 return -ENOMEM; 803 for (i = 0; i < RX_BUF_NUM; i++) { 804#ifdef TC35815_USE_PACKEDBUFFER 805 if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) { 806 while (--i >= 0) { 807 free_rxbuf_page(lp->pci_dev, 808 lp->data_buf[i], 809 lp->data_buf_dma[i]); 810 lp->data_buf[i] = NULL; 811 } 812 pci_free_consistent(lp->pci_dev, 813 PAGE_SIZE * FD_PAGE_NUM, 814 lp->fd_buf, 815 lp->fd_buf_dma); 816 lp->fd_buf = NULL; 817 return -ENOMEM; 818 } 819#else 820 lp->rx_skbs[i].skb = 821 alloc_rxbuf_skb(dev, lp->pci_dev, 822 &lp->rx_skbs[i].skb_dma); 823 if (!lp->rx_skbs[i].skb) { 824 while (--i >= 0) { 825 free_rxbuf_skb(lp->pci_dev, 826 lp->rx_skbs[i].skb, 827 lp->rx_skbs[i].skb_dma); 828 lp->rx_skbs[i].skb = NULL; 829 } 830 pci_free_consistent(lp->pci_dev, 831 PAGE_SIZE * FD_PAGE_NUM, 832 lp->fd_buf, 833 lp->fd_buf_dma); 834 lp->fd_buf = NULL; 835 return -ENOMEM; 836 } 837#endif 838 } 839 printk(KERN_DEBUG "%s: FD buf %p DataBuf", 840 dev->name, lp->fd_buf); 841#ifdef TC35815_USE_PACKEDBUFFER 842 printk(" DataBuf"); 843 for (i = 0; i < RX_BUF_NUM; i++) 844 printk(" %p", lp->data_buf[i]); 845#endif 846 printk("\n"); 847 } else { 848 for (i = 0; i < FD_PAGE_NUM; i++) { 849 clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE)); 850 } 851 } 852 fd_addr = (unsigned long)lp->fd_buf; 853 854 /* Free Descriptors (for Receive) */ 855 lp->rfd_base = (struct RxFD *)fd_addr; 856 fd_addr += sizeof(struct RxFD) * RX_FD_NUM; 857 for (i = 0; i < RX_FD_NUM; i++) { 858 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD); 859 } 860 lp->rfd_cur = lp->rfd_base; 861 lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1); 862 863 /* Transmit Descriptors */ 864 lp->tfd_base = (struct TxFD *)fd_addr; 865 fd_addr += sizeof(struct TxFD) * TX_FD_NUM; 866 for (i = 0; i < TX_FD_NUM; i++) { 867 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1])); 868 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff); 869 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0); 870 } 871 lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0])); 872 lp->tfd_start = 0; 873 lp->tfd_end = 0; 874 875 /* Buffer List (for Receive) */ 876 lp->fbl_ptr = (struct FrFD *)fd_addr; 877 lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr)); 878 lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD); 879#ifndef TC35815_USE_PACKEDBUFFER 880 /* 881 * move all allocated skbs to head of rx_skbs[] array. 882 * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in 883 * tc35815_rx() had failed. 884 */ 885 lp->fbl_count = 0; 886 for (i = 0; i < RX_BUF_NUM; i++) { 887 if (lp->rx_skbs[i].skb) { 888 if (i != lp->fbl_count) { 889 lp->rx_skbs[lp->fbl_count].skb = 890 lp->rx_skbs[i].skb; 891 lp->rx_skbs[lp->fbl_count].skb_dma = 892 lp->rx_skbs[i].skb_dma; 893 } 894 lp->fbl_count++; 895 } 896 } 897#endif 898 for (i = 0; i < RX_BUF_NUM; i++) { 899#ifdef TC35815_USE_PACKEDBUFFER 900 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]); 901#else 902 if (i >= lp->fbl_count) { 903 lp->fbl_ptr->bd[i].BuffData = 0; 904 lp->fbl_ptr->bd[i].BDCtl = 0; 905 continue; 906 } 907 lp->fbl_ptr->bd[i].BuffData = 908 cpu_to_le32(lp->rx_skbs[i].skb_dma); 909#endif 910 /* BDID is index of FrFD.bd[] */ 911 lp->fbl_ptr->bd[i].BDCtl = 912 cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) | 913 RX_BUF_SIZE); 914 } 915#ifdef TC35815_USE_PACKEDBUFFER 916 lp->fbl_curid = 0; 917#endif 918 919 printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n", 920 dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr); 921 return 0; 922} 923 924static void 925tc35815_clear_queues(struct net_device *dev) 926{ 927 struct tc35815_local *lp = dev->priv; 928 int i; 929 930 for (i = 0; i < TX_FD_NUM; i++) { 931 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem); 932 struct sk_buff *skb = 933 fdsystem != 0xffffffff ? 934 lp->tx_skbs[fdsystem].skb : NULL; 935#ifdef DEBUG 936 if (lp->tx_skbs[i].skb != skb) { 937 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i); 938 panic_queues(dev); 939 } 940#else 941 BUG_ON(lp->tx_skbs[i].skb != skb); 942#endif 943 if (skb) { 944 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE); 945 lp->tx_skbs[i].skb = NULL; 946 lp->tx_skbs[i].skb_dma = 0; 947 dev_kfree_skb_any(skb); 948 } 949 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff); 950 } 951 952 tc35815_init_queues(dev); 953} 954 955static void 956tc35815_free_queues(struct net_device *dev) 957{ 958 struct tc35815_local *lp = dev->priv; 959 int i; 960 961 if (lp->tfd_base) { 962 for (i = 0; i < TX_FD_NUM; i++) { 963 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem); 964 struct sk_buff *skb = 965 fdsystem != 0xffffffff ? 966 lp->tx_skbs[fdsystem].skb : NULL; 967#ifdef DEBUG 968 if (lp->tx_skbs[i].skb != skb) { 969 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i); 970 panic_queues(dev); 971 } 972#else 973 BUG_ON(lp->tx_skbs[i].skb != skb); 974#endif 975 if (skb) { 976 dev_kfree_skb(skb); 977 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE); 978 lp->tx_skbs[i].skb = NULL; 979 lp->tx_skbs[i].skb_dma = 0; 980 } 981 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff); 982 } 983 } 984 985 lp->rfd_base = NULL; 986 lp->rfd_limit = NULL; 987 lp->rfd_cur = NULL; 988 lp->fbl_ptr = NULL; 989 990 for (i = 0; i < RX_BUF_NUM; i++) { 991#ifdef TC35815_USE_PACKEDBUFFER 992 if (lp->data_buf[i]) { 993 free_rxbuf_page(lp->pci_dev, 994 lp->data_buf[i], lp->data_buf_dma[i]); 995 lp->data_buf[i] = NULL; 996 } 997#else 998 if (lp->rx_skbs[i].skb) { 999 free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb, 1000 lp->rx_skbs[i].skb_dma); 1001 lp->rx_skbs[i].skb = NULL; 1002 } 1003#endif 1004 } 1005 if (lp->fd_buf) { 1006 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, 1007 lp->fd_buf, lp->fd_buf_dma); 1008 lp->fd_buf = NULL; 1009 } 1010} 1011 1012static void 1013dump_txfd(struct TxFD *fd) 1014{ 1015 printk("TxFD(%p): %08x %08x %08x %08x\n", fd, 1016 le32_to_cpu(fd->fd.FDNext), 1017 le32_to_cpu(fd->fd.FDSystem), 1018 le32_to_cpu(fd->fd.FDStat), 1019 le32_to_cpu(fd->fd.FDCtl)); 1020 printk("BD: "); 1021 printk(" %08x %08x", 1022 le32_to_cpu(fd->bd.BuffData), 1023 le32_to_cpu(fd->bd.BDCtl)); 1024 printk("\n"); 1025} 1026 1027static int 1028dump_rxfd(struct RxFD *fd) 1029{ 1030 int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT; 1031 if (bd_count > 8) 1032 bd_count = 8; 1033 printk("RxFD(%p): %08x %08x %08x %08x\n", fd, 1034 le32_to_cpu(fd->fd.FDNext), 1035 le32_to_cpu(fd->fd.FDSystem), 1036 le32_to_cpu(fd->fd.FDStat), 1037 le32_to_cpu(fd->fd.FDCtl)); 1038 if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD) 1039 return 0; 1040 printk("BD: "); 1041 for (i = 0; i < bd_count; i++) 1042 printk(" %08x %08x", 1043 le32_to_cpu(fd->bd[i].BuffData), 1044 le32_to_cpu(fd->bd[i].BDCtl)); 1045 printk("\n"); 1046 return bd_count; 1047} 1048 1049#if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER) 1050static void 1051dump_frfd(struct FrFD *fd) 1052{ 1053 int i; 1054 printk("FrFD(%p): %08x %08x %08x %08x\n", fd, 1055 le32_to_cpu(fd->fd.FDNext), 1056 le32_to_cpu(fd->fd.FDSystem), 1057 le32_to_cpu(fd->fd.FDStat), 1058 le32_to_cpu(fd->fd.FDCtl)); 1059 printk("BD: "); 1060 for (i = 0; i < RX_BUF_NUM; i++) 1061 printk(" %08x %08x", 1062 le32_to_cpu(fd->bd[i].BuffData), 1063 le32_to_cpu(fd->bd[i].BDCtl)); 1064 printk("\n"); 1065} 1066#endif 1067 1068#ifdef DEBUG 1069static void 1070panic_queues(struct net_device *dev) 1071{ 1072 struct tc35815_local *lp = dev->priv; 1073 int i; 1074 1075 printk("TxFD base %p, start %u, end %u\n", 1076 lp->tfd_base, lp->tfd_start, lp->tfd_end); 1077 printk("RxFD base %p limit %p cur %p\n", 1078 lp->rfd_base, lp->rfd_limit, lp->rfd_cur); 1079 printk("FrFD %p\n", lp->fbl_ptr); 1080 for (i = 0; i < TX_FD_NUM; i++) 1081 dump_txfd(&lp->tfd_base[i]); 1082 for (i = 0; i < RX_FD_NUM; i++) { 1083 int bd_count = dump_rxfd(&lp->rfd_base[i]); 1084 i += (bd_count + 1) / 2; /* skip BDs */ 1085 } 1086 dump_frfd(lp->fbl_ptr); 1087 panic("%s: Illegal queue state.", dev->name); 1088} 1089#endif 1090 1091static void print_eth(char *add) 1092{ 1093 int i; 1094 1095 printk("print_eth(%p)\n", add); 1096 for (i = 0; i < 6; i++) 1097 printk(" %2.2X", (unsigned char) add[i + 6]); 1098 printk(" =>"); 1099 for (i = 0; i < 6; i++) 1100 printk(" %2.2X", (unsigned char) add[i]); 1101 printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]); 1102} 1103 1104static int tc35815_tx_full(struct net_device *dev) 1105{ 1106 struct tc35815_local *lp = dev->priv; 1107 return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end); 1108} 1109 1110static void tc35815_restart(struct net_device *dev) 1111{ 1112 struct tc35815_local *lp = dev->priv; 1113 int pid = lp->phy_addr; 1114 int do_phy_reset = 1; 1115 del_timer(&lp->timer); /* Kill if running */ 1116 1117 if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) { 1118 /* Resetting PHY cause problem on some chip... (SEEQ 80221) */ 1119 do_phy_reset = 0; 1120 } 1121 if (do_phy_reset) { 1122 int timeout; 1123 tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET); 1124 timeout = 100; 1125 while (--timeout) { 1126 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET)) 1127 break; 1128 udelay(1); 1129 } 1130 if (!timeout) 1131 printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name); 1132 } 1133 1134 tc35815_chip_reset(dev); 1135 tc35815_clear_queues(dev); 1136 tc35815_chip_init(dev); 1137 /* Reconfigure CAM again since tc35815_chip_init() initialize it. */ 1138 tc35815_set_multicast_list(dev); 1139} 1140 1141static void tc35815_tx_timeout(struct net_device *dev) 1142{ 1143 struct tc35815_local *lp = dev->priv; 1144 struct tc35815_regs __iomem *tr = 1145 (struct tc35815_regs __iomem *)dev->base_addr; 1146 1147 printk(KERN_WARNING "%s: transmit timed out, status %#x\n", 1148 dev->name, tc_readl(&tr->Tx_Stat)); 1149 1150 /* Try to restart the adaptor. */ 1151 spin_lock_irq(&lp->lock); 1152 tc35815_restart(dev); 1153 spin_unlock_irq(&lp->lock); 1154 1155 lp->stats.tx_errors++; 1156 1157 /* If we have space available to accept new transmit 1158 * requests, wake up the queueing layer. This would 1159 * be the case if the chipset_init() call above just 1160 * flushes out the tx queue and empties it. 1161 * 1162 * If instead, the tx queue is retained then the 1163 * netif_wake_queue() call should be placed in the 1164 * TX completion interrupt handler of the driver instead 1165 * of here. 1166 */ 1167 if (!tc35815_tx_full(dev)) 1168 netif_wake_queue(dev); 1169} 1170 1171/* 1172 * Open/initialize the board. This is called (in the current kernel) 1173 * sometime after booting when the 'ifconfig' program is run. 1174 * 1175 * This routine should set everything up anew at each open, even 1176 * registers that "should" only need to be set once at boot, so that 1177 * there is non-reboot way to recover if something goes wrong. 1178 */ 1179static int 1180tc35815_open(struct net_device *dev) 1181{ 1182 struct tc35815_local *lp = dev->priv; 1183 1184 /* 1185 * This is used if the interrupt line can turned off (shared). 1186 * See 3c503.c for an example of selecting the IRQ at config-time. 1187 */ 1188 if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) { 1189 return -EAGAIN; 1190 } 1191 1192 del_timer(&lp->timer); /* Kill if running */ 1193 tc35815_chip_reset(dev); 1194 1195 if (tc35815_init_queues(dev) != 0) { 1196 free_irq(dev->irq, dev); 1197 return -EAGAIN; 1198 } 1199 1200 /* Reset the hardware here. Don't forget to set the station address. */ 1201 spin_lock_irq(&lp->lock); 1202 tc35815_chip_init(dev); 1203 spin_unlock_irq(&lp->lock); 1204 1205 /* We are now ready to accept transmit requeusts from 1206 * the queueing layer of the networking. 1207 */ 1208 netif_start_queue(dev); 1209 1210 return 0; 1211} 1212 1213/* This will only be invoked if your driver is _not_ in XOFF state. 1214 * What this means is that you need not check it, and that this 1215 * invariant will hold if you make sure that the netif_*_queue() 1216 * calls are done at the proper times. 1217 */ 1218static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev) 1219{ 1220 struct tc35815_local *lp = dev->priv; 1221 struct TxFD *txfd; 1222 unsigned long flags; 1223 1224 /* If some error occurs while trying to transmit this 1225 * packet, you should return '1' from this function. 1226 * In such a case you _may not_ do anything to the 1227 * SKB, it is still owned by the network queueing 1228 * layer when an error is returned. This means you 1229 * may not modify any SKB fields, you may not free 1230 * the SKB, etc. 1231 */ 1232 1233 /* This is the most common case for modern hardware. 1234 * The spinlock protects this code from the TX complete 1235 * hardware interrupt handler. Queue flow control is 1236 * thus managed under this lock as well. 1237 */ 1238 spin_lock_irqsave(&lp->lock, flags); 1239 1240 /* failsafe... (handle txdone now if half of FDs are used) */ 1241 if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM > 1242 TX_FD_NUM / 2) 1243 tc35815_txdone(dev); 1244 1245 if (netif_msg_pktdata(lp)) 1246 print_eth(skb->data); 1247#ifdef DEBUG 1248 if (lp->tx_skbs[lp->tfd_start].skb) { 1249 printk("%s: tx_skbs conflict.\n", dev->name); 1250 panic_queues(dev); 1251 } 1252#else 1253 BUG_ON(lp->tx_skbs[lp->tfd_start].skb); 1254#endif 1255 lp->tx_skbs[lp->tfd_start].skb = skb; 1256 lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE); 1257 1258 /*add to ring */ 1259 txfd = &lp->tfd_base[lp->tfd_start]; 1260 txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma); 1261 txfd->bd.BDCtl = cpu_to_le32(skb->len); 1262 txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start); 1263 txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT)); 1264 1265 if (lp->tfd_start == lp->tfd_end) { 1266 struct tc35815_regs __iomem *tr = 1267 (struct tc35815_regs __iomem *)dev->base_addr; 1268 /* Start DMA Transmitter. */ 1269 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL); 1270#ifdef GATHER_TXINT 1271 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx); 1272#endif 1273 if (netif_msg_tx_queued(lp)) { 1274 printk("%s: starting TxFD.\n", dev->name); 1275 dump_txfd(txfd); 1276 } 1277 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr); 1278 } else { 1279 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL); 1280 if (netif_msg_tx_queued(lp)) { 1281 printk("%s: queueing TxFD.\n", dev->name); 1282 dump_txfd(txfd); 1283 } 1284 } 1285 lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM; 1286 1287 dev->trans_start = jiffies; 1288 1289 /* If we just used up the very last entry in the 1290 * TX ring on this device, tell the queueing 1291 * layer to send no more. 1292 */ 1293 if (tc35815_tx_full(dev)) { 1294 if (netif_msg_tx_queued(lp)) 1295 printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name); 1296 netif_stop_queue(dev); 1297 } 1298 1299 /* When the TX completion hw interrupt arrives, this 1300 * is when the transmit statistics are updated. 1301 */ 1302 1303 spin_unlock_irqrestore(&lp->lock, flags); 1304 return 0; 1305} 1306 1307#define FATAL_ERROR_INT \ 1308 (Int_IntPCI | Int_DmParErr | Int_IntNRAbt) 1309static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status) 1310{ 1311 static int count; 1312 printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):", 1313 dev->name, status); 1314 if (status & Int_IntPCI) 1315 printk(" IntPCI"); 1316 if (status & Int_DmParErr) 1317 printk(" DmParErr"); 1318 if (status & Int_IntNRAbt) 1319 printk(" IntNRAbt"); 1320 printk("\n"); 1321 if (count++ > 100) 1322 panic("%s: Too many fatal errors.", dev->name); 1323 printk(KERN_WARNING "%s: Resetting ...\n", dev->name); 1324 /* Try to restart the adaptor. */ 1325 tc35815_restart(dev); 1326} 1327 1328#ifdef TC35815_NAPI 1329static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit) 1330#else 1331static int tc35815_do_interrupt(struct net_device *dev, u32 status) 1332#endif 1333{ 1334 struct tc35815_local *lp = dev->priv; 1335 struct tc35815_regs __iomem *tr = 1336 (struct tc35815_regs __iomem *)dev->base_addr; 1337 int ret = -1; 1338 1339 /* Fatal errors... */ 1340 if (status & FATAL_ERROR_INT) { 1341 tc35815_fatal_error_interrupt(dev, status); 1342 return 0; 1343 } 1344 /* recoverable errors */ 1345 if (status & Int_IntFDAEx) { 1346 /* disable FDAEx int. (until we make rooms...) */ 1347 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En); 1348 printk(KERN_WARNING 1349 "%s: Free Descriptor Area Exhausted (%#x).\n", 1350 dev->name, status); 1351 lp->stats.rx_dropped++; 1352 ret = 0; 1353 } 1354 if (status & Int_IntBLEx) { 1355 /* disable BLEx int. (until we make rooms...) */ 1356 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En); 1357 printk(KERN_WARNING 1358 "%s: Buffer List Exhausted (%#x).\n", 1359 dev->name, status); 1360 lp->stats.rx_dropped++; 1361 ret = 0; 1362 } 1363 if (status & Int_IntExBD) { 1364 printk(KERN_WARNING 1365 "%s: Excessive Buffer Descriptiors (%#x).\n", 1366 dev->name, status); 1367 lp->stats.rx_length_errors++; 1368 ret = 0; 1369 } 1370 1371 /* normal notification */ 1372 if (status & Int_IntMacRx) { 1373 /* Got a packet(s). */ 1374#ifdef TC35815_NAPI 1375 ret = tc35815_rx(dev, limit); 1376#else 1377 tc35815_rx(dev); 1378 ret = 0; 1379#endif 1380 lp->lstats.rx_ints++; 1381 } 1382 if (status & Int_IntMacTx) { 1383 /* Transmit complete. */ 1384 lp->lstats.tx_ints++; 1385 tc35815_txdone(dev); 1386 netif_wake_queue(dev); 1387 ret = 0; 1388 } 1389 return ret; 1390} 1391 1392/* 1393 * The typical workload of the driver: 1394 * Handle the network interface interrupts. 1395 */ 1396static irqreturn_t tc35815_interrupt(int irq, void *dev_id) 1397{ 1398 struct net_device *dev = dev_id; 1399 struct tc35815_regs __iomem *tr = 1400 (struct tc35815_regs __iomem *)dev->base_addr; 1401#ifdef TC35815_NAPI 1402 u32 dmactl = tc_readl(&tr->DMA_Ctl); 1403 1404 if (!(dmactl & DMA_IntMask)) { 1405 /* disable interrupts */ 1406 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl); 1407 if (netif_rx_schedule_prep(dev)) 1408 __netif_rx_schedule(dev); 1409 else { 1410 printk(KERN_ERR "%s: interrupt taken in poll\n", 1411 dev->name); 1412 BUG(); 1413 } 1414 (void)tc_readl(&tr->Int_Src); /* flush */ 1415 return IRQ_HANDLED; 1416 } 1417 return IRQ_NONE; 1418#else 1419 struct tc35815_local *lp = dev->priv; 1420 int handled; 1421 u32 status; 1422 1423 spin_lock(&lp->lock); 1424 status = tc_readl(&tr->Int_Src); 1425 tc_writel(status, &tr->Int_Src); /* write to clear */ 1426 handled = tc35815_do_interrupt(dev, status); 1427 (void)tc_readl(&tr->Int_Src); /* flush */ 1428 spin_unlock(&lp->lock); 1429 return IRQ_RETVAL(handled >= 0); 1430#endif /* TC35815_NAPI */ 1431} 1432 1433#ifdef CONFIG_NET_POLL_CONTROLLER 1434static void tc35815_poll_controller(struct net_device *dev) 1435{ 1436 disable_irq(dev->irq); 1437 tc35815_interrupt(dev->irq, dev); 1438 enable_irq(dev->irq); 1439} 1440#endif 1441 1442/* We have a good packet(s), get it/them out of the buffers. */ 1443#ifdef TC35815_NAPI 1444static int 1445tc35815_rx(struct net_device *dev, int limit) 1446#else 1447static void 1448tc35815_rx(struct net_device *dev) 1449#endif 1450{ 1451 struct tc35815_local *lp = dev->priv; 1452 unsigned int fdctl; 1453 int i; 1454 int buf_free_count = 0; 1455 int fd_free_count = 0; 1456#ifdef TC35815_NAPI 1457 int received = 0; 1458#endif 1459 1460 while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) { 1461 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat); 1462 int pkt_len = fdctl & FD_FDLength_MASK; 1463 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT; 1464#ifdef DEBUG 1465 struct RxFD *next_rfd; 1466#endif 1467#if (RX_CTL_CMD & Rx_StripCRC) == 0 1468 pkt_len -= 4; 1469#endif 1470 1471 if (netif_msg_rx_status(lp)) 1472 dump_rxfd(lp->rfd_cur); 1473 if (status & Rx_Good) { 1474 struct sk_buff *skb; 1475 unsigned char *data; 1476 int cur_bd; 1477#ifdef TC35815_USE_PACKEDBUFFER 1478 int offset; 1479#endif 1480 1481#ifdef TC35815_NAPI 1482 if (--limit < 0) 1483 break; 1484#endif 1485#ifdef TC35815_USE_PACKEDBUFFER 1486 BUG_ON(bd_count > 2); 1487 skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */ 1488 if (skb == NULL) { 1489 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", 1490 dev->name); 1491 lp->stats.rx_dropped++; 1492 break; 1493 } 1494 skb_reserve(skb, 2); /* 16 bit alignment */ 1495 1496 data = skb_put(skb, pkt_len); 1497 1498 /* copy from receive buffer */ 1499 cur_bd = 0; 1500 offset = 0; 1501 while (offset < pkt_len && cur_bd < bd_count) { 1502 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) & 1503 BD_BuffLength_MASK; 1504 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData); 1505 void *rxbuf = rxbuf_bus_to_virt(lp, dma); 1506 if (offset + len > pkt_len) 1507 len = pkt_len - offset; 1508#ifdef TC35815_DMA_SYNC_ONDEMAND 1509 pci_dma_sync_single_for_cpu(lp->pci_dev, 1510 dma, len, 1511 PCI_DMA_FROMDEVICE); 1512#endif 1513 memcpy(data + offset, rxbuf, len); 1514#ifdef TC35815_DMA_SYNC_ONDEMAND 1515 pci_dma_sync_single_for_device(lp->pci_dev, 1516 dma, len, 1517 PCI_DMA_FROMDEVICE); 1518#endif 1519 offset += len; 1520 cur_bd++; 1521 } 1522#else /* TC35815_USE_PACKEDBUFFER */ 1523 BUG_ON(bd_count > 1); 1524 cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl) 1525 & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT; 1526#ifdef DEBUG 1527 if (cur_bd >= RX_BUF_NUM) { 1528 printk("%s: invalid BDID.\n", dev->name); 1529 panic_queues(dev); 1530 } 1531 BUG_ON(lp->rx_skbs[cur_bd].skb_dma != 1532 (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3)); 1533 if (!lp->rx_skbs[cur_bd].skb) { 1534 printk("%s: NULL skb.\n", dev->name); 1535 panic_queues(dev); 1536 } 1537#else 1538 BUG_ON(cur_bd >= RX_BUF_NUM); 1539#endif 1540 skb = lp->rx_skbs[cur_bd].skb; 1541 prefetch(skb->data); 1542 lp->rx_skbs[cur_bd].skb = NULL; 1543 lp->fbl_count--; 1544 pci_unmap_single(lp->pci_dev, 1545 lp->rx_skbs[cur_bd].skb_dma, 1546 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1547 if (!HAVE_DMA_RXALIGN(lp)) 1548 memmove(skb->data, skb->data - 2, pkt_len); 1549 data = skb_put(skb, pkt_len); 1550#endif /* TC35815_USE_PACKEDBUFFER */ 1551 if (netif_msg_pktdata(lp)) 1552 print_eth(data); 1553 skb->protocol = eth_type_trans(skb, dev); 1554#ifdef TC35815_NAPI 1555 netif_receive_skb(skb); 1556 received++; 1557#else 1558 netif_rx(skb); 1559#endif 1560 dev->last_rx = jiffies; 1561 lp->stats.rx_packets++; 1562 lp->stats.rx_bytes += pkt_len; 1563 } else { 1564 lp->stats.rx_errors++; 1565 printk(KERN_DEBUG "%s: Rx error (status %x)\n", 1566 dev->name, status & Rx_Stat_Mask); 1567 /* WORKAROUND: LongErr and CRCErr means Overflow. */ 1568 if ((status & Rx_LongErr) && (status & Rx_CRCErr)) { 1569 status &= ~(Rx_LongErr|Rx_CRCErr); 1570 status |= Rx_Over; 1571 } 1572 if (status & Rx_LongErr) lp->stats.rx_length_errors++; 1573 if (status & Rx_Over) lp->stats.rx_fifo_errors++; 1574 if (status & Rx_CRCErr) lp->stats.rx_crc_errors++; 1575 if (status & Rx_Align) lp->stats.rx_frame_errors++; 1576 } 1577 1578 if (bd_count > 0) { 1579 /* put Free Buffer back to controller */ 1580 int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl); 1581 unsigned char id = 1582 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT; 1583#ifdef DEBUG 1584 if (id >= RX_BUF_NUM) { 1585 printk("%s: invalid BDID.\n", dev->name); 1586 panic_queues(dev); 1587 } 1588#else 1589 BUG_ON(id >= RX_BUF_NUM); 1590#endif 1591 /* free old buffers */ 1592#ifdef TC35815_USE_PACKEDBUFFER 1593 while (lp->fbl_curid != id) 1594#else 1595 while (lp->fbl_count < RX_BUF_NUM) 1596#endif 1597 { 1598#ifdef TC35815_USE_PACKEDBUFFER 1599 unsigned char curid = lp->fbl_curid; 1600#else 1601 unsigned char curid = 1602 (id + 1 + lp->fbl_count) % RX_BUF_NUM; 1603#endif 1604 struct BDesc *bd = &lp->fbl_ptr->bd[curid]; 1605#ifdef DEBUG 1606 bdctl = le32_to_cpu(bd->BDCtl); 1607 if (bdctl & BD_CownsBD) { 1608 printk("%s: Freeing invalid BD.\n", 1609 dev->name); 1610 panic_queues(dev); 1611 } 1612#endif 1613 /* pass BD to controler */ 1614#ifndef TC35815_USE_PACKEDBUFFER 1615 if (!lp->rx_skbs[curid].skb) { 1616 lp->rx_skbs[curid].skb = 1617 alloc_rxbuf_skb(dev, 1618 lp->pci_dev, 1619 &lp->rx_skbs[curid].skb_dma); 1620 if (!lp->rx_skbs[curid].skb) 1621 break; /* try on next reception */ 1622 bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma); 1623 } 1624#endif /* TC35815_USE_PACKEDBUFFER */ 1625 /* Note: BDLength was modified by chip. */ 1626 bd->BDCtl = cpu_to_le32(BD_CownsBD | 1627 (curid << BD_RxBDID_SHIFT) | 1628 RX_BUF_SIZE); 1629#ifdef TC35815_USE_PACKEDBUFFER 1630 lp->fbl_curid = (curid + 1) % RX_BUF_NUM; 1631 if (netif_msg_rx_status(lp)) { 1632 printk("%s: Entering new FBD %d\n", 1633 dev->name, lp->fbl_curid); 1634 dump_frfd(lp->fbl_ptr); 1635 } 1636#else 1637 lp->fbl_count++; 1638#endif 1639 buf_free_count++; 1640 } 1641 } 1642 1643 /* put RxFD back to controller */ 1644#ifdef DEBUG 1645 next_rfd = fd_bus_to_virt(lp, 1646 le32_to_cpu(lp->rfd_cur->fd.FDNext)); 1647 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) { 1648 printk("%s: RxFD FDNext invalid.\n", dev->name); 1649 panic_queues(dev); 1650 } 1651#endif 1652 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) { 1653 /* pass FD to controler */ 1654#ifdef DEBUG 1655 lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead); 1656#else 1657 lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL); 1658#endif 1659 lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD); 1660 lp->rfd_cur++; 1661 fd_free_count++; 1662 } 1663 if (lp->rfd_cur > lp->rfd_limit) 1664 lp->rfd_cur = lp->rfd_base; 1665#ifdef DEBUG 1666 if (lp->rfd_cur != next_rfd) 1667 printk("rfd_cur = %p, next_rfd %p\n", 1668 lp->rfd_cur, next_rfd); 1669#endif 1670 } 1671 1672 /* re-enable BL/FDA Exhaust interrupts. */ 1673 if (fd_free_count) { 1674 struct tc35815_regs __iomem *tr = 1675 (struct tc35815_regs __iomem *)dev->base_addr; 1676 u32 en, en_old = tc_readl(&tr->Int_En); 1677 en = en_old | Int_FDAExEn; 1678 if (buf_free_count) 1679 en |= Int_BLExEn; 1680 if (en != en_old) 1681 tc_writel(en, &tr->Int_En); 1682 } 1683#ifdef TC35815_NAPI 1684 return received; 1685#endif 1686} 1687 1688#ifdef TC35815_NAPI 1689static int 1690tc35815_poll(struct net_device *dev, int *budget) 1691{ 1692 struct tc35815_local *lp = dev->priv; 1693 struct tc35815_regs __iomem *tr = 1694 (struct tc35815_regs __iomem *)dev->base_addr; 1695 int limit = min(*budget, dev->quota); 1696 int received = 0, handled; 1697 u32 status; 1698 1699 spin_lock(&lp->lock); 1700 status = tc_readl(&tr->Int_Src); 1701 do { 1702 tc_writel(status, &tr->Int_Src); /* write to clear */ 1703 1704 handled = tc35815_do_interrupt(dev, status, limit); 1705 if (handled >= 0) { 1706 received += handled; 1707 limit -= handled; 1708 if (limit <= 0) 1709 break; 1710 } 1711 status = tc_readl(&tr->Int_Src); 1712 } while (status); 1713 spin_unlock(&lp->lock); 1714 1715 dev->quota -= received; 1716 *budget -= received; 1717 if (limit <= 0) 1718 return 1; 1719 1720 netif_rx_complete(dev); 1721 /* enable interrupts */ 1722 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl); 1723 return 0; 1724} 1725#endif 1726 1727#ifdef NO_CHECK_CARRIER 1728#define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr) 1729#else 1730#define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr) 1731#endif 1732 1733static void 1734tc35815_check_tx_stat(struct net_device *dev, int status) 1735{ 1736 struct tc35815_local *lp = dev->priv; 1737 const char *msg = NULL; 1738 1739 /* count collisions */ 1740 if (status & Tx_ExColl) 1741 lp->stats.collisions += 16; 1742 if (status & Tx_TxColl_MASK) 1743 lp->stats.collisions += status & Tx_TxColl_MASK; 1744 1745#ifndef NO_CHECK_CARRIER 1746 /* TX4939 does not have NCarr */ 1747 if (lp->boardtype == TC35815_TX4939) 1748 status &= ~Tx_NCarr; 1749#ifdef WORKAROUND_LOSTCAR 1750 /* WORKAROUND: ignore LostCrS in full duplex operation */ 1751 if ((lp->timer_state != asleep && lp->timer_state != lcheck) 1752 || lp->fullduplex) 1753 status &= ~Tx_NCarr; 1754#endif 1755#endif 1756 1757 if (!(status & TX_STA_ERR)) { 1758 /* no error. */ 1759 lp->stats.tx_packets++; 1760 return; 1761 } 1762 1763 lp->stats.tx_errors++; 1764 if (status & Tx_ExColl) { 1765 lp->stats.tx_aborted_errors++; 1766 msg = "Excessive Collision."; 1767 } 1768 if (status & Tx_Under) { 1769 lp->stats.tx_fifo_errors++; 1770 msg = "Tx FIFO Underrun."; 1771 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) { 1772 lp->lstats.tx_underrun++; 1773 if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) { 1774 struct tc35815_regs __iomem *tr = 1775 (struct tc35815_regs __iomem *)dev->base_addr; 1776 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh); 1777 msg = "Tx FIFO Underrun.Change Tx threshold to max."; 1778 } 1779 } 1780 } 1781 if (status & Tx_Defer) { 1782 lp->stats.tx_fifo_errors++; 1783 msg = "Excessive Deferral."; 1784 } 1785#ifndef NO_CHECK_CARRIER 1786 if (status & Tx_NCarr) { 1787 lp->stats.tx_carrier_errors++; 1788 msg = "Lost Carrier Sense."; 1789 } 1790#endif 1791 if (status & Tx_LateColl) { 1792 lp->stats.tx_aborted_errors++; 1793 msg = "Late Collision."; 1794 } 1795 if (status & Tx_TxPar) { 1796 lp->stats.tx_fifo_errors++; 1797 msg = "Transmit Parity Error."; 1798 } 1799 if (status & Tx_SQErr) { 1800 lp->stats.tx_heartbeat_errors++; 1801 msg = "Signal Quality Error."; 1802 } 1803 if (msg && netif_msg_tx_err(lp)) 1804 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status); 1805} 1806 1807/* This handles TX complete events posted by the device 1808 * via interrupts. 1809 */ 1810static void 1811tc35815_txdone(struct net_device *dev) 1812{ 1813 struct tc35815_local *lp = dev->priv; 1814 struct TxFD *txfd; 1815 unsigned int fdctl; 1816 1817 txfd = &lp->tfd_base[lp->tfd_end]; 1818 while (lp->tfd_start != lp->tfd_end && 1819 !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) { 1820 int status = le32_to_cpu(txfd->fd.FDStat); 1821 struct sk_buff *skb; 1822 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext); 1823 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem); 1824 1825 if (netif_msg_tx_done(lp)) { 1826 printk("%s: complete TxFD.\n", dev->name); 1827 dump_txfd(txfd); 1828 } 1829 tc35815_check_tx_stat(dev, status); 1830 1831 skb = fdsystem != 0xffffffff ? 1832 lp->tx_skbs[fdsystem].skb : NULL; 1833#ifdef DEBUG 1834 if (lp->tx_skbs[lp->tfd_end].skb != skb) { 1835 printk("%s: tx_skbs mismatch.\n", dev->name); 1836 panic_queues(dev); 1837 } 1838#else 1839 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb); 1840#endif 1841 if (skb) { 1842 lp->stats.tx_bytes += skb->len; 1843 pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE); 1844 lp->tx_skbs[lp->tfd_end].skb = NULL; 1845 lp->tx_skbs[lp->tfd_end].skb_dma = 0; 1846#ifdef TC35815_NAPI 1847 dev_kfree_skb_any(skb); 1848#else 1849 dev_kfree_skb_irq(skb); 1850#endif 1851 } 1852 txfd->fd.FDSystem = cpu_to_le32(0xffffffff); 1853 1854 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM; 1855 txfd = &lp->tfd_base[lp->tfd_end]; 1856#ifdef DEBUG 1857 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) { 1858 printk("%s: TxFD FDNext invalid.\n", dev->name); 1859 panic_queues(dev); 1860 } 1861#endif 1862 if (fdnext & FD_Next_EOL) { 1863 /* DMA Transmitter has been stopping... */ 1864 if (lp->tfd_end != lp->tfd_start) { 1865 struct tc35815_regs __iomem *tr = 1866 (struct tc35815_regs __iomem *)dev->base_addr; 1867 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM; 1868 struct TxFD* txhead = &lp->tfd_base[head]; 1869 int qlen = (lp->tfd_start + TX_FD_NUM 1870 - lp->tfd_end) % TX_FD_NUM; 1871 1872#ifdef DEBUG 1873 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) { 1874 printk("%s: TxFD FDCtl invalid.\n", dev->name); 1875 panic_queues(dev); 1876 } 1877#endif 1878 /* log max queue length */ 1879 if (lp->lstats.max_tx_qlen < qlen) 1880 lp->lstats.max_tx_qlen = qlen; 1881 1882 1883 /* start DMA Transmitter again */ 1884 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL); 1885#ifdef GATHER_TXINT 1886 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx); 1887#endif 1888 if (netif_msg_tx_queued(lp)) { 1889 printk("%s: start TxFD on queue.\n", 1890 dev->name); 1891 dump_txfd(txfd); 1892 } 1893 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr); 1894 } 1895 break; 1896 } 1897 } 1898 1899 /* If we had stopped the queue due to a "tx full" 1900 * condition, and space has now been made available, 1901 * wake up the queue. 1902 */ 1903 if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev)) 1904 netif_wake_queue(dev); 1905} 1906 1907/* The inverse routine to tc35815_open(). */ 1908static int 1909tc35815_close(struct net_device *dev) 1910{ 1911 struct tc35815_local *lp = dev->priv; 1912 netif_stop_queue(dev); 1913 1914 /* Flush the Tx and disable Rx here. */ 1915 1916 del_timer(&lp->timer); /* Kill if running */ 1917 tc35815_chip_reset(dev); 1918 free_irq(dev->irq, dev); 1919 1920 tc35815_free_queues(dev); 1921 1922 return 0; 1923 1924} 1925 1926/* 1927 * Get the current statistics. 1928 * This may be called with the card open or closed. 1929 */ 1930static struct net_device_stats *tc35815_get_stats(struct net_device *dev) 1931{ 1932 struct tc35815_local *lp = dev->priv; 1933 struct tc35815_regs __iomem *tr = 1934 (struct tc35815_regs __iomem *)dev->base_addr; 1935 if (netif_running(dev)) { 1936 /* Update the statistics from the device registers. */ 1937 lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt); 1938 } 1939 1940 return &lp->stats; 1941} 1942 1943static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr) 1944{ 1945 struct tc35815_local *lp = dev->priv; 1946 struct tc35815_regs __iomem *tr = 1947 (struct tc35815_regs __iomem *)dev->base_addr; 1948 int cam_index = index * 6; 1949 u32 cam_data; 1950 u32 saved_addr; 1951 saved_addr = tc_readl(&tr->CAM_Adr); 1952 1953 if (netif_msg_hw(lp)) { 1954 int i; 1955 printk(KERN_DEBUG "%s: CAM %d:", dev->name, index); 1956 for (i = 0; i < 6; i++) 1957 printk(" %02x", addr[i]); 1958 printk("\n"); 1959 } 1960 if (index & 1) { 1961 /* read modify write */ 1962 tc_writel(cam_index - 2, &tr->CAM_Adr); 1963 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000; 1964 cam_data |= addr[0] << 8 | addr[1]; 1965 tc_writel(cam_data, &tr->CAM_Data); 1966 /* write whole word */ 1967 tc_writel(cam_index + 2, &tr->CAM_Adr); 1968 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5]; 1969 tc_writel(cam_data, &tr->CAM_Data); 1970 } else { 1971 /* write whole word */ 1972 tc_writel(cam_index, &tr->CAM_Adr); 1973 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]; 1974 tc_writel(cam_data, &tr->CAM_Data); 1975 /* read modify write */ 1976 tc_writel(cam_index + 4, &tr->CAM_Adr); 1977 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff; 1978 cam_data |= addr[4] << 24 | (addr[5] << 16); 1979 tc_writel(cam_data, &tr->CAM_Data); 1980 } 1981 1982 tc_writel(saved_addr, &tr->CAM_Adr); 1983} 1984 1985 1986/* 1987 * Set or clear the multicast filter for this adaptor. 1988 * num_addrs == -1 Promiscuous mode, receive all packets 1989 * num_addrs == 0 Normal mode, clear multicast list 1990 * num_addrs > 0 Multicast mode, receive normal and MC packets, 1991 * and do best-effort filtering. 1992 */ 1993static void 1994tc35815_set_multicast_list(struct net_device *dev) 1995{ 1996 struct tc35815_regs __iomem *tr = 1997 (struct tc35815_regs __iomem *)dev->base_addr; 1998 1999 if (dev->flags&IFF_PROMISC) 2000 { 2001#ifdef WORKAROUND_100HALF_PROMISC 2002 /* With some (all?) 100MHalf HUB, controller will hang 2003 * if we enabled promiscuous mode before linkup... */ 2004 struct tc35815_local *lp = dev->priv; 2005 int pid = lp->phy_addr; 2006 if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS)) 2007 return; 2008#endif 2009 /* Enable promiscuous mode */ 2010 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl); 2011 } 2012 else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3) 2013 { 2014 /* CAM 0, 1, 20 are reserved. */ 2015 /* Disable promiscuous mode, use normal mode. */ 2016 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl); 2017 } 2018 else if(dev->mc_count) 2019 { 2020 struct dev_mc_list* cur_addr = dev->mc_list; 2021 int i; 2022 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE); 2023 2024 tc_writel(0, &tr->CAM_Ctl); 2025 /* Walk the address list, and load the filter */ 2026 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) { 2027 if (!cur_addr) 2028 break; 2029 /* entry 0,1 is reserved. */ 2030 tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr); 2031 ena_bits |= CAM_Ena_Bit(i + 2); 2032 } 2033 tc_writel(ena_bits, &tr->CAM_Ena); 2034 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); 2035 } 2036 else { 2037 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); 2038 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); 2039 } 2040} 2041 2042static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 2043{ 2044 struct tc35815_local *lp = dev->priv; 2045 strcpy(info->driver, MODNAME); 2046 strcpy(info->version, DRV_VERSION); 2047 strcpy(info->bus_info, pci_name(lp->pci_dev)); 2048} 2049 2050static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 2051{ 2052 struct tc35815_local *lp = dev->priv; 2053 spin_lock_irq(&lp->lock); 2054 mii_ethtool_gset(&lp->mii, cmd); 2055 spin_unlock_irq(&lp->lock); 2056 return 0; 2057} 2058 2059static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) 2060{ 2061 struct tc35815_local *lp = dev->priv; 2062 int rc; 2063#if 1 /* use our negotiation method... */ 2064 /* Verify the settings we care about. */ 2065 if (cmd->autoneg != AUTONEG_ENABLE && 2066 cmd->autoneg != AUTONEG_DISABLE) 2067 return -EINVAL; 2068 if (cmd->autoneg == AUTONEG_DISABLE && 2069 ((cmd->speed != SPEED_100 && 2070 cmd->speed != SPEED_10) || 2071 (cmd->duplex != DUPLEX_HALF && 2072 cmd->duplex != DUPLEX_FULL))) 2073 return -EINVAL; 2074 2075 /* Ok, do it to it. */ 2076 spin_lock_irq(&lp->lock); 2077 del_timer(&lp->timer); 2078 tc35815_start_auto_negotiation(dev, cmd); 2079 spin_unlock_irq(&lp->lock); 2080 rc = 0; 2081#else 2082 spin_lock_irq(&lp->lock); 2083 rc = mii_ethtool_sset(&lp->mii, cmd); 2084 spin_unlock_irq(&lp->lock); 2085#endif 2086 return rc; 2087} 2088 2089static int tc35815_nway_reset(struct net_device *dev) 2090{ 2091 struct tc35815_local *lp = dev->priv; 2092 int rc; 2093 spin_lock_irq(&lp->lock); 2094 rc = mii_nway_restart(&lp->mii); 2095 spin_unlock_irq(&lp->lock); 2096 return rc; 2097} 2098 2099static u32 tc35815_get_link(struct net_device *dev) 2100{ 2101 struct tc35815_local *lp = dev->priv; 2102 int rc; 2103 spin_lock_irq(&lp->lock); 2104 rc = mii_link_ok(&lp->mii); 2105 spin_unlock_irq(&lp->lock); 2106 return rc; 2107} 2108 2109static u32 tc35815_get_msglevel(struct net_device *dev) 2110{ 2111 struct tc35815_local *lp = dev->priv; 2112 return lp->msg_enable; 2113} 2114 2115static void tc35815_set_msglevel(struct net_device *dev, u32 datum) 2116{ 2117 struct tc35815_local *lp = dev->priv; 2118 lp->msg_enable = datum; 2119} 2120 2121static int tc35815_get_stats_count(struct net_device *dev) 2122{ 2123 struct tc35815_local *lp = dev->priv; 2124 return sizeof(lp->lstats) / sizeof(int); 2125} 2126 2127static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) 2128{ 2129 struct tc35815_local *lp = dev->priv; 2130 data[0] = lp->lstats.max_tx_qlen; 2131 data[1] = lp->lstats.tx_ints; 2132 data[2] = lp->lstats.rx_ints; 2133 data[3] = lp->lstats.tx_underrun; 2134} 2135 2136static struct { 2137 const char str[ETH_GSTRING_LEN]; 2138} ethtool_stats_keys[] = { 2139 { "max_tx_qlen" }, 2140 { "tx_ints" }, 2141 { "rx_ints" }, 2142 { "tx_underrun" }, 2143}; 2144 2145static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data) 2146{ 2147 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); 2148} 2149 2150static const struct ethtool_ops tc35815_ethtool_ops = { 2151 .get_drvinfo = tc35815_get_drvinfo, 2152 .get_settings = tc35815_get_settings, 2153 .set_settings = tc35815_set_settings, 2154 .nway_reset = tc35815_nway_reset, 2155 .get_link = tc35815_get_link, 2156 .get_msglevel = tc35815_get_msglevel, 2157 .set_msglevel = tc35815_set_msglevel, 2158 .get_strings = tc35815_get_strings, 2159 .get_stats_count = tc35815_get_stats_count, 2160 .get_ethtool_stats = tc35815_get_ethtool_stats, 2161 .get_perm_addr = ethtool_op_get_perm_addr, 2162}; 2163 2164static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2165{ 2166 struct tc35815_local *lp = dev->priv; 2167 int rc; 2168 2169 if (!netif_running(dev)) 2170 return -EINVAL; 2171 2172 spin_lock_irq(&lp->lock); 2173 rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL); 2174 spin_unlock_irq(&lp->lock); 2175 2176 return rc; 2177} 2178 2179static int tc_mdio_read(struct net_device *dev, int phy_id, int location) 2180{ 2181 struct tc35815_regs __iomem *tr = 2182 (struct tc35815_regs __iomem *)dev->base_addr; 2183 u32 data; 2184 tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA); 2185 while (tc_readl(&tr->MD_CA) & MD_CA_Busy) 2186 ; 2187 data = tc_readl(&tr->MD_Data); 2188 return data & 0xffff; 2189} 2190 2191static void tc_mdio_write(struct net_device *dev, int phy_id, int location, 2192 int val) 2193{ 2194 struct tc35815_regs __iomem *tr = 2195 (struct tc35815_regs __iomem *)dev->base_addr; 2196 tc_writel(val, &tr->MD_Data); 2197 tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA); 2198 while (tc_readl(&tr->MD_CA) & MD_CA_Busy) 2199 ; 2200} 2201 2202/* Auto negotiation. The scheme is very simple. We have a timer routine 2203 * that keeps watching the auto negotiation process as it progresses. 2204 * The DP83840 is first told to start doing it's thing, we set up the time 2205 * and place the timer state machine in it's initial state. 2206 * 2207 * Here the timer peeks at the DP83840 status registers at each click to see 2208 * if the auto negotiation has completed, we assume here that the DP83840 PHY 2209 * will time out at some point and just tell us what (didn't) happen. For 2210 * complete coverage we only allow so many of the ticks at this level to run, 2211 * when this has expired we print a warning message and try another strategy. 2212 * This "other" strategy is to force the interface into various speed/duplex 2213 * configurations and we stop when we see a link-up condition before the 2214 * maximum number of "peek" ticks have occurred. 2215 * 2216 * Once a valid link status has been detected we configure the BigMAC and 2217 * the rest of the Happy Meal to speak the most efficient protocol we could 2218 * get a clean link for. The priority for link configurations, highest first 2219 * is: 2220 * 100 Base-T Full Duplex 2221 * 100 Base-T Half Duplex 2222 * 10 Base-T Full Duplex 2223 * 10 Base-T Half Duplex 2224 * 2225 * We start a new timer now, after a successful auto negotiation status has 2226 * been detected. This timer just waits for the link-up bit to get set in 2227 * the BMCR of the DP83840. When this occurs we print a kernel log message 2228 * describing the link type in use and the fact that it is up. 2229 * 2230 * If a fatal error of some sort is signalled and detected in the interrupt 2231 * service routine, and the chip is reset, or the link is ifconfig'd down 2232 * and then back up, this entire process repeats itself all over again. 2233 */ 2234/* Note: Above comments are come from sunhme driver. */ 2235 2236static int tc35815_try_next_permutation(struct net_device *dev) 2237{ 2238 struct tc35815_local *lp = dev->priv; 2239 int pid = lp->phy_addr; 2240 unsigned short bmcr; 2241 2242 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2243 2244 /* Downgrade from full to half duplex. Only possible via ethtool. */ 2245 if (bmcr & BMCR_FULLDPLX) { 2246 bmcr &= ~BMCR_FULLDPLX; 2247 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr); 2248 tc_mdio_write(dev, pid, MII_BMCR, bmcr); 2249 return 0; 2250 } 2251 2252 /* Downgrade from 100 to 10. */ 2253 if (bmcr & BMCR_SPEED100) { 2254 bmcr &= ~BMCR_SPEED100; 2255 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr); 2256 tc_mdio_write(dev, pid, MII_BMCR, bmcr); 2257 return 0; 2258 } 2259 2260 /* We've tried everything. */ 2261 return -1; 2262} 2263 2264static void 2265tc35815_display_link_mode(struct net_device *dev) 2266{ 2267 struct tc35815_local *lp = dev->priv; 2268 int pid = lp->phy_addr; 2269 unsigned short lpa, bmcr; 2270 char *speed = "", *duplex = ""; 2271 2272 lpa = tc_mdio_read(dev, pid, MII_LPA); 2273 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2274 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL))) 2275 speed = "100Mb/s"; 2276 else 2277 speed = "10Mb/s"; 2278 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL))) 2279 duplex = "Full Duplex"; 2280 else 2281 duplex = "Half Duplex"; 2282 2283 if (netif_msg_link(lp)) 2284 printk(KERN_INFO "%s: Link is up at %s, %s.\n", 2285 dev->name, speed, duplex); 2286 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n", 2287 dev->name, 2288 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa); 2289} 2290 2291static void tc35815_display_forced_link_mode(struct net_device *dev) 2292{ 2293 struct tc35815_local *lp = dev->priv; 2294 int pid = lp->phy_addr; 2295 unsigned short bmcr; 2296 char *speed = "", *duplex = ""; 2297 2298 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2299 if (bmcr & BMCR_SPEED100) 2300 speed = "100Mb/s"; 2301 else 2302 speed = "10Mb/s"; 2303 if (bmcr & BMCR_FULLDPLX) 2304 duplex = "Full Duplex.\n"; 2305 else 2306 duplex = "Half Duplex.\n"; 2307 2308 if (netif_msg_link(lp)) 2309 printk(KERN_INFO "%s: Link has been forced up at %s, %s", 2310 dev->name, speed, duplex); 2311} 2312 2313static void tc35815_set_link_modes(struct net_device *dev) 2314{ 2315 struct tc35815_local *lp = dev->priv; 2316 struct tc35815_regs __iomem *tr = 2317 (struct tc35815_regs __iomem *)dev->base_addr; 2318 int pid = lp->phy_addr; 2319 unsigned short bmcr, lpa; 2320 int speed; 2321 2322 if (lp->timer_state == arbwait) { 2323 lpa = tc_mdio_read(dev, pid, MII_LPA); 2324 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2325 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n", 2326 dev->name, 2327 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa); 2328 if (!(lpa & (LPA_10HALF | LPA_10FULL | 2329 LPA_100HALF | LPA_100FULL))) { 2330 /* fall back to 10HALF */ 2331 printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n", 2332 dev->name, lpa); 2333 lpa = LPA_10HALF; 2334 } 2335 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL))) 2336 lp->fullduplex = 1; 2337 else 2338 lp->fullduplex = 0; 2339 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL))) 2340 speed = 100; 2341 else 2342 speed = 10; 2343 } else { 2344 /* Forcing a link mode. */ 2345 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2346 if (bmcr & BMCR_FULLDPLX) 2347 lp->fullduplex = 1; 2348 else 2349 lp->fullduplex = 0; 2350 if (bmcr & BMCR_SPEED100) 2351 speed = 100; 2352 else 2353 speed = 10; 2354 } 2355 2356 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl); 2357 if (lp->fullduplex) { 2358 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl); 2359 } else { 2360 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl); 2361 } 2362 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl); 2363 2364 /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */ 2365 2366#ifndef NO_CHECK_CARRIER 2367 /* TX4939 does not have EnLCarr */ 2368 if (lp->boardtype != TC35815_TX4939) { 2369#ifdef WORKAROUND_LOSTCAR 2370 /* WORKAROUND: enable LostCrS only if half duplex operation */ 2371 if (!lp->fullduplex && lp->boardtype != TC35815_TX4939) 2372 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl); 2373#endif 2374 } 2375#endif 2376 lp->mii.full_duplex = lp->fullduplex; 2377} 2378 2379static void tc35815_timer(unsigned long data) 2380{ 2381 struct net_device *dev = (struct net_device *)data; 2382 struct tc35815_local *lp = dev->priv; 2383 int pid = lp->phy_addr; 2384 unsigned short bmsr, bmcr, lpa; 2385 int restart_timer = 0; 2386 2387 spin_lock_irq(&lp->lock); 2388 2389 lp->timer_ticks++; 2390 switch (lp->timer_state) { 2391 case arbwait: 2392 /* 2393 * Only allow for 5 ticks, thats 10 seconds and much too 2394 * long to wait for arbitration to complete. 2395 */ 2396 /* TC35815 need more times... */ 2397 if (lp->timer_ticks >= 10) { 2398 /* Enter force mode. */ 2399 if (!options.doforce) { 2400 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful," 2401 " cable probblem?\n", dev->name); 2402 /* Try to restart the adaptor. */ 2403 tc35815_restart(dev); 2404 goto out; 2405 } 2406 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful," 2407 " trying force link mode\n", dev->name); 2408 printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name, 2409 tc_mdio_read(dev, pid, MII_BMCR), 2410 tc_mdio_read(dev, pid, MII_BMSR)); 2411 bmcr = BMCR_SPEED100; 2412 tc_mdio_write(dev, pid, MII_BMCR, bmcr); 2413 2414 /* 2415 * OK, seems we need do disable the transceiver 2416 * for the first tick to make sure we get an 2417 * accurate link state at the second tick. 2418 */ 2419 2420 lp->timer_state = ltrywait; 2421 lp->timer_ticks = 0; 2422 restart_timer = 1; 2423 } else { 2424 /* Anything interesting happen? */ 2425 bmsr = tc_mdio_read(dev, pid, MII_BMSR); 2426 if (bmsr & BMSR_ANEGCOMPLETE) { 2427 /* Just what we've been waiting for... */ 2428 tc35815_set_link_modes(dev); 2429 2430 /* 2431 * Success, at least so far, advance our state 2432 * engine. 2433 */ 2434 lp->timer_state = lupwait; 2435 restart_timer = 1; 2436 } else { 2437 restart_timer = 1; 2438 } 2439 } 2440 break; 2441 2442 case lupwait: 2443 /* 2444 * Auto negotiation was successful and we are awaiting a 2445 * link up status. I have decided to let this timer run 2446 * forever until some sort of error is signalled, reporting 2447 * a message to the user at 10 second intervals. 2448 */ 2449 bmsr = tc_mdio_read(dev, pid, MII_BMSR); 2450 if (bmsr & BMSR_LSTATUS) { 2451 /* 2452 * Wheee, it's up, display the link mode in use and put 2453 * the timer to sleep. 2454 */ 2455 tc35815_display_link_mode(dev); 2456 netif_carrier_on(dev); 2457#ifdef WORKAROUND_100HALF_PROMISC 2458 /* delayed promiscuous enabling */ 2459 if (dev->flags & IFF_PROMISC) 2460 tc35815_set_multicast_list(dev); 2461#endif 2462#if 1 2463 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA); 2464 lp->timer_state = lcheck; 2465 restart_timer = 1; 2466#else 2467 lp->timer_state = asleep; 2468 restart_timer = 0; 2469#endif 2470 } else { 2471 if (lp->timer_ticks >= 10) { 2472 printk(KERN_NOTICE "%s: Auto negotiation successful, link still " 2473 "not completely up.\n", dev->name); 2474 lp->timer_ticks = 0; 2475 restart_timer = 1; 2476 } else { 2477 restart_timer = 1; 2478 } 2479 } 2480 break; 2481 2482 case ltrywait: 2483 /* 2484 * Making the timeout here too long can make it take 2485 * annoyingly long to attempt all of the link mode 2486 * permutations, but then again this is essentially 2487 * error recovery code for the most part. 2488 */ 2489 bmsr = tc_mdio_read(dev, pid, MII_BMSR); 2490 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2491 if (lp->timer_ticks == 1) { 2492 /* 2493 * Re-enable transceiver, we'll re-enable the 2494 * transceiver next tick, then check link state 2495 * on the following tick. 2496 */ 2497 restart_timer = 1; 2498 break; 2499 } 2500 if (lp->timer_ticks == 2) { 2501 restart_timer = 1; 2502 break; 2503 } 2504 if (bmsr & BMSR_LSTATUS) { 2505 /* Force mode selection success. */ 2506 tc35815_display_forced_link_mode(dev); 2507 netif_carrier_on(dev); 2508 tc35815_set_link_modes(dev); 2509#ifdef WORKAROUND_100HALF_PROMISC 2510 /* delayed promiscuous enabling */ 2511 if (dev->flags & IFF_PROMISC) 2512 tc35815_set_multicast_list(dev); 2513#endif 2514#if 1 2515 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA); 2516 lp->timer_state = lcheck; 2517 restart_timer = 1; 2518#else 2519 lp->timer_state = asleep; 2520 restart_timer = 0; 2521#endif 2522 } else { 2523 if (lp->timer_ticks >= 4) { /* 6 seconds or so... */ 2524 int ret; 2525 2526 ret = tc35815_try_next_permutation(dev); 2527 if (ret == -1) { 2528 /* 2529 * Aieee, tried them all, reset the 2530 * chip and try all over again. 2531 */ 2532 printk(KERN_NOTICE "%s: Link down, " 2533 "cable problem?\n", 2534 dev->name); 2535 2536 /* Try to restart the adaptor. */ 2537 tc35815_restart(dev); 2538 goto out; 2539 } 2540 lp->timer_ticks = 0; 2541 restart_timer = 1; 2542 } else { 2543 restart_timer = 1; 2544 } 2545 } 2546 break; 2547 2548 case lcheck: 2549 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2550 lpa = tc_mdio_read(dev, pid, MII_LPA); 2551 if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) { 2552 printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name, 2553 bmcr); 2554 } else if ((lp->saved_lpa ^ lpa) & 2555 (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) { 2556 printk(KERN_NOTICE "%s: link status changed" 2557 " (BMCR %x LPA %x->%x)\n", dev->name, 2558 bmcr, lp->saved_lpa, lpa); 2559 } else { 2560 /* go on */ 2561 restart_timer = 1; 2562 break; 2563 } 2564 /* Try to restart the adaptor. */ 2565 tc35815_restart(dev); 2566 goto out; 2567 2568 case asleep: 2569 default: 2570 /* Can't happens.... */ 2571 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got " 2572 "one anyways!\n", dev->name); 2573 restart_timer = 0; 2574 lp->timer_ticks = 0; 2575 lp->timer_state = asleep; /* foo on you */ 2576 break; 2577 } 2578 2579 if (restart_timer) { 2580 lp->timer.expires = jiffies + msecs_to_jiffies(1200); 2581 add_timer(&lp->timer); 2582 } 2583out: 2584 spin_unlock_irq(&lp->lock); 2585} 2586 2587static void tc35815_start_auto_negotiation(struct net_device *dev, 2588 struct ethtool_cmd *ep) 2589{ 2590 struct tc35815_local *lp = dev->priv; 2591 int pid = lp->phy_addr; 2592 unsigned short bmsr, bmcr, advertize; 2593 int timeout; 2594 2595 netif_carrier_off(dev); 2596 bmsr = tc_mdio_read(dev, pid, MII_BMSR); 2597 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2598 advertize = tc_mdio_read(dev, pid, MII_ADVERTISE); 2599 2600 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) { 2601 if (options.speed || options.duplex) { 2602 /* Advertise only specified configuration. */ 2603 advertize &= ~(ADVERTISE_10HALF | 2604 ADVERTISE_10FULL | 2605 ADVERTISE_100HALF | 2606 ADVERTISE_100FULL); 2607 if (options.speed != 10) { 2608 if (options.duplex != 1) 2609 advertize |= ADVERTISE_100FULL; 2610 if (options.duplex != 2) 2611 advertize |= ADVERTISE_100HALF; 2612 } 2613 if (options.speed != 100) { 2614 if (options.duplex != 1) 2615 advertize |= ADVERTISE_10FULL; 2616 if (options.duplex != 2) 2617 advertize |= ADVERTISE_10HALF; 2618 } 2619 if (options.speed == 100) 2620 bmcr |= BMCR_SPEED100; 2621 else if (options.speed == 10) 2622 bmcr &= ~BMCR_SPEED100; 2623 if (options.duplex == 2) 2624 bmcr |= BMCR_FULLDPLX; 2625 else if (options.duplex == 1) 2626 bmcr &= ~BMCR_FULLDPLX; 2627 } else { 2628 /* Advertise everything we can support. */ 2629 if (bmsr & BMSR_10HALF) 2630 advertize |= ADVERTISE_10HALF; 2631 else 2632 advertize &= ~ADVERTISE_10HALF; 2633 if (bmsr & BMSR_10FULL) 2634 advertize |= ADVERTISE_10FULL; 2635 else 2636 advertize &= ~ADVERTISE_10FULL; 2637 if (bmsr & BMSR_100HALF) 2638 advertize |= ADVERTISE_100HALF; 2639 else 2640 advertize &= ~ADVERTISE_100HALF; 2641 if (bmsr & BMSR_100FULL) 2642 advertize |= ADVERTISE_100FULL; 2643 else 2644 advertize &= ~ADVERTISE_100FULL; 2645 } 2646 2647 tc_mdio_write(dev, pid, MII_ADVERTISE, advertize); 2648 2649 /* Enable Auto-Negotiation, this is usually on already... */ 2650 bmcr |= BMCR_ANENABLE; 2651 tc_mdio_write(dev, pid, MII_BMCR, bmcr); 2652 2653 /* Restart it to make sure it is going. */ 2654 bmcr |= BMCR_ANRESTART; 2655 tc_mdio_write(dev, pid, MII_BMCR, bmcr); 2656 printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr); 2657 2658 /* BMCR_ANRESTART self clears when the process has begun. */ 2659 timeout = 64; /* More than enough. */ 2660 while (--timeout) { 2661 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2662 if (!(bmcr & BMCR_ANRESTART)) 2663 break; /* got it. */ 2664 udelay(10); 2665 } 2666 if (!timeout) { 2667 printk(KERN_ERR "%s: TC35815 would not start auto " 2668 "negotiation BMCR=0x%04x\n", 2669 dev->name, bmcr); 2670 printk(KERN_NOTICE "%s: Performing force link " 2671 "detection.\n", dev->name); 2672 goto force_link; 2673 } else { 2674 printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name); 2675 lp->timer_state = arbwait; 2676 } 2677 } else { 2678force_link: 2679 /* Force the link up, trying first a particular mode. 2680 * Either we are here at the request of ethtool or 2681 * because the Happy Meal would not start to autoneg. 2682 */ 2683 2684 /* Disable auto-negotiation in BMCR, enable the duplex and 2685 * speed setting, init the timer state machine, and fire it off. 2686 */ 2687 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) { 2688 bmcr = BMCR_SPEED100; 2689 } else { 2690 if (ep->speed == SPEED_100) 2691 bmcr = BMCR_SPEED100; 2692 else 2693 bmcr = 0; 2694 if (ep->duplex == DUPLEX_FULL) 2695 bmcr |= BMCR_FULLDPLX; 2696 } 2697 tc_mdio_write(dev, pid, MII_BMCR, bmcr); 2698 2699 /* OK, seems we need do disable the transceiver for the first 2700 * tick to make sure we get an accurate link state at the 2701 * second tick. 2702 */ 2703 lp->timer_state = ltrywait; 2704 } 2705 2706 del_timer(&lp->timer); 2707 lp->timer_ticks = 0; 2708 lp->timer.expires = jiffies + msecs_to_jiffies(1200); 2709 add_timer(&lp->timer); 2710} 2711 2712static void tc35815_find_phy(struct net_device *dev) 2713{ 2714 struct tc35815_local *lp = dev->priv; 2715 int pid = lp->phy_addr; 2716 unsigned short id0; 2717 2718 /* find MII phy */ 2719 for (pid = 31; pid >= 0; pid--) { 2720 id0 = tc_mdio_read(dev, pid, MII_BMSR); 2721 if (id0 != 0xffff && id0 != 0x0000 && 2722 (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */ 2723 ) { 2724 lp->phy_addr = pid; 2725 break; 2726 } 2727 } 2728 if (pid < 0) { 2729 printk(KERN_ERR "%s: No MII Phy found.\n", 2730 dev->name); 2731 lp->phy_addr = pid = 0; 2732 } 2733 2734 lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1); 2735 lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2); 2736 if (netif_msg_hw(lp)) 2737 printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name, 2738 pid, lp->mii_id[0], lp->mii_id[1]); 2739} 2740 2741static void tc35815_phy_chip_init(struct net_device *dev) 2742{ 2743 struct tc35815_local *lp = dev->priv; 2744 int pid = lp->phy_addr; 2745 unsigned short bmcr; 2746 struct ethtool_cmd ecmd, *ep; 2747 2748 /* dis-isolate if needed. */ 2749 bmcr = tc_mdio_read(dev, pid, MII_BMCR); 2750 if (bmcr & BMCR_ISOLATE) { 2751 int count = 32; 2752 printk(KERN_DEBUG "%s: unisolating...", dev->name); 2753 tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE); 2754 while (--count) { 2755 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE)) 2756 break; 2757 udelay(20); 2758 } 2759 printk(" %s.\n", count ? "done" : "failed"); 2760 } 2761 2762 if (options.speed && options.duplex) { 2763 ecmd.autoneg = AUTONEG_DISABLE; 2764 ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100; 2765 ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL; 2766 ep = &ecmd; 2767 } else { 2768 ep = NULL; 2769 } 2770 tc35815_start_auto_negotiation(dev, ep); 2771} 2772 2773static void tc35815_chip_reset(struct net_device *dev) 2774{ 2775 struct tc35815_regs __iomem *tr = 2776 (struct tc35815_regs __iomem *)dev->base_addr; 2777 int i; 2778 /* reset the controller */ 2779 tc_writel(MAC_Reset, &tr->MAC_Ctl); 2780 udelay(4); /* 3200ns */ 2781 i = 0; 2782 while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) { 2783 if (i++ > 100) { 2784 printk(KERN_ERR "%s: MAC reset failed.\n", dev->name); 2785 break; 2786 } 2787 mdelay(1); 2788 } 2789 tc_writel(0, &tr->MAC_Ctl); 2790 2791 /* initialize registers to default value */ 2792 tc_writel(0, &tr->DMA_Ctl); 2793 tc_writel(0, &tr->TxThrsh); 2794 tc_writel(0, &tr->TxPollCtr); 2795 tc_writel(0, &tr->RxFragSize); 2796 tc_writel(0, &tr->Int_En); 2797 tc_writel(0, &tr->FDA_Bas); 2798 tc_writel(0, &tr->FDA_Lim); 2799 tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */ 2800 tc_writel(0, &tr->CAM_Ctl); 2801 tc_writel(0, &tr->Tx_Ctl); 2802 tc_writel(0, &tr->Rx_Ctl); 2803 tc_writel(0, &tr->CAM_Ena); 2804 (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */ 2805 2806 /* initialize internal SRAM */ 2807 tc_writel(DMA_TestMode, &tr->DMA_Ctl); 2808 for (i = 0; i < 0x1000; i += 4) { 2809 tc_writel(i, &tr->CAM_Adr); 2810 tc_writel(0, &tr->CAM_Data); 2811 } 2812 tc_writel(0, &tr->DMA_Ctl); 2813} 2814 2815static void tc35815_chip_init(struct net_device *dev) 2816{ 2817 struct tc35815_local *lp = dev->priv; 2818 struct tc35815_regs __iomem *tr = 2819 (struct tc35815_regs __iomem *)dev->base_addr; 2820 unsigned long txctl = TX_CTL_CMD; 2821 2822 tc35815_phy_chip_init(dev); 2823 2824 /* load station address to CAM */ 2825 tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr); 2826 2827 /* Enable CAM (broadcast and unicast) */ 2828 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); 2829 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); 2830 2831 /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */ 2832 if (HAVE_DMA_RXALIGN(lp)) 2833 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl); 2834 else 2835 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl); 2836#ifdef TC35815_USE_PACKEDBUFFER 2837 tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */ 2838#else 2839 tc_writel(ETH_ZLEN, &tr->RxFragSize); 2840#endif 2841 tc_writel(0, &tr->TxPollCtr); /* Batch mode */ 2842 tc_writel(TX_THRESHOLD, &tr->TxThrsh); 2843 tc_writel(INT_EN_CMD, &tr->Int_En); 2844 2845 /* set queues */ 2846 tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas); 2847 tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base, 2848 &tr->FDA_Lim); 2849 /* 2850 * Activation method: 2851 * First, enable the MAC Transmitter and the DMA Receive circuits. 2852 * Then enable the DMA Transmitter and the MAC Receive circuits. 2853 */ 2854 tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */ 2855 tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */ 2856 2857 /* start MAC transmitter */ 2858#ifndef NO_CHECK_CARRIER 2859 /* TX4939 does not have EnLCarr */ 2860 if (lp->boardtype == TC35815_TX4939) 2861 txctl &= ~Tx_EnLCarr; 2862#ifdef WORKAROUND_LOSTCAR 2863 /* WORKAROUND: ignore LostCrS in full duplex operation */ 2864 if ((lp->timer_state != asleep && lp->timer_state != lcheck) || 2865 lp->fullduplex) 2866 txctl &= ~Tx_EnLCarr; 2867#endif 2868#endif /* !NO_CHECK_CARRIER */ 2869#ifdef GATHER_TXINT 2870 txctl &= ~Tx_EnComp; /* disable global tx completion int. */ 2871#endif 2872 tc_writel(txctl, &tr->Tx_Ctl); 2873} 2874 2875#ifdef CONFIG_PM 2876static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state) 2877{ 2878 struct net_device *dev = pci_get_drvdata(pdev); 2879 struct tc35815_local *lp = dev->priv; 2880 unsigned long flags; 2881 2882 pci_save_state(pdev); 2883 if (!netif_running(dev)) 2884 return 0; 2885 netif_device_detach(dev); 2886 spin_lock_irqsave(&lp->lock, flags); 2887 del_timer(&lp->timer); /* Kill if running */ 2888 tc35815_chip_reset(dev); 2889 spin_unlock_irqrestore(&lp->lock, flags); 2890 pci_set_power_state(pdev, PCI_D3hot); 2891 return 0; 2892} 2893 2894static int tc35815_resume(struct pci_dev *pdev) 2895{ 2896 struct net_device *dev = pci_get_drvdata(pdev); 2897 struct tc35815_local *lp = dev->priv; 2898 unsigned long flags; 2899 2900 pci_restore_state(pdev); 2901 if (!netif_running(dev)) 2902 return 0; 2903 pci_set_power_state(pdev, PCI_D0); 2904 spin_lock_irqsave(&lp->lock, flags); 2905 tc35815_restart(dev); 2906 spin_unlock_irqrestore(&lp->lock, flags); 2907 netif_device_attach(dev); 2908 return 0; 2909} 2910#endif /* CONFIG_PM */ 2911 2912static struct pci_driver tc35815_pci_driver = { 2913 .name = MODNAME, 2914 .id_table = tc35815_pci_tbl, 2915 .probe = tc35815_init_one, 2916 .remove = __devexit_p(tc35815_remove_one), 2917#ifdef CONFIG_PM 2918 .suspend = tc35815_suspend, 2919 .resume = tc35815_resume, 2920#endif 2921}; 2922 2923module_param_named(speed, options.speed, int, 0); 2924MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps"); 2925module_param_named(duplex, options.duplex, int, 0); 2926MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full"); 2927module_param_named(doforce, options.doforce, int, 0); 2928MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed"); 2929 2930static int __init tc35815_init_module(void) 2931{ 2932 return pci_register_driver(&tc35815_pci_driver); 2933} 2934 2935static void __exit tc35815_cleanup_module(void) 2936{ 2937 pci_unregister_driver(&tc35815_pci_driver); 2938} 2939 2940module_init(tc35815_init_module); 2941module_exit(tc35815_cleanup_module); 2942 2943MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver"); 2944MODULE_LICENSE("GPL");