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1/* 2 * Lance ethernet driver for the MIPS processor based 3 * DECstation family 4 * 5 * 6 * adopted from sunlance.c by Richard van den Berg 7 * 8 * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki 9 * 10 * additional sources: 11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, 12 * Revision 1.2 13 * 14 * History: 15 * 16 * v0.001: The kernel accepts the code and it shows the hardware address. 17 * 18 * v0.002: Removed most sparc stuff, left only some module and dma stuff. 19 * 20 * v0.003: Enhanced base address calculation from proposals by 21 * Harald Koerfgen and Thomas Riemer. 22 * 23 * v0.004: lance-regs is pointing at the right addresses, added prom 24 * check. First start of address mapping and DMA. 25 * 26 * v0.005: started to play around with LANCE-DMA. This driver will not 27 * work for non IOASIC lances. HK 28 * 29 * v0.006: added pointer arrays to lance_private and setup routine for 30 * them in dec_lance_init. HK 31 * 32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to 33 * access the init block. This looks like one (short) word at a 34 * time, but the smallest amount the IOASIC can transfer is a 35 * (long) word. So we have a 2-2 padding here. Changed 36 * lance_init_block accordingly. The 16-16 padding for the buffers 37 * seems to be correct. HK 38 * 39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer 40 * 41 * v0.009: Module support fixes, multiple interfaces support, various 42 * bits. macro 43 * 44 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the 45 * PMAX requirement to only use halfword accesses to the 46 * buffer. macro 47 * 48 * v0.011: Converted the PMAD to the driver model. macro 49 */ 50 51#include <linux/crc32.h> 52#include <linux/delay.h> 53#include <linux/errno.h> 54#include <linux/if_ether.h> 55#include <linux/init.h> 56#include <linux/kernel.h> 57#include <linux/module.h> 58#include <linux/netdevice.h> 59#include <linux/etherdevice.h> 60#include <linux/spinlock.h> 61#include <linux/stddef.h> 62#include <linux/string.h> 63#include <linux/tc.h> 64#include <linux/types.h> 65 66#include <asm/addrspace.h> 67#include <asm/system.h> 68 69#include <asm/dec/interrupts.h> 70#include <asm/dec/ioasic.h> 71#include <asm/dec/ioasic_addrs.h> 72#include <asm/dec/kn01.h> 73#include <asm/dec/machtype.h> 74#include <asm/dec/system.h> 75 76static char version[] __devinitdata = 77"declance.c: v0.011 by Linux MIPS DECstation task force\n"; 78 79MODULE_AUTHOR("Linux MIPS DECstation task force"); 80MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); 81MODULE_LICENSE("GPL"); 82 83#define __unused __attribute__ ((unused)) 84 85/* 86 * card types 87 */ 88#define ASIC_LANCE 1 89#define PMAD_LANCE 2 90#define PMAX_LANCE 3 91 92 93#define LE_CSR0 0 94#define LE_CSR1 1 95#define LE_CSR2 2 96#define LE_CSR3 3 97 98#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 99 100#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 101#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 102#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 103#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 104#define LE_C0_MERR 0x0800 /* ME: Memory error */ 105#define LE_C0_RINT 0x0400 /* Received interrupt */ 106#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 107#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 108#define LE_C0_INTR 0x0080 /* Interrupt or error */ 109#define LE_C0_INEA 0x0040 /* Interrupt enable */ 110#define LE_C0_RXON 0x0020 /* Receiver on */ 111#define LE_C0_TXON 0x0010 /* Transmitter on */ 112#define LE_C0_TDMD 0x0008 /* Transmitter demand */ 113#define LE_C0_STOP 0x0004 /* Stop the card */ 114#define LE_C0_STRT 0x0002 /* Start the card */ 115#define LE_C0_INIT 0x0001 /* Init the card */ 116 117#define LE_C3_BSWP 0x4 /* SWAP */ 118#define LE_C3_ACON 0x2 /* ALE Control */ 119#define LE_C3_BCON 0x1 /* Byte control */ 120 121/* Receive message descriptor 1 */ 122#define LE_R1_OWN 0x8000 /* Who owns the entry */ 123#define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ 124#define LE_R1_FRA 0x2000 /* FRA: Frame error */ 125#define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ 126#define LE_R1_CRC 0x0800 /* CRC error */ 127#define LE_R1_BUF 0x0400 /* BUF: Buffer error */ 128#define LE_R1_SOP 0x0200 /* Start of packet */ 129#define LE_R1_EOP 0x0100 /* End of packet */ 130#define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ 131 132/* Transmit message descriptor 1 */ 133#define LE_T1_OWN 0x8000 /* Lance owns the packet */ 134#define LE_T1_ERR 0x4000 /* Error summary */ 135#define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ 136#define LE_T1_EONE 0x0800 /* Error: one retry needed */ 137#define LE_T1_EDEF 0x0400 /* Error: deferred */ 138#define LE_T1_SOP 0x0200 /* Start of packet */ 139#define LE_T1_EOP 0x0100 /* End of packet */ 140#define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ 141 142#define LE_T3_BUF 0x8000 /* Buffer error */ 143#define LE_T3_UFL 0x4000 /* Error underflow */ 144#define LE_T3_LCOL 0x1000 /* Error late collision */ 145#define LE_T3_CLOS 0x0800 /* Error carrier loss */ 146#define LE_T3_RTY 0x0400 /* Error retry */ 147#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 148 149/* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 150 151#ifndef LANCE_LOG_TX_BUFFERS 152#define LANCE_LOG_TX_BUFFERS 4 153#define LANCE_LOG_RX_BUFFERS 4 154#endif 155 156#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 157#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 158 159#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 160#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 161 162#define PKT_BUF_SZ 1536 163#define RX_BUFF_SIZE PKT_BUF_SZ 164#define TX_BUFF_SIZE PKT_BUF_SZ 165 166#undef TEST_HITS 167#define ZERO 0 168 169/* 170 * The DS2100/3100 have a linear 64 kB buffer which supports halfword 171 * accesses only. Each halfword of the buffer is word-aligned in the 172 * CPU address space. 173 * 174 * The PMAD-AA has a 128 kB buffer on-board. 175 * 176 * The IOASIC LANCE devices use a shared memory region. This region 177 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB 178 * boundary. The LANCE sees this as a 64 kB long continuous memory 179 * region. 180 * 181 * The LANCE's DMA address is used as an index in this buffer and DMA 182 * takes place in bursts of eight 16-bit words which are packed into 183 * four 32-bit words by the IOASIC. This leads to a strange padding: 184 * 16 bytes of valid data followed by a 16 byte gap :-(. 185 */ 186 187struct lance_rx_desc { 188 unsigned short rmd0; /* low address of packet */ 189 unsigned short rmd1; /* high address of packet 190 and descriptor bits */ 191 short length; /* 2s complement (negative!) 192 of buffer length */ 193 unsigned short mblength; /* actual number of bytes received */ 194}; 195 196struct lance_tx_desc { 197 unsigned short tmd0; /* low address of packet */ 198 unsigned short tmd1; /* high address of packet 199 and descriptor bits */ 200 short length; /* 2s complement (negative!) 201 of buffer length */ 202 unsigned short misc; 203}; 204 205 206/* First part of the LANCE initialization block, described in databook. */ 207struct lance_init_block { 208 unsigned short mode; /* pre-set mode (reg. 15) */ 209 210 unsigned short phys_addr[3]; /* physical ethernet address */ 211 unsigned short filter[4]; /* multicast filter */ 212 213 /* Receive and transmit ring base, along with extra bits. */ 214 unsigned short rx_ptr; /* receive descriptor addr */ 215 unsigned short rx_len; /* receive len and high addr */ 216 unsigned short tx_ptr; /* transmit descriptor addr */ 217 unsigned short tx_len; /* transmit len and high addr */ 218 219 short gap[4]; 220 221 /* The buffer descriptors */ 222 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 223 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 224}; 225 226#define BUF_OFFSET_CPU sizeof(struct lance_init_block) 227#define BUF_OFFSET_LNC sizeof(struct lance_init_block) 228 229#define shift_off(off, type) \ 230 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) 231 232#define lib_off(rt, type) \ 233 shift_off(offsetof(struct lance_init_block, rt), type) 234 235#define lib_ptr(ib, rt, type) \ 236 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) 237 238#define rds_off(rt, type) \ 239 shift_off(offsetof(struct lance_rx_desc, rt), type) 240 241#define rds_ptr(rd, rt, type) \ 242 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) 243 244#define tds_off(rt, type) \ 245 shift_off(offsetof(struct lance_tx_desc, rt), type) 246 247#define tds_ptr(td, rt, type) \ 248 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) 249 250struct lance_private { 251 struct net_device *next; 252 int type; 253 int dma_irq; 254 volatile struct lance_regs *ll; 255 256 spinlock_t lock; 257 258 int rx_new, tx_new; 259 int rx_old, tx_old; 260 261 struct net_device_stats stats; 262 263 unsigned short busmaster_regval; 264 265 struct timer_list multicast_timer; 266 267 /* Pointers to the ring buffers as seen from the CPU */ 268 char *rx_buf_ptr_cpu[RX_RING_SIZE]; 269 char *tx_buf_ptr_cpu[TX_RING_SIZE]; 270 271 /* Pointers to the ring buffers as seen from the LANCE */ 272 uint rx_buf_ptr_lnc[RX_RING_SIZE]; 273 uint tx_buf_ptr_lnc[TX_RING_SIZE]; 274}; 275 276#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 277 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 278 lp->tx_old - lp->tx_new-1) 279 280/* The lance control ports are at an absolute address, machine and tc-slot 281 * dependent. 282 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, 283 * so we have to give the structure an extra member making rap pointing 284 * at the right address 285 */ 286struct lance_regs { 287 volatile unsigned short rdp; /* register data port */ 288 unsigned short pad; 289 volatile unsigned short rap; /* register address port */ 290}; 291 292int dec_lance_debug = 2; 293 294static struct tc_driver dec_lance_tc_driver; 295static struct net_device *root_lance_dev; 296 297static inline void writereg(volatile unsigned short *regptr, short value) 298{ 299 *regptr = value; 300 iob(); 301} 302 303/* Load the CSR registers */ 304static void load_csrs(struct lance_private *lp) 305{ 306 volatile struct lance_regs *ll = lp->ll; 307 uint leptr; 308 309 /* The address space as seen from the LANCE 310 * begins at address 0. HK 311 */ 312 leptr = 0; 313 314 writereg(&ll->rap, LE_CSR1); 315 writereg(&ll->rdp, (leptr & 0xFFFF)); 316 writereg(&ll->rap, LE_CSR2); 317 writereg(&ll->rdp, leptr >> 16); 318 writereg(&ll->rap, LE_CSR3); 319 writereg(&ll->rdp, lp->busmaster_regval); 320 321 /* Point back to csr0 */ 322 writereg(&ll->rap, LE_CSR0); 323} 324 325/* 326 * Our specialized copy routines 327 * 328 */ 329static void cp_to_buf(const int type, void *to, const void *from, int len) 330{ 331 unsigned short *tp, *fp, clen; 332 unsigned char *rtp, *rfp; 333 334 if (type == PMAD_LANCE) { 335 memcpy(to, from, len); 336 } else if (type == PMAX_LANCE) { 337 clen = len >> 1; 338 tp = (unsigned short *) to; 339 fp = (unsigned short *) from; 340 341 while (clen--) { 342 *tp++ = *fp++; 343 tp++; 344 } 345 346 clen = len & 1; 347 rtp = (unsigned char *) tp; 348 rfp = (unsigned char *) fp; 349 while (clen--) { 350 *rtp++ = *rfp++; 351 } 352 } else { 353 /* 354 * copy 16 Byte chunks 355 */ 356 clen = len >> 4; 357 tp = (unsigned short *) to; 358 fp = (unsigned short *) from; 359 while (clen--) { 360 *tp++ = *fp++; 361 *tp++ = *fp++; 362 *tp++ = *fp++; 363 *tp++ = *fp++; 364 *tp++ = *fp++; 365 *tp++ = *fp++; 366 *tp++ = *fp++; 367 *tp++ = *fp++; 368 tp += 8; 369 } 370 371 /* 372 * do the rest, if any. 373 */ 374 clen = len & 15; 375 rtp = (unsigned char *) tp; 376 rfp = (unsigned char *) fp; 377 while (clen--) { 378 *rtp++ = *rfp++; 379 } 380 } 381 382 iob(); 383} 384 385static void cp_from_buf(const int type, void *to, const void *from, int len) 386{ 387 unsigned short *tp, *fp, clen; 388 unsigned char *rtp, *rfp; 389 390 if (type == PMAD_LANCE) { 391 memcpy(to, from, len); 392 } else if (type == PMAX_LANCE) { 393 clen = len >> 1; 394 tp = (unsigned short *) to; 395 fp = (unsigned short *) from; 396 while (clen--) { 397 *tp++ = *fp++; 398 fp++; 399 } 400 401 clen = len & 1; 402 403 rtp = (unsigned char *) tp; 404 rfp = (unsigned char *) fp; 405 406 while (clen--) { 407 *rtp++ = *rfp++; 408 } 409 } else { 410 411 /* 412 * copy 16 Byte chunks 413 */ 414 clen = len >> 4; 415 tp = (unsigned short *) to; 416 fp = (unsigned short *) from; 417 while (clen--) { 418 *tp++ = *fp++; 419 *tp++ = *fp++; 420 *tp++ = *fp++; 421 *tp++ = *fp++; 422 *tp++ = *fp++; 423 *tp++ = *fp++; 424 *tp++ = *fp++; 425 *tp++ = *fp++; 426 fp += 8; 427 } 428 429 /* 430 * do the rest, if any. 431 */ 432 clen = len & 15; 433 rtp = (unsigned char *) tp; 434 rfp = (unsigned char *) fp; 435 while (clen--) { 436 *rtp++ = *rfp++; 437 } 438 439 440 } 441 442} 443 444/* Setup the Lance Rx and Tx rings */ 445static void lance_init_ring(struct net_device *dev) 446{ 447 struct lance_private *lp = netdev_priv(dev); 448 volatile u16 *ib = (volatile u16 *)dev->mem_start; 449 uint leptr; 450 int i; 451 452 /* Lock out other processes while setting up hardware */ 453 netif_stop_queue(dev); 454 lp->rx_new = lp->tx_new = 0; 455 lp->rx_old = lp->tx_old = 0; 456 457 /* Copy the ethernet address to the lance init block. 458 * XXX bit 0 of the physical address registers has to be zero 459 */ 460 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | 461 dev->dev_addr[0]; 462 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | 463 dev->dev_addr[2]; 464 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | 465 dev->dev_addr[4]; 466 /* Setup the initialization block */ 467 468 /* Setup rx descriptor pointer */ 469 leptr = offsetof(struct lance_init_block, brx_ring); 470 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | 471 (leptr >> 16); 472 *lib_ptr(ib, rx_ptr, lp->type) = leptr; 473 if (ZERO) 474 printk("RX ptr: %8.8x(%8.8x)\n", 475 leptr, lib_off(brx_ring, lp->type)); 476 477 /* Setup tx descriptor pointer */ 478 leptr = offsetof(struct lance_init_block, btx_ring); 479 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | 480 (leptr >> 16); 481 *lib_ptr(ib, tx_ptr, lp->type) = leptr; 482 if (ZERO) 483 printk("TX ptr: %8.8x(%8.8x)\n", 484 leptr, lib_off(btx_ring, lp->type)); 485 486 if (ZERO) 487 printk("TX rings:\n"); 488 489 /* Setup the Tx ring entries */ 490 for (i = 0; i < TX_RING_SIZE; i++) { 491 leptr = lp->tx_buf_ptr_lnc[i]; 492 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; 493 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & 494 0xff; 495 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; 496 /* The ones required by tmd2 */ 497 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; 498 if (i < 3 && ZERO) 499 printk("%d: 0x%8.8x(0x%8.8x)\n", 500 i, leptr, (uint)lp->tx_buf_ptr_cpu[i]); 501 } 502 503 /* Setup the Rx ring entries */ 504 if (ZERO) 505 printk("RX rings:\n"); 506 for (i = 0; i < RX_RING_SIZE; i++) { 507 leptr = lp->rx_buf_ptr_lnc[i]; 508 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr; 509 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) & 510 0xff) | 511 LE_R1_OWN; 512 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE | 513 0xf000; 514 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0; 515 if (i < 3 && ZERO) 516 printk("%d: 0x%8.8x(0x%8.8x)\n", 517 i, leptr, (uint)lp->rx_buf_ptr_cpu[i]); 518 } 519 iob(); 520} 521 522static int init_restart_lance(struct lance_private *lp) 523{ 524 volatile struct lance_regs *ll = lp->ll; 525 int i; 526 527 writereg(&ll->rap, LE_CSR0); 528 writereg(&ll->rdp, LE_C0_INIT); 529 530 /* Wait for the lance to complete initialization */ 531 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) { 532 udelay(10); 533 } 534 if ((i == 100) || (ll->rdp & LE_C0_ERR)) { 535 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 536 i, ll->rdp); 537 return -1; 538 } 539 if ((ll->rdp & LE_C0_ERR)) { 540 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 541 i, ll->rdp); 542 return -1; 543 } 544 writereg(&ll->rdp, LE_C0_IDON); 545 writereg(&ll->rdp, LE_C0_STRT); 546 writereg(&ll->rdp, LE_C0_INEA); 547 548 return 0; 549} 550 551static int lance_rx(struct net_device *dev) 552{ 553 struct lance_private *lp = netdev_priv(dev); 554 volatile u16 *ib = (volatile u16 *)dev->mem_start; 555 volatile u16 *rd; 556 unsigned short bits; 557 int entry, len; 558 struct sk_buff *skb; 559 560#ifdef TEST_HITS 561 { 562 int i; 563 564 printk("["); 565 for (i = 0; i < RX_RING_SIZE; i++) { 566 if (i == lp->rx_new) 567 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 568 lp->type) & 569 LE_R1_OWN ? "_" : "X"); 570 else 571 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 572 lp->type) & 573 LE_R1_OWN ? "." : "1"); 574 } 575 printk("]"); 576 } 577#endif 578 579 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); 580 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); 581 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { 582 entry = lp->rx_new; 583 584 /* We got an incomplete frame? */ 585 if ((bits & LE_R1_POK) != LE_R1_POK) { 586 lp->stats.rx_over_errors++; 587 lp->stats.rx_errors++; 588 } else if (bits & LE_R1_ERR) { 589 /* Count only the end frame as a rx error, 590 * not the beginning 591 */ 592 if (bits & LE_R1_BUF) 593 lp->stats.rx_fifo_errors++; 594 if (bits & LE_R1_CRC) 595 lp->stats.rx_crc_errors++; 596 if (bits & LE_R1_OFL) 597 lp->stats.rx_over_errors++; 598 if (bits & LE_R1_FRA) 599 lp->stats.rx_frame_errors++; 600 if (bits & LE_R1_EOP) 601 lp->stats.rx_errors++; 602 } else { 603 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; 604 skb = dev_alloc_skb(len + 2); 605 606 if (skb == 0) { 607 printk("%s: Memory squeeze, deferring packet.\n", 608 dev->name); 609 lp->stats.rx_dropped++; 610 *rds_ptr(rd, mblength, lp->type) = 0; 611 *rds_ptr(rd, rmd1, lp->type) = 612 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 613 0xff) | LE_R1_OWN; 614 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 615 return 0; 616 } 617 lp->stats.rx_bytes += len; 618 619 skb->dev = dev; 620 skb_reserve(skb, 2); /* 16 byte align */ 621 skb_put(skb, len); /* make room */ 622 623 cp_from_buf(lp->type, skb->data, 624 (char *)lp->rx_buf_ptr_cpu[entry], len); 625 626 skb->protocol = eth_type_trans(skb, dev); 627 netif_rx(skb); 628 dev->last_rx = jiffies; 629 lp->stats.rx_packets++; 630 } 631 632 /* Return the packet to the pool */ 633 *rds_ptr(rd, mblength, lp->type) = 0; 634 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; 635 *rds_ptr(rd, rmd1, lp->type) = 636 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN; 637 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 638 } 639 return 0; 640} 641 642static void lance_tx(struct net_device *dev) 643{ 644 struct lance_private *lp = netdev_priv(dev); 645 volatile u16 *ib = (volatile u16 *)dev->mem_start; 646 volatile struct lance_regs *ll = lp->ll; 647 volatile u16 *td; 648 int i, j; 649 int status; 650 651 j = lp->tx_old; 652 653 spin_lock(&lp->lock); 654 655 for (i = j; i != lp->tx_new; i = j) { 656 td = lib_ptr(ib, btx_ring[i], lp->type); 657 /* If we hit a packet not owned by us, stop */ 658 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN) 659 break; 660 661 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) { 662 status = *tds_ptr(td, misc, lp->type); 663 664 lp->stats.tx_errors++; 665 if (status & LE_T3_RTY) 666 lp->stats.tx_aborted_errors++; 667 if (status & LE_T3_LCOL) 668 lp->stats.tx_window_errors++; 669 670 if (status & LE_T3_CLOS) { 671 lp->stats.tx_carrier_errors++; 672 printk("%s: Carrier Lost\n", dev->name); 673 /* Stop the lance */ 674 writereg(&ll->rap, LE_CSR0); 675 writereg(&ll->rdp, LE_C0_STOP); 676 lance_init_ring(dev); 677 load_csrs(lp); 678 init_restart_lance(lp); 679 goto out; 680 } 681 /* Buffer errors and underflows turn off the 682 * transmitter, restart the adapter. 683 */ 684 if (status & (LE_T3_BUF | LE_T3_UFL)) { 685 lp->stats.tx_fifo_errors++; 686 687 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 688 dev->name); 689 /* Stop the lance */ 690 writereg(&ll->rap, LE_CSR0); 691 writereg(&ll->rdp, LE_C0_STOP); 692 lance_init_ring(dev); 693 load_csrs(lp); 694 init_restart_lance(lp); 695 goto out; 696 } 697 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) == 698 LE_T1_POK) { 699 /* 700 * So we don't count the packet more than once. 701 */ 702 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK); 703 704 /* One collision before packet was sent. */ 705 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE) 706 lp->stats.collisions++; 707 708 /* More than one collision, be optimistic. */ 709 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE) 710 lp->stats.collisions += 2; 711 712 lp->stats.tx_packets++; 713 } 714 j = (j + 1) & TX_RING_MOD_MASK; 715 } 716 lp->tx_old = j; 717out: 718 if (netif_queue_stopped(dev) && 719 TX_BUFFS_AVAIL > 0) 720 netif_wake_queue(dev); 721 722 spin_unlock(&lp->lock); 723} 724 725static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id) 726{ 727 struct net_device *dev = dev_id; 728 729 printk("%s: DMA error\n", dev->name); 730 return IRQ_HANDLED; 731} 732 733static irqreturn_t lance_interrupt(const int irq, void *dev_id) 734{ 735 struct net_device *dev = dev_id; 736 struct lance_private *lp = netdev_priv(dev); 737 volatile struct lance_regs *ll = lp->ll; 738 int csr0; 739 740 writereg(&ll->rap, LE_CSR0); 741 csr0 = ll->rdp; 742 743 /* Acknowledge all the interrupt sources ASAP */ 744 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT)); 745 746 if ((csr0 & LE_C0_ERR)) { 747 /* Clear the error condition */ 748 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 749 LE_C0_CERR | LE_C0_MERR); 750 } 751 if (csr0 & LE_C0_RINT) 752 lance_rx(dev); 753 754 if (csr0 & LE_C0_TINT) 755 lance_tx(dev); 756 757 if (csr0 & LE_C0_BABL) 758 lp->stats.tx_errors++; 759 760 if (csr0 & LE_C0_MISS) 761 lp->stats.rx_errors++; 762 763 if (csr0 & LE_C0_MERR) { 764 printk("%s: Memory error, status %04x\n", dev->name, csr0); 765 766 writereg(&ll->rdp, LE_C0_STOP); 767 768 lance_init_ring(dev); 769 load_csrs(lp); 770 init_restart_lance(lp); 771 netif_wake_queue(dev); 772 } 773 774 writereg(&ll->rdp, LE_C0_INEA); 775 writereg(&ll->rdp, LE_C0_INEA); 776 return IRQ_HANDLED; 777} 778 779struct net_device *last_dev = 0; 780 781static int lance_open(struct net_device *dev) 782{ 783 volatile u16 *ib = (volatile u16 *)dev->mem_start; 784 struct lance_private *lp = netdev_priv(dev); 785 volatile struct lance_regs *ll = lp->ll; 786 int status = 0; 787 788 last_dev = dev; 789 790 /* Stop the Lance */ 791 writereg(&ll->rap, LE_CSR0); 792 writereg(&ll->rdp, LE_C0_STOP); 793 794 /* Set mode and clear multicast filter only at device open, 795 * so that lance_init_ring() called at any error will not 796 * forget multicast filters. 797 * 798 * BTW it is common bug in all lance drivers! --ANK 799 */ 800 *lib_ptr(ib, mode, lp->type) = 0; 801 *lib_ptr(ib, filter[0], lp->type) = 0; 802 *lib_ptr(ib, filter[1], lp->type) = 0; 803 *lib_ptr(ib, filter[2], lp->type) = 0; 804 *lib_ptr(ib, filter[3], lp->type) = 0; 805 806 lance_init_ring(dev); 807 load_csrs(lp); 808 809 netif_start_queue(dev); 810 811 /* Associate IRQ with lance_interrupt */ 812 if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) { 813 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq); 814 return -EAGAIN; 815 } 816 if (lp->dma_irq >= 0) { 817 unsigned long flags; 818 819 if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0, 820 "lance error", dev)) { 821 free_irq(dev->irq, dev); 822 printk("%s: Can't get DMA IRQ %d\n", dev->name, 823 lp->dma_irq); 824 return -EAGAIN; 825 } 826 827 spin_lock_irqsave(&ioasic_ssr_lock, flags); 828 829 fast_mb(); 830 /* Enable I/O ASIC LANCE DMA. */ 831 ioasic_write(IO_REG_SSR, 832 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN); 833 834 fast_mb(); 835 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 836 } 837 838 status = init_restart_lance(lp); 839 return status; 840} 841 842static int lance_close(struct net_device *dev) 843{ 844 struct lance_private *lp = netdev_priv(dev); 845 volatile struct lance_regs *ll = lp->ll; 846 847 netif_stop_queue(dev); 848 del_timer_sync(&lp->multicast_timer); 849 850 /* Stop the card */ 851 writereg(&ll->rap, LE_CSR0); 852 writereg(&ll->rdp, LE_C0_STOP); 853 854 if (lp->dma_irq >= 0) { 855 unsigned long flags; 856 857 spin_lock_irqsave(&ioasic_ssr_lock, flags); 858 859 fast_mb(); 860 /* Disable I/O ASIC LANCE DMA. */ 861 ioasic_write(IO_REG_SSR, 862 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN); 863 864 fast_iob(); 865 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 866 867 free_irq(lp->dma_irq, dev); 868 } 869 free_irq(dev->irq, dev); 870 return 0; 871} 872 873static inline int lance_reset(struct net_device *dev) 874{ 875 struct lance_private *lp = netdev_priv(dev); 876 volatile struct lance_regs *ll = lp->ll; 877 int status; 878 879 /* Stop the lance */ 880 writereg(&ll->rap, LE_CSR0); 881 writereg(&ll->rdp, LE_C0_STOP); 882 883 lance_init_ring(dev); 884 load_csrs(lp); 885 dev->trans_start = jiffies; 886 status = init_restart_lance(lp); 887 return status; 888} 889 890static void lance_tx_timeout(struct net_device *dev) 891{ 892 struct lance_private *lp = netdev_priv(dev); 893 volatile struct lance_regs *ll = lp->ll; 894 895 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 896 dev->name, ll->rdp); 897 lance_reset(dev); 898 netif_wake_queue(dev); 899} 900 901static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 902{ 903 struct lance_private *lp = netdev_priv(dev); 904 volatile struct lance_regs *ll = lp->ll; 905 volatile u16 *ib = (volatile u16 *)dev->mem_start; 906 int entry, len; 907 908 len = skb->len; 909 910 if (len < ETH_ZLEN) { 911 if (skb_padto(skb, ETH_ZLEN)) 912 return 0; 913 len = ETH_ZLEN; 914 } 915 916 lp->stats.tx_bytes += len; 917 918 entry = lp->tx_new; 919 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len); 920 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0; 921 922 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data, len); 923 924 /* Now, give the packet to the lance */ 925 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) = 926 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) | 927 (LE_T1_POK | LE_T1_OWN); 928 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK; 929 930 if (TX_BUFFS_AVAIL <= 0) 931 netif_stop_queue(dev); 932 933 /* Kick the lance: transmit now */ 934 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD); 935 936 spin_unlock_irq(&lp->lock); 937 938 dev->trans_start = jiffies; 939 dev_kfree_skb(skb); 940 941 return 0; 942} 943 944static struct net_device_stats *lance_get_stats(struct net_device *dev) 945{ 946 struct lance_private *lp = netdev_priv(dev); 947 948 return &lp->stats; 949} 950 951static void lance_load_multicast(struct net_device *dev) 952{ 953 struct lance_private *lp = netdev_priv(dev); 954 volatile u16 *ib = (volatile u16 *)dev->mem_start; 955 struct dev_mc_list *dmi = dev->mc_list; 956 char *addrs; 957 int i; 958 u32 crc; 959 960 /* set all multicast bits */ 961 if (dev->flags & IFF_ALLMULTI) { 962 *lib_ptr(ib, filter[0], lp->type) = 0xffff; 963 *lib_ptr(ib, filter[1], lp->type) = 0xffff; 964 *lib_ptr(ib, filter[2], lp->type) = 0xffff; 965 *lib_ptr(ib, filter[3], lp->type) = 0xffff; 966 return; 967 } 968 /* clear the multicast filter */ 969 *lib_ptr(ib, filter[0], lp->type) = 0; 970 *lib_ptr(ib, filter[1], lp->type) = 0; 971 *lib_ptr(ib, filter[2], lp->type) = 0; 972 *lib_ptr(ib, filter[3], lp->type) = 0; 973 974 /* Add addresses */ 975 for (i = 0; i < dev->mc_count; i++) { 976 addrs = dmi->dmi_addr; 977 dmi = dmi->next; 978 979 /* multicast address? */ 980 if (!(*addrs & 1)) 981 continue; 982 983 crc = ether_crc_le(ETH_ALEN, addrs); 984 crc = crc >> 26; 985 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf); 986 } 987 return; 988} 989 990static void lance_set_multicast(struct net_device *dev) 991{ 992 struct lance_private *lp = netdev_priv(dev); 993 volatile u16 *ib = (volatile u16 *)dev->mem_start; 994 volatile struct lance_regs *ll = lp->ll; 995 996 if (!netif_running(dev)) 997 return; 998 999 if (lp->tx_old != lp->tx_new) { 1000 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100); 1001 netif_wake_queue(dev); 1002 return; 1003 } 1004 1005 netif_stop_queue(dev); 1006 1007 writereg(&ll->rap, LE_CSR0); 1008 writereg(&ll->rdp, LE_C0_STOP); 1009 1010 lance_init_ring(dev); 1011 1012 if (dev->flags & IFF_PROMISC) { 1013 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM; 1014 } else { 1015 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM; 1016 lance_load_multicast(dev); 1017 } 1018 load_csrs(lp); 1019 init_restart_lance(lp); 1020 netif_wake_queue(dev); 1021} 1022 1023static void lance_set_multicast_retry(unsigned long _opaque) 1024{ 1025 struct net_device *dev = (struct net_device *) _opaque; 1026 1027 lance_set_multicast(dev); 1028} 1029 1030static int __init dec_lance_probe(struct device *bdev, const int type) 1031{ 1032 static unsigned version_printed; 1033 static const char fmt[] = "declance%d"; 1034 char name[10]; 1035 struct net_device *dev; 1036 struct lance_private *lp; 1037 volatile struct lance_regs *ll; 1038 resource_size_t start = 0, len = 0; 1039 int i, ret; 1040 unsigned long esar_base; 1041 unsigned char *esar; 1042 1043 if (dec_lance_debug && version_printed++ == 0) 1044 printk(version); 1045 1046 if (bdev) 1047 snprintf(name, sizeof(name), "%s", bdev->bus_id); 1048 else { 1049 i = 0; 1050 dev = root_lance_dev; 1051 while (dev) { 1052 i++; 1053 lp = (struct lance_private *)dev->priv; 1054 dev = lp->next; 1055 } 1056 snprintf(name, sizeof(name), fmt, i); 1057 } 1058 1059 dev = alloc_etherdev(sizeof(struct lance_private)); 1060 if (!dev) { 1061 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n", 1062 name); 1063 ret = -ENOMEM; 1064 goto err_out; 1065 } 1066 1067 /* 1068 * alloc_etherdev ensures the data structures used by the LANCE 1069 * are aligned. 1070 */ 1071 lp = netdev_priv(dev); 1072 spin_lock_init(&lp->lock); 1073 1074 lp->type = type; 1075 switch (type) { 1076 case ASIC_LANCE: 1077 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); 1078 1079 /* buffer space for the on-board LANCE shared memory */ 1080 /* 1081 * FIXME: ugly hack! 1082 */ 1083 dev->mem_start = CKSEG1ADDR(0x00020000); 1084 dev->mem_end = dev->mem_start + 0x00020000; 1085 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1086 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); 1087 1088 /* Workaround crash with booting KN04 2.1k from Disk */ 1089 memset((void *)dev->mem_start, 0, 1090 dev->mem_end - dev->mem_start); 1091 1092 /* 1093 * setup the pointer arrays, this sucks [tm] :-( 1094 */ 1095 for (i = 0; i < RX_RING_SIZE; i++) { 1096 lp->rx_buf_ptr_cpu[i] = 1097 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1098 2 * i * RX_BUFF_SIZE); 1099 lp->rx_buf_ptr_lnc[i] = 1100 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1101 } 1102 for (i = 0; i < TX_RING_SIZE; i++) { 1103 lp->tx_buf_ptr_cpu[i] = 1104 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1105 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1106 2 * i * TX_BUFF_SIZE); 1107 lp->tx_buf_ptr_lnc[i] = 1108 (BUF_OFFSET_LNC + 1109 RX_RING_SIZE * RX_BUFF_SIZE + 1110 i * TX_BUFF_SIZE); 1111 } 1112 1113 /* Setup I/O ASIC LANCE DMA. */ 1114 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR]; 1115 ioasic_write(IO_REG_LANCE_DMA_P, 1116 CPHYSADDR(dev->mem_start) << 3); 1117 1118 break; 1119#ifdef CONFIG_TC 1120 case PMAD_LANCE: 1121 dev_set_drvdata(bdev, dev); 1122 1123 start = to_tc_dev(bdev)->resource.start; 1124 len = to_tc_dev(bdev)->resource.end - start + 1; 1125 if (!request_mem_region(start, len, bdev->bus_id)) { 1126 printk(KERN_ERR 1127 "%s: Unable to reserve MMIO resource\n", 1128 bdev->bus_id); 1129 ret = -EBUSY; 1130 goto err_out_dev; 1131 } 1132 1133 dev->mem_start = CKSEG1ADDR(start); 1134 dev->mem_end = dev->mem_start + 0x100000; 1135 dev->base_addr = dev->mem_start + 0x100000; 1136 dev->irq = to_tc_dev(bdev)->interrupt; 1137 esar_base = dev->mem_start + 0x1c0002; 1138 lp->dma_irq = -1; 1139 1140 for (i = 0; i < RX_RING_SIZE; i++) { 1141 lp->rx_buf_ptr_cpu[i] = 1142 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1143 i * RX_BUFF_SIZE); 1144 lp->rx_buf_ptr_lnc[i] = 1145 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1146 } 1147 for (i = 0; i < TX_RING_SIZE; i++) { 1148 lp->tx_buf_ptr_cpu[i] = 1149 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1150 RX_RING_SIZE * RX_BUFF_SIZE + 1151 i * TX_BUFF_SIZE); 1152 lp->tx_buf_ptr_lnc[i] = 1153 (BUF_OFFSET_LNC + 1154 RX_RING_SIZE * RX_BUFF_SIZE + 1155 i * TX_BUFF_SIZE); 1156 } 1157 1158 break; 1159#endif 1160 case PMAX_LANCE: 1161 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1162 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); 1163 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); 1164 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE; 1165 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); 1166 lp->dma_irq = -1; 1167 1168 /* 1169 * setup the pointer arrays, this sucks [tm] :-( 1170 */ 1171 for (i = 0; i < RX_RING_SIZE; i++) { 1172 lp->rx_buf_ptr_cpu[i] = 1173 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1174 2 * i * RX_BUFF_SIZE); 1175 lp->rx_buf_ptr_lnc[i] = 1176 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1177 } 1178 for (i = 0; i < TX_RING_SIZE; i++) { 1179 lp->tx_buf_ptr_cpu[i] = 1180 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1181 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1182 2 * i * TX_BUFF_SIZE); 1183 lp->tx_buf_ptr_lnc[i] = 1184 (BUF_OFFSET_LNC + 1185 RX_RING_SIZE * RX_BUFF_SIZE + 1186 i * TX_BUFF_SIZE); 1187 } 1188 1189 break; 1190 1191 default: 1192 printk(KERN_ERR "%s: declance_init called with unknown type\n", 1193 name); 1194 ret = -ENODEV; 1195 goto err_out_dev; 1196 } 1197 1198 ll = (struct lance_regs *) dev->base_addr; 1199 esar = (unsigned char *) esar_base; 1200 1201 /* prom checks */ 1202 /* First, check for test pattern */ 1203 if (esar[0x60] != 0xff && esar[0x64] != 0x00 && 1204 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) { 1205 printk(KERN_ERR 1206 "%s: Ethernet station address prom not found!\n", 1207 name); 1208 ret = -ENODEV; 1209 goto err_out_resource; 1210 } 1211 /* Check the prom contents */ 1212 for (i = 0; i < 8; i++) { 1213 if (esar[i * 4] != esar[0x3c - i * 4] && 1214 esar[i * 4] != esar[0x40 + i * 4] && 1215 esar[0x3c - i * 4] != esar[0x40 + i * 4]) { 1216 printk(KERN_ERR "%s: Something is wrong with the " 1217 "ethernet station address prom!\n", name); 1218 ret = -ENODEV; 1219 goto err_out_resource; 1220 } 1221 } 1222 1223 /* Copy the ethernet address to the device structure, later to the 1224 * lance initialization block so the lance gets it every time it's 1225 * (re)initialized. 1226 */ 1227 switch (type) { 1228 case ASIC_LANCE: 1229 printk("%s: IOASIC onboard LANCE, addr = ", name); 1230 break; 1231 case PMAD_LANCE: 1232 printk("%s: PMAD-AA, addr = ", name); 1233 break; 1234 case PMAX_LANCE: 1235 printk("%s: PMAX onboard LANCE, addr = ", name); 1236 break; 1237 } 1238 for (i = 0; i < 6; i++) { 1239 dev->dev_addr[i] = esar[i * 4]; 1240 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':'); 1241 } 1242 1243 printk(" irq = %d\n", dev->irq); 1244 1245 dev->open = &lance_open; 1246 dev->stop = &lance_close; 1247 dev->hard_start_xmit = &lance_start_xmit; 1248 dev->tx_timeout = &lance_tx_timeout; 1249 dev->watchdog_timeo = 5*HZ; 1250 dev->get_stats = &lance_get_stats; 1251 dev->set_multicast_list = &lance_set_multicast; 1252 1253 /* lp->ll is the location of the registers for lance card */ 1254 lp->ll = ll; 1255 1256 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA 1257 * specification. 1258 */ 1259 lp->busmaster_regval = 0; 1260 1261 dev->dma = 0; 1262 1263 /* We cannot sleep if the chip is busy during a 1264 * multicast list update event, because such events 1265 * can occur from interrupts (ex. IPv6). So we 1266 * use a timer to try again later when necessary. -DaveM 1267 */ 1268 init_timer(&lp->multicast_timer); 1269 lp->multicast_timer.data = (unsigned long) dev; 1270 lp->multicast_timer.function = &lance_set_multicast_retry; 1271 1272 ret = register_netdev(dev); 1273 if (ret) { 1274 printk(KERN_ERR 1275 "%s: Unable to register netdev, aborting.\n", name); 1276 goto err_out_resource; 1277 } 1278 1279 if (!bdev) { 1280 lp->next = root_lance_dev; 1281 root_lance_dev = dev; 1282 } 1283 1284 printk("%s: registered as %s.\n", name, dev->name); 1285 return 0; 1286 1287err_out_resource: 1288 if (bdev) 1289 release_mem_region(start, len); 1290 1291err_out_dev: 1292 free_netdev(dev); 1293 1294err_out: 1295 return ret; 1296} 1297 1298static void __exit dec_lance_remove(struct device *bdev) 1299{ 1300 struct net_device *dev = dev_get_drvdata(bdev); 1301 resource_size_t start, len; 1302 1303 unregister_netdev(dev); 1304 start = to_tc_dev(bdev)->resource.start; 1305 len = to_tc_dev(bdev)->resource.end - start + 1; 1306 release_mem_region(start, len); 1307 free_netdev(dev); 1308} 1309 1310/* Find all the lance cards on the system and initialize them */ 1311static int __init dec_lance_platform_probe(void) 1312{ 1313 int count = 0; 1314 1315 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) { 1316 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) { 1317 if (dec_lance_probe(NULL, ASIC_LANCE) >= 0) 1318 count++; 1319 } else if (!TURBOCHANNEL) { 1320 if (dec_lance_probe(NULL, PMAX_LANCE) >= 0) 1321 count++; 1322 } 1323 } 1324 1325 return (count > 0) ? 0 : -ENODEV; 1326} 1327 1328static void __exit dec_lance_platform_remove(void) 1329{ 1330 while (root_lance_dev) { 1331 struct net_device *dev = root_lance_dev; 1332 struct lance_private *lp = netdev_priv(dev); 1333 1334 unregister_netdev(dev); 1335 root_lance_dev = lp->next; 1336 free_netdev(dev); 1337 } 1338} 1339 1340#ifdef CONFIG_TC 1341static int __init dec_lance_tc_probe(struct device *dev); 1342static int __exit dec_lance_tc_remove(struct device *dev); 1343 1344static const struct tc_device_id dec_lance_tc_table[] = { 1345 { "DEC ", "PMAD-AA " }, 1346 { } 1347}; 1348MODULE_DEVICE_TABLE(tc, dec_lance_tc_table); 1349 1350static struct tc_driver dec_lance_tc_driver = { 1351 .id_table = dec_lance_tc_table, 1352 .driver = { 1353 .name = "declance", 1354 .bus = &tc_bus_type, 1355 .probe = dec_lance_tc_probe, 1356 .remove = __exit_p(dec_lance_tc_remove), 1357 }, 1358}; 1359 1360static int __init dec_lance_tc_probe(struct device *dev) 1361{ 1362 int status = dec_lance_probe(dev, PMAD_LANCE); 1363 if (!status) 1364 get_device(dev); 1365 return status; 1366} 1367 1368static int __exit dec_lance_tc_remove(struct device *dev) 1369{ 1370 put_device(dev); 1371 dec_lance_remove(dev); 1372 return 0; 1373} 1374#endif 1375 1376static int __init dec_lance_init(void) 1377{ 1378 int status; 1379 1380 status = tc_register_driver(&dec_lance_tc_driver); 1381 if (!status) 1382 dec_lance_platform_probe(); 1383 return status; 1384} 1385 1386static void __exit dec_lance_exit(void) 1387{ 1388 dec_lance_platform_remove(); 1389 tc_unregister_driver(&dec_lance_tc_driver); 1390} 1391 1392 1393module_init(dec_lance_init); 1394module_exit(dec_lance_exit);