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1 2Configurable sysfs parameters for the x86-64 machine check code. 3 4Machine checks report internal hardware error conditions detected 5by the CPU. Uncorrected errors typically cause a machine check 6(often with panic), corrected ones cause a machine check log entry. 7 8Machine checks are organized in banks (normally associated with 9a hardware subsystem) and subevents in a bank. The exact meaning 10of the banks and subevent is CPU specific. 11 12mcelog knows how to decode them. 13 14When you see the "Machine check errors logged" message in the system 15log then mcelog should run to collect and decode machine check entries 16from /dev/mcelog. Normally mcelog should be run regularly from a cronjob. 17 18Each CPU has a directory in /sys/devices/system/machinecheck/machinecheckN 19(N = CPU number) 20 21The directory contains some configurable entries: 22 23Entries: 24 25bankNctl 26(N bank number) 27 64bit Hex bitmask enabling/disabling specific subevents for bank N 28 When a bit in the bitmask is zero then the respective 29 subevent will not be reported. 30 By default all events are enabled. 31 Note that BIOS maintain another mask to disable specific events 32 per bank. This is not visible here 33 34The following entries appear for each CPU, but they are truly shared 35between all CPUs. 36 37check_interval 38 How often to poll for corrected machine check errors, in seconds 39 (Note output is hexademical). Default 5 minutes. 40 41tolerant 42 Tolerance level. When a machine check exception occurs for a non 43 corrected machine check the kernel can take different actions. 44 Since machine check exceptions can happen any time it is sometimes 45 risky for the kernel to kill a process because it defies 46 normal kernel locking rules. The tolerance level configures 47 how hard the kernel tries to recover even at some risk of deadlock. 48 49 0: always panic, 50 1: panic if deadlock possible, 51 2: try to avoid panic, 52 3: never panic or exit (for testing only) 53 54 Default: 1 55 56 Note this only makes a difference if the CPU allows recovery 57 from a machine check exception. Current x86 CPUs generally do not. 58 59trigger 60 Program to run when a machine check event is detected. 61 This is an alternative to running mcelog regularly from cron 62 and allows to detect events faster. 63 64TBD document entries for AMD threshold interrupt configuration 65 66For more details about the x86 machine check architecture 67see the Intel and AMD architecture manuals from their developer websites. 68 69For more details about the architecture see 70see http://one.firstfloor.org/~andi/mce.pdf