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1/* 2 * smc91x.c 3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices. 4 * 5 * Copyright (C) 1996 by Erik Stahlman 6 * Copyright (C) 2001 Standard Microsystems Corporation 7 * Developed by Simple Network Magic Corporation 8 * Copyright (C) 2003 Monta Vista Software, Inc. 9 * Unified SMC91x driver by Nicolas Pitre 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * 25 * Arguments: 26 * io = for the base address 27 * irq = for the IRQ 28 * nowait = 0 for normal wait states, 1 eliminates additional wait states 29 * 30 * original author: 31 * Erik Stahlman <erik@vt.edu> 32 * 33 * hardware multicast code: 34 * Peter Cammaert <pc@denkart.be> 35 * 36 * contributors: 37 * Daris A Nevil <dnevil@snmc.com> 38 * Nicolas Pitre <nico@cam.org> 39 * Russell King <rmk@arm.linux.org.uk> 40 * 41 * History: 42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet 43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ" 44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111 45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111 46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111 47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support 48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races, 49 * more bus abstraction, big cleanup, etc. 50 * 29/09/03 Russell King - add driver model support 51 * - ethtool support 52 * - convert to use generic MII interface 53 * - add link up/down notification 54 * - don't try to handle full negotiation in 55 * smc_phy_configure 56 * - clean up (and fix stack overrun) in PHY 57 * MII read/write functions 58 * 22/09/04 Nicolas Pitre big update (see commit log for details) 59 */ 60static const char version[] = 61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n"; 62 63/* Debugging level */ 64#ifndef SMC_DEBUG 65#define SMC_DEBUG 0 66#endif 67 68 69#include <linux/init.h> 70#include <linux/module.h> 71#include <linux/kernel.h> 72#include <linux/sched.h> 73#include <linux/slab.h> 74#include <linux/delay.h> 75#include <linux/interrupt.h> 76#include <linux/errno.h> 77#include <linux/ioport.h> 78#include <linux/crc32.h> 79#include <linux/platform_device.h> 80#include <linux/spinlock.h> 81#include <linux/ethtool.h> 82#include <linux/mii.h> 83#include <linux/workqueue.h> 84 85#include <linux/netdevice.h> 86#include <linux/etherdevice.h> 87#include <linux/skbuff.h> 88 89#include <asm/io.h> 90 91#include "smc91x.h" 92 93#ifdef CONFIG_ISA 94/* 95 * the LAN91C111 can be at any of the following port addresses. To change, 96 * for a slightly different card, you can add it to the array. Keep in 97 * mind that the array must end in zero. 98 */ 99static unsigned int smc_portlist[] __initdata = { 100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0, 101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0 102}; 103 104#ifndef SMC_IOADDR 105# define SMC_IOADDR -1 106#endif 107static unsigned long io = SMC_IOADDR; 108module_param(io, ulong, 0400); 109MODULE_PARM_DESC(io, "I/O base address"); 110 111#ifndef SMC_IRQ 112# define SMC_IRQ -1 113#endif 114static int irq = SMC_IRQ; 115module_param(irq, int, 0400); 116MODULE_PARM_DESC(irq, "IRQ number"); 117 118#endif /* CONFIG_ISA */ 119 120#ifndef SMC_NOWAIT 121# define SMC_NOWAIT 0 122#endif 123static int nowait = SMC_NOWAIT; 124module_param(nowait, int, 0400); 125MODULE_PARM_DESC(nowait, "set to 1 for no wait state"); 126 127/* 128 * Transmit timeout, default 5 seconds. 129 */ 130static int watchdog = 1000; 131module_param(watchdog, int, 0400); 132MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); 133 134MODULE_LICENSE("GPL"); 135 136/* 137 * The internal workings of the driver. If you are changing anything 138 * here with the SMC stuff, you should have the datasheet and know 139 * what you are doing. 140 */ 141#define CARDNAME "smc91x" 142 143/* 144 * Use power-down feature of the chip 145 */ 146#define POWER_DOWN 1 147 148/* 149 * Wait time for memory to be free. This probably shouldn't be 150 * tuned that much, as waiting for this means nothing else happens 151 * in the system 152 */ 153#define MEMORY_WAIT_TIME 16 154 155/* 156 * The maximum number of processing loops allowed for each call to the 157 * IRQ handler. 158 */ 159#define MAX_IRQ_LOOPS 8 160 161/* 162 * This selects whether TX packets are sent one by one to the SMC91x internal 163 * memory and throttled until transmission completes. This may prevent 164 * RX overruns a litle by keeping much of the memory free for RX packets 165 * but to the expense of reduced TX throughput and increased IRQ overhead. 166 * Note this is not a cure for a too slow data bus or too high IRQ latency. 167 */ 168#define THROTTLE_TX_PKTS 0 169 170/* 171 * The MII clock high/low times. 2x this number gives the MII clock period 172 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!) 173 */ 174#define MII_DELAY 1 175 176/* store this information for the driver.. */ 177struct smc_local { 178 /* 179 * If I have to wait until memory is available to send a 180 * packet, I will store the skbuff here, until I get the 181 * desired memory. Then, I'll send it out and free it. 182 */ 183 struct sk_buff *pending_tx_skb; 184 struct tasklet_struct tx_task; 185 186 /* 187 * these are things that the kernel wants me to keep, so users 188 * can find out semi-useless statistics of how well the card is 189 * performing 190 */ 191 struct net_device_stats stats; 192 193 /* version/revision of the SMC91x chip */ 194 int version; 195 196 /* Contains the current active transmission mode */ 197 int tcr_cur_mode; 198 199 /* Contains the current active receive mode */ 200 int rcr_cur_mode; 201 202 /* Contains the current active receive/phy mode */ 203 int rpc_cur_mode; 204 int ctl_rfduplx; 205 int ctl_rspeed; 206 207 u32 msg_enable; 208 u32 phy_type; 209 struct mii_if_info mii; 210 211 /* work queue */ 212 struct work_struct phy_configure; 213 struct net_device *dev; 214 int work_pending; 215 216 spinlock_t lock; 217 218#ifdef SMC_USE_PXA_DMA 219 /* DMA needs the physical address of the chip */ 220 u_long physaddr; 221#endif 222 void __iomem *base; 223 void __iomem *datacs; 224}; 225 226#if SMC_DEBUG > 0 227#define DBG(n, args...) \ 228 do { \ 229 if (SMC_DEBUG >= (n)) \ 230 printk(args); \ 231 } while (0) 232 233#define PRINTK(args...) printk(args) 234#else 235#define DBG(n, args...) do { } while(0) 236#define PRINTK(args...) printk(KERN_DEBUG args) 237#endif 238 239#if SMC_DEBUG > 3 240static void PRINT_PKT(u_char *buf, int length) 241{ 242 int i; 243 int remainder; 244 int lines; 245 246 lines = length / 16; 247 remainder = length % 16; 248 249 for (i = 0; i < lines ; i ++) { 250 int cur; 251 for (cur = 0; cur < 8; cur++) { 252 u_char a, b; 253 a = *buf++; 254 b = *buf++; 255 printk("%02x%02x ", a, b); 256 } 257 printk("\n"); 258 } 259 for (i = 0; i < remainder/2 ; i++) { 260 u_char a, b; 261 a = *buf++; 262 b = *buf++; 263 printk("%02x%02x ", a, b); 264 } 265 printk("\n"); 266} 267#else 268#define PRINT_PKT(x...) do { } while(0) 269#endif 270 271 272/* this enables an interrupt in the interrupt mask register */ 273#define SMC_ENABLE_INT(x) do { \ 274 unsigned char mask; \ 275 spin_lock_irq(&lp->lock); \ 276 mask = SMC_GET_INT_MASK(); \ 277 mask |= (x); \ 278 SMC_SET_INT_MASK(mask); \ 279 spin_unlock_irq(&lp->lock); \ 280} while (0) 281 282/* this disables an interrupt from the interrupt mask register */ 283#define SMC_DISABLE_INT(x) do { \ 284 unsigned char mask; \ 285 spin_lock_irq(&lp->lock); \ 286 mask = SMC_GET_INT_MASK(); \ 287 mask &= ~(x); \ 288 SMC_SET_INT_MASK(mask); \ 289 spin_unlock_irq(&lp->lock); \ 290} while (0) 291 292/* 293 * Wait while MMU is busy. This is usually in the order of a few nanosecs 294 * if at all, but let's avoid deadlocking the system if the hardware 295 * decides to go south. 296 */ 297#define SMC_WAIT_MMU_BUSY() do { \ 298 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \ 299 unsigned long timeout = jiffies + 2; \ 300 while (SMC_GET_MMU_CMD() & MC_BUSY) { \ 301 if (time_after(jiffies, timeout)) { \ 302 printk("%s: timeout %s line %d\n", \ 303 dev->name, __FILE__, __LINE__); \ 304 break; \ 305 } \ 306 cpu_relax(); \ 307 } \ 308 } \ 309} while (0) 310 311 312/* 313 * this does a soft reset on the device 314 */ 315static void smc_reset(struct net_device *dev) 316{ 317 struct smc_local *lp = netdev_priv(dev); 318 void __iomem *ioaddr = lp->base; 319 unsigned int ctl, cfg; 320 struct sk_buff *pending_skb; 321 322 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 323 324 /* Disable all interrupts, block TX tasklet */ 325 spin_lock_irq(&lp->lock); 326 SMC_SELECT_BANK(2); 327 SMC_SET_INT_MASK(0); 328 pending_skb = lp->pending_tx_skb; 329 lp->pending_tx_skb = NULL; 330 spin_unlock_irq(&lp->lock); 331 332 /* free any pending tx skb */ 333 if (pending_skb) { 334 dev_kfree_skb(pending_skb); 335 lp->stats.tx_errors++; 336 lp->stats.tx_aborted_errors++; 337 } 338 339 /* 340 * This resets the registers mostly to defaults, but doesn't 341 * affect EEPROM. That seems unnecessary 342 */ 343 SMC_SELECT_BANK(0); 344 SMC_SET_RCR(RCR_SOFTRST); 345 346 /* 347 * Setup the Configuration Register 348 * This is necessary because the CONFIG_REG is not affected 349 * by a soft reset 350 */ 351 SMC_SELECT_BANK(1); 352 353 cfg = CONFIG_DEFAULT; 354 355 /* 356 * Setup for fast accesses if requested. If the card/system 357 * can't handle it then there will be no recovery except for 358 * a hard reset or power cycle 359 */ 360 if (nowait) 361 cfg |= CONFIG_NO_WAIT; 362 363 /* 364 * Release from possible power-down state 365 * Configuration register is not affected by Soft Reset 366 */ 367 cfg |= CONFIG_EPH_POWER_EN; 368 369 SMC_SET_CONFIG(cfg); 370 371 /* this should pause enough for the chip to be happy */ 372 /* 373 * elaborate? What does the chip _need_? --jgarzik 374 * 375 * This seems to be undocumented, but something the original 376 * driver(s) have always done. Suspect undocumented timing 377 * info/determined empirically. --rmk 378 */ 379 udelay(1); 380 381 /* Disable transmit and receive functionality */ 382 SMC_SELECT_BANK(0); 383 SMC_SET_RCR(RCR_CLEAR); 384 SMC_SET_TCR(TCR_CLEAR); 385 386 SMC_SELECT_BANK(1); 387 ctl = SMC_GET_CTL() | CTL_LE_ENABLE; 388 389 /* 390 * Set the control register to automatically release successfully 391 * transmitted packets, to make the best use out of our limited 392 * memory 393 */ 394 if(!THROTTLE_TX_PKTS) 395 ctl |= CTL_AUTO_RELEASE; 396 else 397 ctl &= ~CTL_AUTO_RELEASE; 398 SMC_SET_CTL(ctl); 399 400 /* Reset the MMU */ 401 SMC_SELECT_BANK(2); 402 SMC_SET_MMU_CMD(MC_RESET); 403 SMC_WAIT_MMU_BUSY(); 404} 405 406/* 407 * Enable Interrupts, Receive, and Transmit 408 */ 409static void smc_enable(struct net_device *dev) 410{ 411 struct smc_local *lp = netdev_priv(dev); 412 void __iomem *ioaddr = lp->base; 413 int mask; 414 415 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 416 417 /* see the header file for options in TCR/RCR DEFAULT */ 418 SMC_SELECT_BANK(0); 419 SMC_SET_TCR(lp->tcr_cur_mode); 420 SMC_SET_RCR(lp->rcr_cur_mode); 421 422 SMC_SELECT_BANK(1); 423 SMC_SET_MAC_ADDR(dev->dev_addr); 424 425 /* now, enable interrupts */ 426 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT; 427 if (lp->version >= (CHIP_91100 << 4)) 428 mask |= IM_MDINT; 429 SMC_SELECT_BANK(2); 430 SMC_SET_INT_MASK(mask); 431 432 /* 433 * From this point the register bank must _NOT_ be switched away 434 * to something else than bank 2 without proper locking against 435 * races with any tasklet or interrupt handlers until smc_shutdown() 436 * or smc_reset() is called. 437 */ 438} 439 440/* 441 * this puts the device in an inactive state 442 */ 443static void smc_shutdown(struct net_device *dev) 444{ 445 struct smc_local *lp = netdev_priv(dev); 446 void __iomem *ioaddr = lp->base; 447 struct sk_buff *pending_skb; 448 449 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__); 450 451 /* no more interrupts for me */ 452 spin_lock_irq(&lp->lock); 453 SMC_SELECT_BANK(2); 454 SMC_SET_INT_MASK(0); 455 pending_skb = lp->pending_tx_skb; 456 lp->pending_tx_skb = NULL; 457 spin_unlock_irq(&lp->lock); 458 if (pending_skb) 459 dev_kfree_skb(pending_skb); 460 461 /* and tell the card to stay away from that nasty outside world */ 462 SMC_SELECT_BANK(0); 463 SMC_SET_RCR(RCR_CLEAR); 464 SMC_SET_TCR(TCR_CLEAR); 465 466#ifdef POWER_DOWN 467 /* finally, shut the chip down */ 468 SMC_SELECT_BANK(1); 469 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN); 470#endif 471} 472 473/* 474 * This is the procedure to handle the receipt of a packet. 475 */ 476static inline void smc_rcv(struct net_device *dev) 477{ 478 struct smc_local *lp = netdev_priv(dev); 479 void __iomem *ioaddr = lp->base; 480 unsigned int packet_number, status, packet_len; 481 482 DBG(3, "%s: %s\n", dev->name, __FUNCTION__); 483 484 packet_number = SMC_GET_RXFIFO(); 485 if (unlikely(packet_number & RXFIFO_REMPTY)) { 486 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name); 487 return; 488 } 489 490 /* read from start of packet */ 491 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC); 492 493 /* First two words are status and packet length */ 494 SMC_GET_PKT_HDR(status, packet_len); 495 packet_len &= 0x07ff; /* mask off top bits */ 496 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n", 497 dev->name, packet_number, status, 498 packet_len, packet_len); 499 500 back: 501 if (unlikely(packet_len < 6 || status & RS_ERRORS)) { 502 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) { 503 /* accept VLAN packets */ 504 status &= ~RS_TOOLONG; 505 goto back; 506 } 507 if (packet_len < 6) { 508 /* bloody hardware */ 509 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n", 510 dev->name, packet_len, status); 511 status |= RS_TOOSHORT; 512 } 513 SMC_WAIT_MMU_BUSY(); 514 SMC_SET_MMU_CMD(MC_RELEASE); 515 lp->stats.rx_errors++; 516 if (status & RS_ALGNERR) 517 lp->stats.rx_frame_errors++; 518 if (status & (RS_TOOSHORT | RS_TOOLONG)) 519 lp->stats.rx_length_errors++; 520 if (status & RS_BADCRC) 521 lp->stats.rx_crc_errors++; 522 } else { 523 struct sk_buff *skb; 524 unsigned char *data; 525 unsigned int data_len; 526 527 /* set multicast stats */ 528 if (status & RS_MULTICAST) 529 lp->stats.multicast++; 530 531 /* 532 * Actual payload is packet_len - 6 (or 5 if odd byte). 533 * We want skb_reserve(2) and the final ctrl word 534 * (2 bytes, possibly containing the payload odd byte). 535 * Furthermore, we add 2 bytes to allow rounding up to 536 * multiple of 4 bytes on 32 bit buses. 537 * Hence packet_len - 6 + 2 + 2 + 2. 538 */ 539 skb = dev_alloc_skb(packet_len); 540 if (unlikely(skb == NULL)) { 541 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n", 542 dev->name); 543 SMC_WAIT_MMU_BUSY(); 544 SMC_SET_MMU_CMD(MC_RELEASE); 545 lp->stats.rx_dropped++; 546 return; 547 } 548 549 /* Align IP header to 32 bits */ 550 skb_reserve(skb, 2); 551 552 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */ 553 if (lp->version == 0x90) 554 status |= RS_ODDFRAME; 555 556 /* 557 * If odd length: packet_len - 5, 558 * otherwise packet_len - 6. 559 * With the trailing ctrl byte it's packet_len - 4. 560 */ 561 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6); 562 data = skb_put(skb, data_len); 563 SMC_PULL_DATA(data, packet_len - 4); 564 565 SMC_WAIT_MMU_BUSY(); 566 SMC_SET_MMU_CMD(MC_RELEASE); 567 568 PRINT_PKT(data, packet_len - 4); 569 570 dev->last_rx = jiffies; 571 skb->dev = dev; 572 skb->protocol = eth_type_trans(skb, dev); 573 netif_rx(skb); 574 lp->stats.rx_packets++; 575 lp->stats.rx_bytes += data_len; 576 } 577} 578 579#ifdef CONFIG_SMP 580/* 581 * On SMP we have the following problem: 582 * 583 * A = smc_hardware_send_pkt() 584 * B = smc_hard_start_xmit() 585 * C = smc_interrupt() 586 * 587 * A and B can never be executed simultaneously. However, at least on UP, 588 * it is possible (and even desirable) for C to interrupt execution of 589 * A or B in order to have better RX reliability and avoid overruns. 590 * C, just like A and B, must have exclusive access to the chip and 591 * each of them must lock against any other concurrent access. 592 * Unfortunately this is not possible to have C suspend execution of A or 593 * B taking place on another CPU. On UP this is no an issue since A and B 594 * are run from softirq context and C from hard IRQ context, and there is 595 * no other CPU where concurrent access can happen. 596 * If ever there is a way to force at least B and C to always be executed 597 * on the same CPU then we could use read/write locks to protect against 598 * any other concurrent access and C would always interrupt B. But life 599 * isn't that easy in a SMP world... 600 */ 601#define smc_special_trylock(lock) \ 602({ \ 603 int __ret; \ 604 local_irq_disable(); \ 605 __ret = spin_trylock(lock); \ 606 if (!__ret) \ 607 local_irq_enable(); \ 608 __ret; \ 609}) 610#define smc_special_lock(lock) spin_lock_irq(lock) 611#define smc_special_unlock(lock) spin_unlock_irq(lock) 612#else 613#define smc_special_trylock(lock) (1) 614#define smc_special_lock(lock) do { } while (0) 615#define smc_special_unlock(lock) do { } while (0) 616#endif 617 618/* 619 * This is called to actually send a packet to the chip. 620 */ 621static void smc_hardware_send_pkt(unsigned long data) 622{ 623 struct net_device *dev = (struct net_device *)data; 624 struct smc_local *lp = netdev_priv(dev); 625 void __iomem *ioaddr = lp->base; 626 struct sk_buff *skb; 627 unsigned int packet_no, len; 628 unsigned char *buf; 629 630 DBG(3, "%s: %s\n", dev->name, __FUNCTION__); 631 632 if (!smc_special_trylock(&lp->lock)) { 633 netif_stop_queue(dev); 634 tasklet_schedule(&lp->tx_task); 635 return; 636 } 637 638 skb = lp->pending_tx_skb; 639 if (unlikely(!skb)) { 640 smc_special_unlock(&lp->lock); 641 return; 642 } 643 lp->pending_tx_skb = NULL; 644 645 packet_no = SMC_GET_AR(); 646 if (unlikely(packet_no & AR_FAILED)) { 647 printk("%s: Memory allocation failed.\n", dev->name); 648 lp->stats.tx_errors++; 649 lp->stats.tx_fifo_errors++; 650 smc_special_unlock(&lp->lock); 651 goto done; 652 } 653 654 /* point to the beginning of the packet */ 655 SMC_SET_PN(packet_no); 656 SMC_SET_PTR(PTR_AUTOINC); 657 658 buf = skb->data; 659 len = skb->len; 660 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n", 661 dev->name, packet_no, len, len, buf); 662 PRINT_PKT(buf, len); 663 664 /* 665 * Send the packet length (+6 for status words, length, and ctl. 666 * The card will pad to 64 bytes with zeroes if packet is too small. 667 */ 668 SMC_PUT_PKT_HDR(0, len + 6); 669 670 /* send the actual data */ 671 SMC_PUSH_DATA(buf, len & ~1); 672 673 /* Send final ctl word with the last byte if there is one */ 674 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG); 675 676 /* 677 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will 678 * have the effect of having at most one packet queued for TX 679 * in the chip's memory at all time. 680 * 681 * If THROTTLE_TX_PKTS is not set then the queue is stopped only 682 * when memory allocation (MC_ALLOC) does not succeed right away. 683 */ 684 if (THROTTLE_TX_PKTS) 685 netif_stop_queue(dev); 686 687 /* queue the packet for TX */ 688 SMC_SET_MMU_CMD(MC_ENQUEUE); 689 smc_special_unlock(&lp->lock); 690 691 dev->trans_start = jiffies; 692 lp->stats.tx_packets++; 693 lp->stats.tx_bytes += len; 694 695 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT); 696 697done: if (!THROTTLE_TX_PKTS) 698 netif_wake_queue(dev); 699 700 dev_kfree_skb(skb); 701} 702 703/* 704 * Since I am not sure if I will have enough room in the chip's ram 705 * to store the packet, I call this routine which either sends it 706 * now, or set the card to generates an interrupt when ready 707 * for the packet. 708 */ 709static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 710{ 711 struct smc_local *lp = netdev_priv(dev); 712 void __iomem *ioaddr = lp->base; 713 unsigned int numPages, poll_count, status; 714 715 DBG(3, "%s: %s\n", dev->name, __FUNCTION__); 716 717 BUG_ON(lp->pending_tx_skb != NULL); 718 719 /* 720 * The MMU wants the number of pages to be the number of 256 bytes 721 * 'pages', minus 1 (since a packet can't ever have 0 pages :)) 722 * 723 * The 91C111 ignores the size bits, but earlier models don't. 724 * 725 * Pkt size for allocating is data length +6 (for additional status 726 * words, length and ctl) 727 * 728 * If odd size then last byte is included in ctl word. 729 */ 730 numPages = ((skb->len & ~1) + (6 - 1)) >> 8; 731 if (unlikely(numPages > 7)) { 732 printk("%s: Far too big packet error.\n", dev->name); 733 lp->stats.tx_errors++; 734 lp->stats.tx_dropped++; 735 dev_kfree_skb(skb); 736 return 0; 737 } 738 739 smc_special_lock(&lp->lock); 740 741 /* now, try to allocate the memory */ 742 SMC_SET_MMU_CMD(MC_ALLOC | numPages); 743 744 /* 745 * Poll the chip for a short amount of time in case the 746 * allocation succeeds quickly. 747 */ 748 poll_count = MEMORY_WAIT_TIME; 749 do { 750 status = SMC_GET_INT(); 751 if (status & IM_ALLOC_INT) { 752 SMC_ACK_INT(IM_ALLOC_INT); 753 break; 754 } 755 } while (--poll_count); 756 757 smc_special_unlock(&lp->lock); 758 759 lp->pending_tx_skb = skb; 760 if (!poll_count) { 761 /* oh well, wait until the chip finds memory later */ 762 netif_stop_queue(dev); 763 DBG(2, "%s: TX memory allocation deferred.\n", dev->name); 764 SMC_ENABLE_INT(IM_ALLOC_INT); 765 } else { 766 /* 767 * Allocation succeeded: push packet to the chip's own memory 768 * immediately. 769 */ 770 smc_hardware_send_pkt((unsigned long)dev); 771 } 772 773 return 0; 774} 775 776/* 777 * This handles a TX interrupt, which is only called when: 778 * - a TX error occurred, or 779 * - CTL_AUTO_RELEASE is not set and TX of a packet completed. 780 */ 781static void smc_tx(struct net_device *dev) 782{ 783 struct smc_local *lp = netdev_priv(dev); 784 void __iomem *ioaddr = lp->base; 785 unsigned int saved_packet, packet_no, tx_status, pkt_len; 786 787 DBG(3, "%s: %s\n", dev->name, __FUNCTION__); 788 789 /* If the TX FIFO is empty then nothing to do */ 790 packet_no = SMC_GET_TXFIFO(); 791 if (unlikely(packet_no & TXFIFO_TEMPTY)) { 792 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name); 793 return; 794 } 795 796 /* select packet to read from */ 797 saved_packet = SMC_GET_PN(); 798 SMC_SET_PN(packet_no); 799 800 /* read the first word (status word) from this packet */ 801 SMC_SET_PTR(PTR_AUTOINC | PTR_READ); 802 SMC_GET_PKT_HDR(tx_status, pkt_len); 803 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n", 804 dev->name, tx_status, packet_no); 805 806 if (!(tx_status & ES_TX_SUC)) 807 lp->stats.tx_errors++; 808 809 if (tx_status & ES_LOSTCARR) 810 lp->stats.tx_carrier_errors++; 811 812 if (tx_status & (ES_LATCOL | ES_16COL)) { 813 PRINTK("%s: %s occurred on last xmit\n", dev->name, 814 (tx_status & ES_LATCOL) ? 815 "late collision" : "too many collisions"); 816 lp->stats.tx_window_errors++; 817 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) { 818 printk(KERN_INFO "%s: unexpectedly large number of " 819 "bad collisions. Please check duplex " 820 "setting.\n", dev->name); 821 } 822 } 823 824 /* kill the packet */ 825 SMC_WAIT_MMU_BUSY(); 826 SMC_SET_MMU_CMD(MC_FREEPKT); 827 828 /* Don't restore Packet Number Reg until busy bit is cleared */ 829 SMC_WAIT_MMU_BUSY(); 830 SMC_SET_PN(saved_packet); 831 832 /* re-enable transmit */ 833 SMC_SELECT_BANK(0); 834 SMC_SET_TCR(lp->tcr_cur_mode); 835 SMC_SELECT_BANK(2); 836} 837 838 839/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/ 840 841static void smc_mii_out(struct net_device *dev, unsigned int val, int bits) 842{ 843 struct smc_local *lp = netdev_priv(dev); 844 void __iomem *ioaddr = lp->base; 845 unsigned int mii_reg, mask; 846 847 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO); 848 mii_reg |= MII_MDOE; 849 850 for (mask = 1 << (bits - 1); mask; mask >>= 1) { 851 if (val & mask) 852 mii_reg |= MII_MDO; 853 else 854 mii_reg &= ~MII_MDO; 855 856 SMC_SET_MII(mii_reg); 857 udelay(MII_DELAY); 858 SMC_SET_MII(mii_reg | MII_MCLK); 859 udelay(MII_DELAY); 860 } 861} 862 863static unsigned int smc_mii_in(struct net_device *dev, int bits) 864{ 865 struct smc_local *lp = netdev_priv(dev); 866 void __iomem *ioaddr = lp->base; 867 unsigned int mii_reg, mask, val; 868 869 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO); 870 SMC_SET_MII(mii_reg); 871 872 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) { 873 if (SMC_GET_MII() & MII_MDI) 874 val |= mask; 875 876 SMC_SET_MII(mii_reg); 877 udelay(MII_DELAY); 878 SMC_SET_MII(mii_reg | MII_MCLK); 879 udelay(MII_DELAY); 880 } 881 882 return val; 883} 884 885/* 886 * Reads a register from the MII Management serial interface 887 */ 888static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg) 889{ 890 struct smc_local *lp = netdev_priv(dev); 891 void __iomem *ioaddr = lp->base; 892 unsigned int phydata; 893 894 SMC_SELECT_BANK(3); 895 896 /* Idle - 32 ones */ 897 smc_mii_out(dev, 0xffffffff, 32); 898 899 /* Start code (01) + read (10) + phyaddr + phyreg */ 900 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14); 901 902 /* Turnaround (2bits) + phydata */ 903 phydata = smc_mii_in(dev, 18); 904 905 /* Return to idle state */ 906 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO)); 907 908 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", 909 __FUNCTION__, phyaddr, phyreg, phydata); 910 911 SMC_SELECT_BANK(2); 912 return phydata; 913} 914 915/* 916 * Writes a register to the MII Management serial interface 917 */ 918static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg, 919 int phydata) 920{ 921 struct smc_local *lp = netdev_priv(dev); 922 void __iomem *ioaddr = lp->base; 923 924 SMC_SELECT_BANK(3); 925 926 /* Idle - 32 ones */ 927 smc_mii_out(dev, 0xffffffff, 32); 928 929 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */ 930 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32); 931 932 /* Return to idle state */ 933 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO)); 934 935 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", 936 __FUNCTION__, phyaddr, phyreg, phydata); 937 938 SMC_SELECT_BANK(2); 939} 940 941/* 942 * Finds and reports the PHY address 943 */ 944static void smc_phy_detect(struct net_device *dev) 945{ 946 struct smc_local *lp = netdev_priv(dev); 947 int phyaddr; 948 949 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 950 951 lp->phy_type = 0; 952 953 /* 954 * Scan all 32 PHY addresses if necessary, starting at 955 * PHY#1 to PHY#31, and then PHY#0 last. 956 */ 957 for (phyaddr = 1; phyaddr < 33; ++phyaddr) { 958 unsigned int id1, id2; 959 960 /* Read the PHY identifiers */ 961 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1); 962 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2); 963 964 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n", 965 dev->name, id1, id2); 966 967 /* Make sure it is a valid identifier */ 968 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 && 969 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) { 970 /* Save the PHY's address */ 971 lp->mii.phy_id = phyaddr & 31; 972 lp->phy_type = id1 << 16 | id2; 973 break; 974 } 975 } 976} 977 978/* 979 * Sets the PHY to a configuration as determined by the user 980 */ 981static int smc_phy_fixed(struct net_device *dev) 982{ 983 struct smc_local *lp = netdev_priv(dev); 984 void __iomem *ioaddr = lp->base; 985 int phyaddr = lp->mii.phy_id; 986 int bmcr, cfg1; 987 988 DBG(3, "%s: %s\n", dev->name, __FUNCTION__); 989 990 /* Enter Link Disable state */ 991 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG); 992 cfg1 |= PHY_CFG1_LNKDIS; 993 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1); 994 995 /* 996 * Set our fixed capabilities 997 * Disable auto-negotiation 998 */ 999 bmcr = 0; 1000 1001 if (lp->ctl_rfduplx) 1002 bmcr |= BMCR_FULLDPLX; 1003 1004 if (lp->ctl_rspeed == 100) 1005 bmcr |= BMCR_SPEED100; 1006 1007 /* Write our capabilities to the phy control register */ 1008 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr); 1009 1010 /* Re-Configure the Receive/Phy Control register */ 1011 SMC_SELECT_BANK(0); 1012 SMC_SET_RPC(lp->rpc_cur_mode); 1013 SMC_SELECT_BANK(2); 1014 1015 return 1; 1016} 1017 1018/* 1019 * smc_phy_reset - reset the phy 1020 * @dev: net device 1021 * @phy: phy address 1022 * 1023 * Issue a software reset for the specified PHY and 1024 * wait up to 100ms for the reset to complete. We should 1025 * not access the PHY for 50ms after issuing the reset. 1026 * 1027 * The time to wait appears to be dependent on the PHY. 1028 * 1029 * Must be called with lp->lock locked. 1030 */ 1031static int smc_phy_reset(struct net_device *dev, int phy) 1032{ 1033 struct smc_local *lp = netdev_priv(dev); 1034 unsigned int bmcr; 1035 int timeout; 1036 1037 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET); 1038 1039 for (timeout = 2; timeout; timeout--) { 1040 spin_unlock_irq(&lp->lock); 1041 msleep(50); 1042 spin_lock_irq(&lp->lock); 1043 1044 bmcr = smc_phy_read(dev, phy, MII_BMCR); 1045 if (!(bmcr & BMCR_RESET)) 1046 break; 1047 } 1048 1049 return bmcr & BMCR_RESET; 1050} 1051 1052/* 1053 * smc_phy_powerdown - powerdown phy 1054 * @dev: net device 1055 * 1056 * Power down the specified PHY 1057 */ 1058static void smc_phy_powerdown(struct net_device *dev) 1059{ 1060 struct smc_local *lp = netdev_priv(dev); 1061 unsigned int bmcr; 1062 int phy = lp->mii.phy_id; 1063 1064 if (lp->phy_type == 0) 1065 return; 1066 1067 /* We need to ensure that no calls to smc_phy_configure are 1068 pending. 1069 1070 flush_scheduled_work() cannot be called because we are 1071 running with the netlink semaphore held (from 1072 devinet_ioctl()) and the pending work queue contains 1073 linkwatch_event() (scheduled by netif_carrier_off() 1074 above). linkwatch_event() also wants the netlink semaphore. 1075 */ 1076 while(lp->work_pending) 1077 yield(); 1078 1079 bmcr = smc_phy_read(dev, phy, MII_BMCR); 1080 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN); 1081} 1082 1083/* 1084 * smc_phy_check_media - check the media status and adjust TCR 1085 * @dev: net device 1086 * @init: set true for initialisation 1087 * 1088 * Select duplex mode depending on negotiation state. This 1089 * also updates our carrier state. 1090 */ 1091static void smc_phy_check_media(struct net_device *dev, int init) 1092{ 1093 struct smc_local *lp = netdev_priv(dev); 1094 void __iomem *ioaddr = lp->base; 1095 1096 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) { 1097 /* duplex state has changed */ 1098 if (lp->mii.full_duplex) { 1099 lp->tcr_cur_mode |= TCR_SWFDUP; 1100 } else { 1101 lp->tcr_cur_mode &= ~TCR_SWFDUP; 1102 } 1103 1104 SMC_SELECT_BANK(0); 1105 SMC_SET_TCR(lp->tcr_cur_mode); 1106 } 1107} 1108 1109/* 1110 * Configures the specified PHY through the MII management interface 1111 * using Autonegotiation. 1112 * Calls smc_phy_fixed() if the user has requested a certain config. 1113 * If RPC ANEG bit is set, the media selection is dependent purely on 1114 * the selection by the MII (either in the MII BMCR reg or the result 1115 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection 1116 * is controlled by the RPC SPEED and RPC DPLX bits. 1117 */ 1118static void smc_phy_configure(struct work_struct *work) 1119{ 1120 struct smc_local *lp = 1121 container_of(work, struct smc_local, phy_configure); 1122 struct net_device *dev = lp->dev; 1123 void __iomem *ioaddr = lp->base; 1124 int phyaddr = lp->mii.phy_id; 1125 int my_phy_caps; /* My PHY capabilities */ 1126 int my_ad_caps; /* My Advertised capabilities */ 1127 int status; 1128 1129 DBG(3, "%s:smc_program_phy()\n", dev->name); 1130 1131 spin_lock_irq(&lp->lock); 1132 1133 /* 1134 * We should not be called if phy_type is zero. 1135 */ 1136 if (lp->phy_type == 0) 1137 goto smc_phy_configure_exit; 1138 1139 if (smc_phy_reset(dev, phyaddr)) { 1140 printk("%s: PHY reset timed out\n", dev->name); 1141 goto smc_phy_configure_exit; 1142 } 1143 1144 /* 1145 * Enable PHY Interrupts (for register 18) 1146 * Interrupts listed here are disabled 1147 */ 1148 smc_phy_write(dev, phyaddr, PHY_MASK_REG, 1149 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD | 1150 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB | 1151 PHY_INT_SPDDET | PHY_INT_DPLXDET); 1152 1153 /* Configure the Receive/Phy Control register */ 1154 SMC_SELECT_BANK(0); 1155 SMC_SET_RPC(lp->rpc_cur_mode); 1156 1157 /* If the user requested no auto neg, then go set his request */ 1158 if (lp->mii.force_media) { 1159 smc_phy_fixed(dev); 1160 goto smc_phy_configure_exit; 1161 } 1162 1163 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */ 1164 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR); 1165 1166 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) { 1167 printk(KERN_INFO "Auto negotiation NOT supported\n"); 1168 smc_phy_fixed(dev); 1169 goto smc_phy_configure_exit; 1170 } 1171 1172 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */ 1173 1174 if (my_phy_caps & BMSR_100BASE4) 1175 my_ad_caps |= ADVERTISE_100BASE4; 1176 if (my_phy_caps & BMSR_100FULL) 1177 my_ad_caps |= ADVERTISE_100FULL; 1178 if (my_phy_caps & BMSR_100HALF) 1179 my_ad_caps |= ADVERTISE_100HALF; 1180 if (my_phy_caps & BMSR_10FULL) 1181 my_ad_caps |= ADVERTISE_10FULL; 1182 if (my_phy_caps & BMSR_10HALF) 1183 my_ad_caps |= ADVERTISE_10HALF; 1184 1185 /* Disable capabilities not selected by our user */ 1186 if (lp->ctl_rspeed != 100) 1187 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF); 1188 1189 if (!lp->ctl_rfduplx) 1190 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL); 1191 1192 /* Update our Auto-Neg Advertisement Register */ 1193 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps); 1194 lp->mii.advertising = my_ad_caps; 1195 1196 /* 1197 * Read the register back. Without this, it appears that when 1198 * auto-negotiation is restarted, sometimes it isn't ready and 1199 * the link does not come up. 1200 */ 1201 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE); 1202 1203 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps); 1204 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps); 1205 1206 /* Restart auto-negotiation process in order to advertise my caps */ 1207 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); 1208 1209 smc_phy_check_media(dev, 1); 1210 1211smc_phy_configure_exit: 1212 SMC_SELECT_BANK(2); 1213 spin_unlock_irq(&lp->lock); 1214 lp->work_pending = 0; 1215} 1216 1217/* 1218 * smc_phy_interrupt 1219 * 1220 * Purpose: Handle interrupts relating to PHY register 18. This is 1221 * called from the "hard" interrupt handler under our private spinlock. 1222 */ 1223static void smc_phy_interrupt(struct net_device *dev) 1224{ 1225 struct smc_local *lp = netdev_priv(dev); 1226 int phyaddr = lp->mii.phy_id; 1227 int phy18; 1228 1229 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 1230 1231 if (lp->phy_type == 0) 1232 return; 1233 1234 for(;;) { 1235 smc_phy_check_media(dev, 0); 1236 1237 /* Read PHY Register 18, Status Output */ 1238 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG); 1239 if ((phy18 & PHY_INT_INT) == 0) 1240 break; 1241 } 1242} 1243 1244/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/ 1245 1246static void smc_10bt_check_media(struct net_device *dev, int init) 1247{ 1248 struct smc_local *lp = netdev_priv(dev); 1249 void __iomem *ioaddr = lp->base; 1250 unsigned int old_carrier, new_carrier; 1251 1252 old_carrier = netif_carrier_ok(dev) ? 1 : 0; 1253 1254 SMC_SELECT_BANK(0); 1255 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0; 1256 SMC_SELECT_BANK(2); 1257 1258 if (init || (old_carrier != new_carrier)) { 1259 if (!new_carrier) { 1260 netif_carrier_off(dev); 1261 } else { 1262 netif_carrier_on(dev); 1263 } 1264 if (netif_msg_link(lp)) 1265 printk(KERN_INFO "%s: link %s\n", dev->name, 1266 new_carrier ? "up" : "down"); 1267 } 1268} 1269 1270static void smc_eph_interrupt(struct net_device *dev) 1271{ 1272 struct smc_local *lp = netdev_priv(dev); 1273 void __iomem *ioaddr = lp->base; 1274 unsigned int ctl; 1275 1276 smc_10bt_check_media(dev, 0); 1277 1278 SMC_SELECT_BANK(1); 1279 ctl = SMC_GET_CTL(); 1280 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE); 1281 SMC_SET_CTL(ctl); 1282 SMC_SELECT_BANK(2); 1283} 1284 1285/* 1286 * This is the main routine of the driver, to handle the device when 1287 * it needs some attention. 1288 */ 1289static irqreturn_t smc_interrupt(int irq, void *dev_id) 1290{ 1291 struct net_device *dev = dev_id; 1292 struct smc_local *lp = netdev_priv(dev); 1293 void __iomem *ioaddr = lp->base; 1294 int status, mask, timeout, card_stats; 1295 int saved_pointer; 1296 1297 DBG(3, "%s: %s\n", dev->name, __FUNCTION__); 1298 1299 spin_lock(&lp->lock); 1300 1301 /* A preamble may be used when there is a potential race 1302 * between the interruptible transmit functions and this 1303 * ISR. */ 1304 SMC_INTERRUPT_PREAMBLE; 1305 1306 saved_pointer = SMC_GET_PTR(); 1307 mask = SMC_GET_INT_MASK(); 1308 SMC_SET_INT_MASK(0); 1309 1310 /* set a timeout value, so I don't stay here forever */ 1311 timeout = MAX_IRQ_LOOPS; 1312 1313 do { 1314 status = SMC_GET_INT(); 1315 1316 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n", 1317 dev->name, status, mask, 1318 ({ int meminfo; SMC_SELECT_BANK(0); 1319 meminfo = SMC_GET_MIR(); 1320 SMC_SELECT_BANK(2); meminfo; }), 1321 SMC_GET_FIFO()); 1322 1323 status &= mask; 1324 if (!status) 1325 break; 1326 1327 if (status & IM_TX_INT) { 1328 /* do this before RX as it will free memory quickly */ 1329 DBG(3, "%s: TX int\n", dev->name); 1330 smc_tx(dev); 1331 SMC_ACK_INT(IM_TX_INT); 1332 if (THROTTLE_TX_PKTS) 1333 netif_wake_queue(dev); 1334 } else if (status & IM_RCV_INT) { 1335 DBG(3, "%s: RX irq\n", dev->name); 1336 smc_rcv(dev); 1337 } else if (status & IM_ALLOC_INT) { 1338 DBG(3, "%s: Allocation irq\n", dev->name); 1339 tasklet_hi_schedule(&lp->tx_task); 1340 mask &= ~IM_ALLOC_INT; 1341 } else if (status & IM_TX_EMPTY_INT) { 1342 DBG(3, "%s: TX empty\n", dev->name); 1343 mask &= ~IM_TX_EMPTY_INT; 1344 1345 /* update stats */ 1346 SMC_SELECT_BANK(0); 1347 card_stats = SMC_GET_COUNTER(); 1348 SMC_SELECT_BANK(2); 1349 1350 /* single collisions */ 1351 lp->stats.collisions += card_stats & 0xF; 1352 card_stats >>= 4; 1353 1354 /* multiple collisions */ 1355 lp->stats.collisions += card_stats & 0xF; 1356 } else if (status & IM_RX_OVRN_INT) { 1357 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name, 1358 ({ int eph_st; SMC_SELECT_BANK(0); 1359 eph_st = SMC_GET_EPH_STATUS(); 1360 SMC_SELECT_BANK(2); eph_st; }) ); 1361 SMC_ACK_INT(IM_RX_OVRN_INT); 1362 lp->stats.rx_errors++; 1363 lp->stats.rx_fifo_errors++; 1364 } else if (status & IM_EPH_INT) { 1365 smc_eph_interrupt(dev); 1366 } else if (status & IM_MDINT) { 1367 SMC_ACK_INT(IM_MDINT); 1368 smc_phy_interrupt(dev); 1369 } else if (status & IM_ERCV_INT) { 1370 SMC_ACK_INT(IM_ERCV_INT); 1371 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name); 1372 } 1373 } while (--timeout); 1374 1375 /* restore register states */ 1376 SMC_SET_PTR(saved_pointer); 1377 SMC_SET_INT_MASK(mask); 1378 spin_unlock(&lp->lock); 1379 1380 if (timeout == MAX_IRQ_LOOPS) 1381 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n", 1382 dev->name, mask); 1383 DBG(3, "%s: Interrupt done (%d loops)\n", 1384 dev->name, MAX_IRQ_LOOPS - timeout); 1385 1386 /* 1387 * We return IRQ_HANDLED unconditionally here even if there was 1388 * nothing to do. There is a possibility that a packet might 1389 * get enqueued into the chip right after TX_EMPTY_INT is raised 1390 * but just before the CPU acknowledges the IRQ. 1391 * Better take an unneeded IRQ in some occasions than complexifying 1392 * the code for all cases. 1393 */ 1394 return IRQ_HANDLED; 1395} 1396 1397#ifdef CONFIG_NET_POLL_CONTROLLER 1398/* 1399 * Polling receive - used by netconsole and other diagnostic tools 1400 * to allow network i/o with interrupts disabled. 1401 */ 1402static void smc_poll_controller(struct net_device *dev) 1403{ 1404 disable_irq(dev->irq); 1405 smc_interrupt(dev->irq, dev); 1406 enable_irq(dev->irq); 1407} 1408#endif 1409 1410/* Our watchdog timed out. Called by the networking layer */ 1411static void smc_timeout(struct net_device *dev) 1412{ 1413 struct smc_local *lp = netdev_priv(dev); 1414 void __iomem *ioaddr = lp->base; 1415 int status, mask, eph_st, meminfo, fifo; 1416 1417 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 1418 1419 spin_lock_irq(&lp->lock); 1420 status = SMC_GET_INT(); 1421 mask = SMC_GET_INT_MASK(); 1422 fifo = SMC_GET_FIFO(); 1423 SMC_SELECT_BANK(0); 1424 eph_st = SMC_GET_EPH_STATUS(); 1425 meminfo = SMC_GET_MIR(); 1426 SMC_SELECT_BANK(2); 1427 spin_unlock_irq(&lp->lock); 1428 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x " 1429 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n", 1430 dev->name, status, mask, meminfo, fifo, eph_st ); 1431 1432 smc_reset(dev); 1433 smc_enable(dev); 1434 1435 /* 1436 * Reconfiguring the PHY doesn't seem like a bad idea here, but 1437 * smc_phy_configure() calls msleep() which calls schedule_timeout() 1438 * which calls schedule(). Hence we use a work queue. 1439 */ 1440 if (lp->phy_type != 0) { 1441 if (schedule_work(&lp->phy_configure)) { 1442 lp->work_pending = 1; 1443 } 1444 } 1445 1446 /* We can accept TX packets again */ 1447 dev->trans_start = jiffies; 1448 netif_wake_queue(dev); 1449} 1450 1451/* 1452 * This routine will, depending on the values passed to it, 1453 * either make it accept multicast packets, go into 1454 * promiscuous mode (for TCPDUMP and cousins) or accept 1455 * a select set of multicast packets 1456 */ 1457static void smc_set_multicast_list(struct net_device *dev) 1458{ 1459 struct smc_local *lp = netdev_priv(dev); 1460 void __iomem *ioaddr = lp->base; 1461 unsigned char multicast_table[8]; 1462 int update_multicast = 0; 1463 1464 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 1465 1466 if (dev->flags & IFF_PROMISC) { 1467 DBG(2, "%s: RCR_PRMS\n", dev->name); 1468 lp->rcr_cur_mode |= RCR_PRMS; 1469 } 1470 1471/* BUG? I never disable promiscuous mode if multicasting was turned on. 1472 Now, I turn off promiscuous mode, but I don't do anything to multicasting 1473 when promiscuous mode is turned on. 1474*/ 1475 1476 /* 1477 * Here, I am setting this to accept all multicast packets. 1478 * I don't need to zero the multicast table, because the flag is 1479 * checked before the table is 1480 */ 1481 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) { 1482 DBG(2, "%s: RCR_ALMUL\n", dev->name); 1483 lp->rcr_cur_mode |= RCR_ALMUL; 1484 } 1485 1486 /* 1487 * This sets the internal hardware table to filter out unwanted 1488 * multicast packets before they take up memory. 1489 * 1490 * The SMC chip uses a hash table where the high 6 bits of the CRC of 1491 * address are the offset into the table. If that bit is 1, then the 1492 * multicast packet is accepted. Otherwise, it's dropped silently. 1493 * 1494 * To use the 6 bits as an offset into the table, the high 3 bits are 1495 * the number of the 8 bit register, while the low 3 bits are the bit 1496 * within that register. 1497 */ 1498 else if (dev->mc_count) { 1499 int i; 1500 struct dev_mc_list *cur_addr; 1501 1502 /* table for flipping the order of 3 bits */ 1503 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7}; 1504 1505 /* start with a table of all zeros: reject all */ 1506 memset(multicast_table, 0, sizeof(multicast_table)); 1507 1508 cur_addr = dev->mc_list; 1509 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) { 1510 int position; 1511 1512 /* do we have a pointer here? */ 1513 if (!cur_addr) 1514 break; 1515 /* make sure this is a multicast address - 1516 shouldn't this be a given if we have it here ? */ 1517 if (!(*cur_addr->dmi_addr & 1)) 1518 continue; 1519 1520 /* only use the low order bits */ 1521 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f; 1522 1523 /* do some messy swapping to put the bit in the right spot */ 1524 multicast_table[invert3[position&7]] |= 1525 (1<<invert3[(position>>3)&7]); 1526 } 1527 1528 /* be sure I get rid of flags I might have set */ 1529 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL); 1530 1531 /* now, the table can be loaded into the chipset */ 1532 update_multicast = 1; 1533 } else { 1534 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name); 1535 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL); 1536 1537 /* 1538 * since I'm disabling all multicast entirely, I need to 1539 * clear the multicast list 1540 */ 1541 memset(multicast_table, 0, sizeof(multicast_table)); 1542 update_multicast = 1; 1543 } 1544 1545 spin_lock_irq(&lp->lock); 1546 SMC_SELECT_BANK(0); 1547 SMC_SET_RCR(lp->rcr_cur_mode); 1548 if (update_multicast) { 1549 SMC_SELECT_BANK(3); 1550 SMC_SET_MCAST(multicast_table); 1551 } 1552 SMC_SELECT_BANK(2); 1553 spin_unlock_irq(&lp->lock); 1554} 1555 1556 1557/* 1558 * Open and Initialize the board 1559 * 1560 * Set up everything, reset the card, etc.. 1561 */ 1562static int 1563smc_open(struct net_device *dev) 1564{ 1565 struct smc_local *lp = netdev_priv(dev); 1566 1567 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 1568 1569 /* 1570 * Check that the address is valid. If its not, refuse 1571 * to bring the device up. The user must specify an 1572 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx 1573 */ 1574 if (!is_valid_ether_addr(dev->dev_addr)) { 1575 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__); 1576 return -EINVAL; 1577 } 1578 1579 /* Setup the default Register Modes */ 1580 lp->tcr_cur_mode = TCR_DEFAULT; 1581 lp->rcr_cur_mode = RCR_DEFAULT; 1582 lp->rpc_cur_mode = RPC_DEFAULT; 1583 1584 /* 1585 * If we are not using a MII interface, we need to 1586 * monitor our own carrier signal to detect faults. 1587 */ 1588 if (lp->phy_type == 0) 1589 lp->tcr_cur_mode |= TCR_MON_CSN; 1590 1591 /* reset the hardware */ 1592 smc_reset(dev); 1593 smc_enable(dev); 1594 1595 /* Configure the PHY, initialize the link state */ 1596 if (lp->phy_type != 0) 1597 smc_phy_configure(&lp->phy_configure); 1598 else { 1599 spin_lock_irq(&lp->lock); 1600 smc_10bt_check_media(dev, 1); 1601 spin_unlock_irq(&lp->lock); 1602 } 1603 1604 netif_start_queue(dev); 1605 return 0; 1606} 1607 1608/* 1609 * smc_close 1610 * 1611 * this makes the board clean up everything that it can 1612 * and not talk to the outside world. Caused by 1613 * an 'ifconfig ethX down' 1614 */ 1615static int smc_close(struct net_device *dev) 1616{ 1617 struct smc_local *lp = netdev_priv(dev); 1618 1619 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 1620 1621 netif_stop_queue(dev); 1622 netif_carrier_off(dev); 1623 1624 /* clear everything */ 1625 smc_shutdown(dev); 1626 tasklet_kill(&lp->tx_task); 1627 smc_phy_powerdown(dev); 1628 return 0; 1629} 1630 1631/* 1632 * Get the current statistics. 1633 * This may be called with the card open or closed. 1634 */ 1635static struct net_device_stats *smc_query_statistics(struct net_device *dev) 1636{ 1637 struct smc_local *lp = netdev_priv(dev); 1638 1639 DBG(2, "%s: %s\n", dev->name, __FUNCTION__); 1640 1641 return &lp->stats; 1642} 1643 1644/* 1645 * Ethtool support 1646 */ 1647static int 1648smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1649{ 1650 struct smc_local *lp = netdev_priv(dev); 1651 int ret; 1652 1653 cmd->maxtxpkt = 1; 1654 cmd->maxrxpkt = 1; 1655 1656 if (lp->phy_type != 0) { 1657 spin_lock_irq(&lp->lock); 1658 ret = mii_ethtool_gset(&lp->mii, cmd); 1659 spin_unlock_irq(&lp->lock); 1660 } else { 1661 cmd->supported = SUPPORTED_10baseT_Half | 1662 SUPPORTED_10baseT_Full | 1663 SUPPORTED_TP | SUPPORTED_AUI; 1664 1665 if (lp->ctl_rspeed == 10) 1666 cmd->speed = SPEED_10; 1667 else if (lp->ctl_rspeed == 100) 1668 cmd->speed = SPEED_100; 1669 1670 cmd->autoneg = AUTONEG_DISABLE; 1671 cmd->transceiver = XCVR_INTERNAL; 1672 cmd->port = 0; 1673 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF; 1674 1675 ret = 0; 1676 } 1677 1678 return ret; 1679} 1680 1681static int 1682smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1683{ 1684 struct smc_local *lp = netdev_priv(dev); 1685 int ret; 1686 1687 if (lp->phy_type != 0) { 1688 spin_lock_irq(&lp->lock); 1689 ret = mii_ethtool_sset(&lp->mii, cmd); 1690 spin_unlock_irq(&lp->lock); 1691 } else { 1692 if (cmd->autoneg != AUTONEG_DISABLE || 1693 cmd->speed != SPEED_10 || 1694 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) || 1695 (cmd->port != PORT_TP && cmd->port != PORT_AUI)) 1696 return -EINVAL; 1697 1698// lp->port = cmd->port; 1699 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL; 1700 1701// if (netif_running(dev)) 1702// smc_set_port(dev); 1703 1704 ret = 0; 1705 } 1706 1707 return ret; 1708} 1709 1710static void 1711smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1712{ 1713 strncpy(info->driver, CARDNAME, sizeof(info->driver)); 1714 strncpy(info->version, version, sizeof(info->version)); 1715 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info)); 1716} 1717 1718static int smc_ethtool_nwayreset(struct net_device *dev) 1719{ 1720 struct smc_local *lp = netdev_priv(dev); 1721 int ret = -EINVAL; 1722 1723 if (lp->phy_type != 0) { 1724 spin_lock_irq(&lp->lock); 1725 ret = mii_nway_restart(&lp->mii); 1726 spin_unlock_irq(&lp->lock); 1727 } 1728 1729 return ret; 1730} 1731 1732static u32 smc_ethtool_getmsglevel(struct net_device *dev) 1733{ 1734 struct smc_local *lp = netdev_priv(dev); 1735 return lp->msg_enable; 1736} 1737 1738static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level) 1739{ 1740 struct smc_local *lp = netdev_priv(dev); 1741 lp->msg_enable = level; 1742} 1743 1744static const struct ethtool_ops smc_ethtool_ops = { 1745 .get_settings = smc_ethtool_getsettings, 1746 .set_settings = smc_ethtool_setsettings, 1747 .get_drvinfo = smc_ethtool_getdrvinfo, 1748 1749 .get_msglevel = smc_ethtool_getmsglevel, 1750 .set_msglevel = smc_ethtool_setmsglevel, 1751 .nway_reset = smc_ethtool_nwayreset, 1752 .get_link = ethtool_op_get_link, 1753// .get_eeprom = smc_ethtool_geteeprom, 1754// .set_eeprom = smc_ethtool_seteeprom, 1755}; 1756 1757/* 1758 * smc_findirq 1759 * 1760 * This routine has a simple purpose -- make the SMC chip generate an 1761 * interrupt, so an auto-detect routine can detect it, and find the IRQ, 1762 */ 1763/* 1764 * does this still work? 1765 * 1766 * I just deleted auto_irq.c, since it was never built... 1767 * --jgarzik 1768 */ 1769static int __init smc_findirq(void __iomem *ioaddr) 1770{ 1771 int timeout = 20; 1772 unsigned long cookie; 1773 1774 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__); 1775 1776 cookie = probe_irq_on(); 1777 1778 /* 1779 * What I try to do here is trigger an ALLOC_INT. This is done 1780 * by allocating a small chunk of memory, which will give an interrupt 1781 * when done. 1782 */ 1783 /* enable ALLOCation interrupts ONLY */ 1784 SMC_SELECT_BANK(2); 1785 SMC_SET_INT_MASK(IM_ALLOC_INT); 1786 1787 /* 1788 * Allocate 512 bytes of memory. Note that the chip was just 1789 * reset so all the memory is available 1790 */ 1791 SMC_SET_MMU_CMD(MC_ALLOC | 1); 1792 1793 /* 1794 * Wait until positive that the interrupt has been generated 1795 */ 1796 do { 1797 int int_status; 1798 udelay(10); 1799 int_status = SMC_GET_INT(); 1800 if (int_status & IM_ALLOC_INT) 1801 break; /* got the interrupt */ 1802 } while (--timeout); 1803 1804 /* 1805 * there is really nothing that I can do here if timeout fails, 1806 * as autoirq_report will return a 0 anyway, which is what I 1807 * want in this case. Plus, the clean up is needed in both 1808 * cases. 1809 */ 1810 1811 /* and disable all interrupts again */ 1812 SMC_SET_INT_MASK(0); 1813 1814 /* and return what I found */ 1815 return probe_irq_off(cookie); 1816} 1817 1818/* 1819 * Function: smc_probe(unsigned long ioaddr) 1820 * 1821 * Purpose: 1822 * Tests to see if a given ioaddr points to an SMC91x chip. 1823 * Returns a 0 on success 1824 * 1825 * Algorithm: 1826 * (1) see if the high byte of BANK_SELECT is 0x33 1827 * (2) compare the ioaddr with the base register's address 1828 * (3) see if I recognize the chip ID in the appropriate register 1829 * 1830 * Here I do typical initialization tasks. 1831 * 1832 * o Initialize the structure if needed 1833 * o print out my vanity message if not done so already 1834 * o print out what type of hardware is detected 1835 * o print out the ethernet address 1836 * o find the IRQ 1837 * o set up my private data 1838 * o configure the dev structure with my subroutines 1839 * o actually GRAB the irq. 1840 * o GRAB the region 1841 */ 1842static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr) 1843{ 1844 struct smc_local *lp = netdev_priv(dev); 1845 static int version_printed = 0; 1846 int i, retval; 1847 unsigned int val, revision_register; 1848 const char *version_string; 1849 1850 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__); 1851 1852 /* First, see if the high byte is 0x33 */ 1853 val = SMC_CURRENT_BANK(); 1854 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val); 1855 if ((val & 0xFF00) != 0x3300) { 1856 if ((val & 0xFF) == 0x33) { 1857 printk(KERN_WARNING 1858 "%s: Detected possible byte-swapped interface" 1859 " at IOADDR %p\n", CARDNAME, ioaddr); 1860 } 1861 retval = -ENODEV; 1862 goto err_out; 1863 } 1864 1865 /* 1866 * The above MIGHT indicate a device, but I need to write to 1867 * further test this. 1868 */ 1869 SMC_SELECT_BANK(0); 1870 val = SMC_CURRENT_BANK(); 1871 if ((val & 0xFF00) != 0x3300) { 1872 retval = -ENODEV; 1873 goto err_out; 1874 } 1875 1876 /* 1877 * well, we've already written once, so hopefully another 1878 * time won't hurt. This time, I need to switch the bank 1879 * register to bank 1, so I can access the base address 1880 * register 1881 */ 1882 SMC_SELECT_BANK(1); 1883 val = SMC_GET_BASE(); 1884 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT; 1885 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) { 1886 printk("%s: IOADDR %p doesn't match configuration (%x).\n", 1887 CARDNAME, ioaddr, val); 1888 } 1889 1890 /* 1891 * check if the revision register is something that I 1892 * recognize. These might need to be added to later, 1893 * as future revisions could be added. 1894 */ 1895 SMC_SELECT_BANK(3); 1896 revision_register = SMC_GET_REV(); 1897 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register); 1898 version_string = chip_ids[ (revision_register >> 4) & 0xF]; 1899 if (!version_string || (revision_register & 0xff00) != 0x3300) { 1900 /* I don't recognize this chip, so... */ 1901 printk("%s: IO %p: Unrecognized revision register 0x%04x" 1902 ", Contact author.\n", CARDNAME, 1903 ioaddr, revision_register); 1904 1905 retval = -ENODEV; 1906 goto err_out; 1907 } 1908 1909 /* At this point I'll assume that the chip is an SMC91x. */ 1910 if (version_printed++ == 0) 1911 printk("%s", version); 1912 1913 /* fill in some of the fields */ 1914 dev->base_addr = (unsigned long)ioaddr; 1915 lp->base = ioaddr; 1916 lp->version = revision_register & 0xff; 1917 spin_lock_init(&lp->lock); 1918 1919 /* Get the MAC address */ 1920 SMC_SELECT_BANK(1); 1921 SMC_GET_MAC_ADDR(dev->dev_addr); 1922 1923 /* now, reset the chip, and put it into a known state */ 1924 smc_reset(dev); 1925 1926 /* 1927 * If dev->irq is 0, then the device has to be banged on to see 1928 * what the IRQ is. 1929 * 1930 * This banging doesn't always detect the IRQ, for unknown reasons. 1931 * a workaround is to reset the chip and try again. 1932 * 1933 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to 1934 * be what is requested on the command line. I don't do that, mostly 1935 * because the card that I have uses a non-standard method of accessing 1936 * the IRQs, and because this _should_ work in most configurations. 1937 * 1938 * Specifying an IRQ is done with the assumption that the user knows 1939 * what (s)he is doing. No checking is done!!!! 1940 */ 1941 if (dev->irq < 1) { 1942 int trials; 1943 1944 trials = 3; 1945 while (trials--) { 1946 dev->irq = smc_findirq(ioaddr); 1947 if (dev->irq) 1948 break; 1949 /* kick the card and try again */ 1950 smc_reset(dev); 1951 } 1952 } 1953 if (dev->irq == 0) { 1954 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n", 1955 dev->name); 1956 retval = -ENODEV; 1957 goto err_out; 1958 } 1959 dev->irq = irq_canonicalize(dev->irq); 1960 1961 /* Fill in the fields of the device structure with ethernet values. */ 1962 ether_setup(dev); 1963 1964 dev->open = smc_open; 1965 dev->stop = smc_close; 1966 dev->hard_start_xmit = smc_hard_start_xmit; 1967 dev->tx_timeout = smc_timeout; 1968 dev->watchdog_timeo = msecs_to_jiffies(watchdog); 1969 dev->get_stats = smc_query_statistics; 1970 dev->set_multicast_list = smc_set_multicast_list; 1971 dev->ethtool_ops = &smc_ethtool_ops; 1972#ifdef CONFIG_NET_POLL_CONTROLLER 1973 dev->poll_controller = smc_poll_controller; 1974#endif 1975 1976 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev); 1977 INIT_WORK(&lp->phy_configure, smc_phy_configure); 1978 lp->dev = dev; 1979 lp->mii.phy_id_mask = 0x1f; 1980 lp->mii.reg_num_mask = 0x1f; 1981 lp->mii.force_media = 0; 1982 lp->mii.full_duplex = 0; 1983 lp->mii.dev = dev; 1984 lp->mii.mdio_read = smc_phy_read; 1985 lp->mii.mdio_write = smc_phy_write; 1986 1987 /* 1988 * Locate the phy, if any. 1989 */ 1990 if (lp->version >= (CHIP_91100 << 4)) 1991 smc_phy_detect(dev); 1992 1993 /* then shut everything down to save power */ 1994 smc_shutdown(dev); 1995 smc_phy_powerdown(dev); 1996 1997 /* Set default parameters */ 1998 lp->msg_enable = NETIF_MSG_LINK; 1999 lp->ctl_rfduplx = 0; 2000 lp->ctl_rspeed = 10; 2001 2002 if (lp->version >= (CHIP_91100 << 4)) { 2003 lp->ctl_rfduplx = 1; 2004 lp->ctl_rspeed = 100; 2005 } 2006 2007 /* Grab the IRQ */ 2008 retval = request_irq(dev->irq, &smc_interrupt, SMC_IRQ_FLAGS, dev->name, dev); 2009 if (retval) 2010 goto err_out; 2011 2012#ifdef SMC_USE_PXA_DMA 2013 { 2014 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW, 2015 smc_pxa_dma_irq, NULL); 2016 if (dma >= 0) 2017 dev->dma = dma; 2018 } 2019#endif 2020 2021 retval = register_netdev(dev); 2022 if (retval == 0) { 2023 /* now, print out the card info, in a short format.. */ 2024 printk("%s: %s (rev %d) at %p IRQ %d", 2025 dev->name, version_string, revision_register & 0x0f, 2026 lp->base, dev->irq); 2027 2028 if (dev->dma != (unsigned char)-1) 2029 printk(" DMA %d", dev->dma); 2030 2031 printk("%s%s\n", nowait ? " [nowait]" : "", 2032 THROTTLE_TX_PKTS ? " [throttle_tx]" : ""); 2033 2034 if (!is_valid_ether_addr(dev->dev_addr)) { 2035 printk("%s: Invalid ethernet MAC address. Please " 2036 "set using ifconfig\n", dev->name); 2037 } else { 2038 /* Print the Ethernet address */ 2039 printk("%s: Ethernet addr: ", dev->name); 2040 for (i = 0; i < 5; i++) 2041 printk("%2.2x:", dev->dev_addr[i]); 2042 printk("%2.2x\n", dev->dev_addr[5]); 2043 } 2044 2045 if (lp->phy_type == 0) { 2046 PRINTK("%s: No PHY found\n", dev->name); 2047 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) { 2048 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name); 2049 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) { 2050 PRINTK("%s: PHY LAN83C180\n", dev->name); 2051 } 2052 } 2053 2054err_out: 2055#ifdef SMC_USE_PXA_DMA 2056 if (retval && dev->dma != (unsigned char)-1) 2057 pxa_free_dma(dev->dma); 2058#endif 2059 return retval; 2060} 2061 2062static int smc_enable_device(struct platform_device *pdev) 2063{ 2064 unsigned long flags; 2065 unsigned char ecor, ecsr; 2066 void __iomem *addr; 2067 struct resource * res; 2068 2069 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib"); 2070 if (!res) 2071 return 0; 2072 2073 /* 2074 * Map the attribute space. This is overkill, but clean. 2075 */ 2076 addr = ioremap(res->start, ATTRIB_SIZE); 2077 if (!addr) 2078 return -ENOMEM; 2079 2080 /* 2081 * Reset the device. We must disable IRQs around this 2082 * since a reset causes the IRQ line become active. 2083 */ 2084 local_irq_save(flags); 2085 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET; 2086 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT)); 2087 readb(addr + (ECOR << SMC_IO_SHIFT)); 2088 2089 /* 2090 * Wait 100us for the chip to reset. 2091 */ 2092 udelay(100); 2093 2094 /* 2095 * The device will ignore all writes to the enable bit while 2096 * reset is asserted, even if the reset bit is cleared in the 2097 * same write. Must clear reset first, then enable the device. 2098 */ 2099 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT)); 2100 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT)); 2101 2102 /* 2103 * Set the appropriate byte/word mode. 2104 */ 2105 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8; 2106 if (!SMC_CAN_USE_16BIT) 2107 ecsr |= ECSR_IOIS8; 2108 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT)); 2109 local_irq_restore(flags); 2110 2111 iounmap(addr); 2112 2113 /* 2114 * Wait for the chip to wake up. We could poll the control 2115 * register in the main register space, but that isn't mapped 2116 * yet. We know this is going to take 750us. 2117 */ 2118 msleep(1); 2119 2120 return 0; 2121} 2122 2123static int smc_request_attrib(struct platform_device *pdev) 2124{ 2125 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib"); 2126 2127 if (!res) 2128 return 0; 2129 2130 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME)) 2131 return -EBUSY; 2132 2133 return 0; 2134} 2135 2136static void smc_release_attrib(struct platform_device *pdev) 2137{ 2138 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib"); 2139 2140 if (res) 2141 release_mem_region(res->start, ATTRIB_SIZE); 2142} 2143 2144static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev) 2145{ 2146 if (SMC_CAN_USE_DATACS) { 2147 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32"); 2148 struct smc_local *lp = netdev_priv(ndev); 2149 2150 if (!res) 2151 return; 2152 2153 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) { 2154 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME); 2155 return; 2156 } 2157 2158 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT); 2159 } 2160} 2161 2162static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev) 2163{ 2164 if (SMC_CAN_USE_DATACS) { 2165 struct smc_local *lp = netdev_priv(ndev); 2166 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32"); 2167 2168 if (lp->datacs) 2169 iounmap(lp->datacs); 2170 2171 lp->datacs = NULL; 2172 2173 if (res) 2174 release_mem_region(res->start, SMC_DATA_EXTENT); 2175 } 2176} 2177 2178/* 2179 * smc_init(void) 2180 * Input parameters: 2181 * dev->base_addr == 0, try to find all possible locations 2182 * dev->base_addr > 0x1ff, this is the address to check 2183 * dev->base_addr == <anything else>, return failure code 2184 * 2185 * Output: 2186 * 0 --> there is a device 2187 * anything else, error 2188 */ 2189static int smc_drv_probe(struct platform_device *pdev) 2190{ 2191 struct net_device *ndev; 2192 struct resource *res; 2193 unsigned int __iomem *addr; 2194 int ret; 2195 2196 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs"); 2197 if (!res) 2198 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2199 if (!res) { 2200 ret = -ENODEV; 2201 goto out; 2202 } 2203 2204 2205 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) { 2206 ret = -EBUSY; 2207 goto out; 2208 } 2209 2210 ndev = alloc_etherdev(sizeof(struct smc_local)); 2211 if (!ndev) { 2212 printk("%s: could not allocate device.\n", CARDNAME); 2213 ret = -ENOMEM; 2214 goto out_release_io; 2215 } 2216 SET_MODULE_OWNER(ndev); 2217 SET_NETDEV_DEV(ndev, &pdev->dev); 2218 2219 ndev->dma = (unsigned char)-1; 2220 ndev->irq = platform_get_irq(pdev, 0); 2221 if (ndev->irq < 0) { 2222 ret = -ENODEV; 2223 goto out_free_netdev; 2224 } 2225 2226 ret = smc_request_attrib(pdev); 2227 if (ret) 2228 goto out_free_netdev; 2229#if defined(CONFIG_SA1100_ASSABET) 2230 NCR_0 |= NCR_ENET_OSC_EN; 2231#endif 2232 ret = smc_enable_device(pdev); 2233 if (ret) 2234 goto out_release_attrib; 2235 2236 addr = ioremap(res->start, SMC_IO_EXTENT); 2237 if (!addr) { 2238 ret = -ENOMEM; 2239 goto out_release_attrib; 2240 } 2241 2242 platform_set_drvdata(pdev, ndev); 2243 ret = smc_probe(ndev, addr); 2244 if (ret != 0) 2245 goto out_iounmap; 2246#ifdef SMC_USE_PXA_DMA 2247 else { 2248 struct smc_local *lp = netdev_priv(ndev); 2249 lp->physaddr = res->start; 2250 } 2251#endif 2252 2253 smc_request_datacs(pdev, ndev); 2254 2255 return 0; 2256 2257 out_iounmap: 2258 platform_set_drvdata(pdev, NULL); 2259 iounmap(addr); 2260 out_release_attrib: 2261 smc_release_attrib(pdev); 2262 out_free_netdev: 2263 free_netdev(ndev); 2264 out_release_io: 2265 release_mem_region(res->start, SMC_IO_EXTENT); 2266 out: 2267 printk("%s: not found (%d).\n", CARDNAME, ret); 2268 2269 return ret; 2270} 2271 2272static int smc_drv_remove(struct platform_device *pdev) 2273{ 2274 struct net_device *ndev = platform_get_drvdata(pdev); 2275 struct smc_local *lp = netdev_priv(ndev); 2276 struct resource *res; 2277 2278 platform_set_drvdata(pdev, NULL); 2279 2280 unregister_netdev(ndev); 2281 2282 free_irq(ndev->irq, ndev); 2283 2284#ifdef SMC_USE_PXA_DMA 2285 if (ndev->dma != (unsigned char)-1) 2286 pxa_free_dma(ndev->dma); 2287#endif 2288 iounmap(lp->base); 2289 2290 smc_release_datacs(pdev,ndev); 2291 smc_release_attrib(pdev); 2292 2293 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs"); 2294 if (!res) 2295 platform_get_resource(pdev, IORESOURCE_MEM, 0); 2296 release_mem_region(res->start, SMC_IO_EXTENT); 2297 2298 free_netdev(ndev); 2299 2300 return 0; 2301} 2302 2303static int smc_drv_suspend(struct platform_device *dev, pm_message_t state) 2304{ 2305 struct net_device *ndev = platform_get_drvdata(dev); 2306 2307 if (ndev) { 2308 if (netif_running(ndev)) { 2309 netif_device_detach(ndev); 2310 smc_shutdown(ndev); 2311 smc_phy_powerdown(ndev); 2312 } 2313 } 2314 return 0; 2315} 2316 2317static int smc_drv_resume(struct platform_device *dev) 2318{ 2319 struct net_device *ndev = platform_get_drvdata(dev); 2320 2321 if (ndev) { 2322 struct smc_local *lp = netdev_priv(ndev); 2323 smc_enable_device(dev); 2324 if (netif_running(ndev)) { 2325 smc_reset(ndev); 2326 smc_enable(ndev); 2327 if (lp->phy_type != 0) 2328 smc_phy_configure(&lp->phy_configure); 2329 netif_device_attach(ndev); 2330 } 2331 } 2332 return 0; 2333} 2334 2335static struct platform_driver smc_driver = { 2336 .probe = smc_drv_probe, 2337 .remove = smc_drv_remove, 2338 .suspend = smc_drv_suspend, 2339 .resume = smc_drv_resume, 2340 .driver = { 2341 .name = CARDNAME, 2342 }, 2343}; 2344 2345static int __init smc_init(void) 2346{ 2347#ifdef MODULE 2348#ifdef CONFIG_ISA 2349 if (io == -1) 2350 printk(KERN_WARNING 2351 "%s: You shouldn't use auto-probing with insmod!\n", 2352 CARDNAME); 2353#endif 2354#endif 2355 2356 return platform_driver_register(&smc_driver); 2357} 2358 2359static void __exit smc_cleanup(void) 2360{ 2361 platform_driver_unregister(&smc_driver); 2362} 2363 2364module_init(smc_init); 2365module_exit(smc_cleanup);