tjh.dev
Linux kernel mirror (for testing)
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linux
1/*
2 * pata_hpt3x3 - HPT3x3 driver
3 * (c) Copyright 2005-2006 Red Hat
4 *
5 * Was pata_hpt34x but the naming was confusing as it supported the
6 * 343 and 363 so it has been renamed.
7 *
8 * Based on:
9 * linux/drivers/ide/pci/hpt34x.c Version 0.40 Sept 10, 2002
10 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
11 *
12 * May be copied or modified under the terms of the GNU General Public
13 * License
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/blkdev.h>
21#include <linux/delay.h>
22#include <scsi/scsi_host.h>
23#include <linux/libata.h>
24
25#define DRV_NAME "pata_hpt3x3"
26#define DRV_VERSION "0.4.2"
27
28static int hpt3x3_probe_init(struct ata_port *ap)
29{
30 ap->cbl = ATA_CBL_PATA40;
31 return ata_std_prereset(ap);
32}
33
34/**
35 * hpt3x3_probe_reset - reset the hpt3x3 bus
36 * @ap: ATA port to reset
37 *
38 * Perform the housekeeping when doing an ATA bus reeset. We just
39 * need to force the cable type.
40 */
41
42static void hpt3x3_error_handler(struct ata_port *ap)
43{
44 return ata_bmdma_drive_eh(ap, hpt3x3_probe_init, ata_std_softreset, NULL, ata_std_postreset);
45}
46
47/**
48 * hpt3x3_set_piomode - PIO setup
49 * @ap: ATA interface
50 * @adev: device on the interface
51 *
52 * Set our PIO requirements. This is fairly simple on the HPT3x3 as
53 * all we have to do is clear the MWDMA and UDMA bits then load the
54 * mode number.
55 */
56
57static void hpt3x3_set_piomode(struct ata_port *ap, struct ata_device *adev)
58{
59 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
60 u32 r1, r2;
61 int dn = 2 * ap->port_no + adev->devno;
62
63 pci_read_config_dword(pdev, 0x44, &r1);
64 pci_read_config_dword(pdev, 0x48, &r2);
65 /* Load the PIO timing number */
66 r1 &= ~(7 << (3 * dn));
67 r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn);
68 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
69
70 pci_write_config_dword(pdev, 0x44, r1);
71 pci_write_config_dword(pdev, 0x48, r2);
72}
73
74/**
75 * hpt3x3_set_dmamode - DMA timing setup
76 * @ap: ATA interface
77 * @adev: Device being configured
78 *
79 * Set up the channel for MWDMA or UDMA modes. Much the same as with
80 * PIO, load the mode number and then set MWDMA or UDMA flag.
81 */
82
83static void hpt3x3_set_dmamode(struct ata_port *ap, struct ata_device *adev)
84{
85 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
86 u32 r1, r2;
87 int dn = 2 * ap->port_no + adev->devno;
88 int mode_num = adev->dma_mode & 0x0F;
89
90 pci_read_config_dword(pdev, 0x44, &r1);
91 pci_read_config_dword(pdev, 0x48, &r2);
92 /* Load the timing number */
93 r1 &= ~(7 << (3 * dn));
94 r1 |= (mode_num << (3 * dn));
95 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
96
97 if (adev->dma_mode >= XFER_UDMA_0)
98 r2 |= 0x01 << dn; /* Ultra mode */
99 else
100 r2 |= 0x10 << dn; /* MWDMA */
101
102 pci_write_config_dword(pdev, 0x44, r1);
103 pci_write_config_dword(pdev, 0x48, r2);
104}
105
106static struct scsi_host_template hpt3x3_sht = {
107 .module = THIS_MODULE,
108 .name = DRV_NAME,
109 .ioctl = ata_scsi_ioctl,
110 .queuecommand = ata_scsi_queuecmd,
111 .can_queue = ATA_DEF_QUEUE,
112 .this_id = ATA_SHT_THIS_ID,
113 .sg_tablesize = LIBATA_MAX_PRD,
114 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
115 .emulated = ATA_SHT_EMULATED,
116 .use_clustering = ATA_SHT_USE_CLUSTERING,
117 .proc_name = DRV_NAME,
118 .dma_boundary = ATA_DMA_BOUNDARY,
119 .slave_configure = ata_scsi_slave_config,
120 .slave_destroy = ata_scsi_slave_destroy,
121 .bios_param = ata_std_bios_param,
122 .resume = ata_scsi_device_resume,
123 .suspend = ata_scsi_device_suspend,
124};
125
126static struct ata_port_operations hpt3x3_port_ops = {
127 .port_disable = ata_port_disable,
128 .set_piomode = hpt3x3_set_piomode,
129 .set_dmamode = hpt3x3_set_dmamode,
130 .mode_filter = ata_pci_default_filter,
131
132 .tf_load = ata_tf_load,
133 .tf_read = ata_tf_read,
134 .check_status = ata_check_status,
135 .exec_command = ata_exec_command,
136 .dev_select = ata_std_dev_select,
137
138 .freeze = ata_bmdma_freeze,
139 .thaw = ata_bmdma_thaw,
140 .error_handler = hpt3x3_error_handler,
141 .post_internal_cmd = ata_bmdma_post_internal_cmd,
142
143 .bmdma_setup = ata_bmdma_setup,
144 .bmdma_start = ata_bmdma_start,
145 .bmdma_stop = ata_bmdma_stop,
146 .bmdma_status = ata_bmdma_status,
147
148 .qc_prep = ata_qc_prep,
149 .qc_issue = ata_qc_issue_prot,
150
151 .data_xfer = ata_data_xfer,
152
153 .irq_handler = ata_interrupt,
154 .irq_clear = ata_bmdma_irq_clear,
155 .irq_on = ata_irq_on,
156 .irq_ack = ata_irq_ack,
157
158 .port_start = ata_port_start,
159};
160
161/**
162 * hpt3x3_init_chipset - chip setup
163 * @dev: PCI device
164 *
165 * Perform the setup required at boot and on resume.
166 */
167
168static void hpt3x3_init_chipset(struct pci_dev *dev)
169{
170 u16 cmd;
171 /* Initialize the board */
172 pci_write_config_word(dev, 0x80, 0x00);
173 /* Check if it is a 343 or a 363. 363 has COMMAND_MEMORY set */
174 pci_read_config_word(dev, PCI_COMMAND, &cmd);
175 if (cmd & PCI_COMMAND_MEMORY)
176 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
177 else
178 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
179}
180
181
182/**
183 * hpt3x3_init_one - Initialise an HPT343/363
184 * @dev: PCI device
185 * @id: Entry in match table
186 *
187 * Perform basic initialisation. The chip has a quirk that it won't
188 * function unless it is at XX00. The old ATA driver touched this up
189 * but we leave it for pci quirks to do properly.
190 */
191
192static int hpt3x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
193{
194 static struct ata_port_info info = {
195 .sht = &hpt3x3_sht,
196 .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST,
197 .pio_mask = 0x1f,
198 .mwdma_mask = 0x07,
199 .udma_mask = 0x07,
200 .port_ops = &hpt3x3_port_ops
201 };
202 static struct ata_port_info *port_info[2] = { &info, &info };
203
204 hpt3x3_init_chipset(dev);
205 /* Now kick off ATA set up */
206 return ata_pci_init_one(dev, port_info, 2);
207}
208
209static int hpt3x3_reinit_one(struct pci_dev *dev)
210{
211 hpt3x3_init_chipset(dev);
212 return ata_pci_device_resume(dev);
213}
214
215static const struct pci_device_id hpt3x3[] = {
216 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT343), },
217
218 { },
219};
220
221static struct pci_driver hpt3x3_pci_driver = {
222 .name = DRV_NAME,
223 .id_table = hpt3x3,
224 .probe = hpt3x3_init_one,
225 .remove = ata_pci_remove_one,
226 .suspend = ata_pci_device_suspend,
227 .resume = hpt3x3_reinit_one,
228};
229
230static int __init hpt3x3_init(void)
231{
232 return pci_register_driver(&hpt3x3_pci_driver);
233}
234
235
236static void __exit hpt3x3_exit(void)
237{
238 pci_unregister_driver(&hpt3x3_pci_driver);
239}
240
241
242MODULE_AUTHOR("Alan Cox");
243MODULE_DESCRIPTION("low-level driver for the Highpoint HPT343/363");
244MODULE_LICENSE("GPL");
245MODULE_DEVICE_TABLE(pci, hpt3x3);
246MODULE_VERSION(DRV_VERSION);
247
248module_init(hpt3x3_init);
249module_exit(hpt3x3_exit);