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1/*
2 * Header for MultiMediaCard (MMC)
3 *
4 * Copyright 2002 Hewlett-Packard Company
5 *
6 * Use consistent with the GNU GPL is permitted,
7 * provided that this copyright notice is
8 * preserved in its entirety in all copies and derived works.
9 *
10 * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
11 * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
12 * FITNESS FOR ANY PARTICULAR PURPOSE.
13 *
14 * Many thanks to Alessandro Rubini and Jonathan Corbet!
15 *
16 * Based strongly on code by:
17 *
18 * Author: Yong-iL Joh <tolkien@mizi.com>
19 * Date : $Date: 2002/06/18 12:37:30 $
20 *
21 * Author: Andrew Christian
22 * 15 May 2002
23 */
24
25#ifndef MMC_MMC_PROTOCOL_H
26#define MMC_MMC_PROTOCOL_H
27
28/* Standard MMC commands (4.1) type argument response */
29 /* class 1 */
30#define MMC_GO_IDLE_STATE 0 /* bc */
31#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
32#define MMC_ALL_SEND_CID 2 /* bcr R2 */
33#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
34#define MMC_SET_DSR 4 /* bc [31:16] RCA */
35#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
36#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
37#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
38#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
39#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
40#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
41#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
42#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
43#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
44
45 /* class 2 */
46#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
47#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
48#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
49
50 /* class 3 */
51#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
52
53 /* class 4 */
54#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
55#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
56#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
57#define MMC_PROGRAM_CID 26 /* adtc R1 */
58#define MMC_PROGRAM_CSD 27 /* adtc R1 */
59
60 /* class 6 */
61#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
62#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
63#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
64
65 /* class 5 */
66#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
67#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
68#define MMC_ERASE 38 /* ac R1b */
69
70 /* class 9 */
71#define MMC_FAST_IO 39 /* ac <Complex> R4 */
72#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
73
74 /* class 7 */
75#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
76
77 /* class 8 */
78#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
79#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
80
81/* SD commands type argument response */
82 /* class 8 */
83/* This is basically the same command as for MMC with some quirks. */
84#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
85#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
86
87 /* Application commands */
88#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
89#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
90#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
91#define SD_APP_SEND_SCR 51 /* adtc R1 */
92
93/*
94 * MMC_SWITCH argument format:
95 *
96 * [31:26] Always 0
97 * [25:24] Access Mode
98 * [23:16] Location of target Byte in EXT_CSD
99 * [15:08] Value Byte
100 * [07:03] Always 0
101 * [02:00] Command Set
102 */
103
104/*
105 * SD_SWITCH argument format:
106 *
107 * [31] Check (0) or switch (1)
108 * [30:24] Reserved (0)
109 * [23:20] Function group 6
110 * [19:16] Function group 5
111 * [15:12] Function group 4
112 * [11:8] Function group 3
113 * [7:4] Function group 2
114 * [3:0] Function group 1
115 */
116
117/*
118 MMC status in R1
119 Type
120 e : error bit
121 s : status bit
122 r : detected and set for the actual command response
123 x : detected and set during command execution. the host must poll
124 the card by sending status command in order to read these bits.
125 Clear condition
126 a : according to the card state
127 b : always related to the previous command. Reception of
128 a valid command will clear it (with a delay of one command)
129 c : clear by read
130 */
131
132#define R1_OUT_OF_RANGE (1 << 31) /* er, c */
133#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
134#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
135#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
136#define R1_ERASE_PARAM (1 << 27) /* ex, c */
137#define R1_WP_VIOLATION (1 << 26) /* erx, c */
138#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
139#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
140#define R1_COM_CRC_ERROR (1 << 23) /* er, b */
141#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
142#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
143#define R1_CC_ERROR (1 << 20) /* erx, c */
144#define R1_ERROR (1 << 19) /* erx, c */
145#define R1_UNDERRUN (1 << 18) /* ex, c */
146#define R1_OVERRUN (1 << 17) /* ex, c */
147#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
148#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
149#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
150#define R1_ERASE_RESET (1 << 13) /* sr, c */
151#define R1_STATUS(x) (x & 0xFFFFE000)
152#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
153#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
154#define R1_APP_CMD (1 << 5) /* sr, c */
155
156/* These are unpacked versions of the actual responses */
157
158struct _mmc_csd {
159 u8 csd_structure;
160 u8 spec_vers;
161 u8 taac;
162 u8 nsac;
163 u8 tran_speed;
164 u16 ccc;
165 u8 read_bl_len;
166 u8 read_bl_partial;
167 u8 write_blk_misalign;
168 u8 read_blk_misalign;
169 u8 dsr_imp;
170 u16 c_size;
171 u8 vdd_r_curr_min;
172 u8 vdd_r_curr_max;
173 u8 vdd_w_curr_min;
174 u8 vdd_w_curr_max;
175 u8 c_size_mult;
176 union {
177 struct { /* MMC system specification version 3.1 */
178 u8 erase_grp_size;
179 u8 erase_grp_mult;
180 } v31;
181 struct { /* MMC system specification version 2.2 */
182 u8 sector_size;
183 u8 erase_grp_size;
184 } v22;
185 } erase;
186 u8 wp_grp_size;
187 u8 wp_grp_enable;
188 u8 default_ecc;
189 u8 r2w_factor;
190 u8 write_bl_len;
191 u8 write_bl_partial;
192 u8 file_format_grp;
193 u8 copy;
194 u8 perm_write_protect;
195 u8 tmp_write_protect;
196 u8 file_format;
197 u8 ecc;
198};
199
200#define MMC_VDD_145_150 0x00000001 /* VDD voltage 1.45 - 1.50 */
201#define MMC_VDD_150_155 0x00000002 /* VDD voltage 1.50 - 1.55 */
202#define MMC_VDD_155_160 0x00000004 /* VDD voltage 1.55 - 1.60 */
203#define MMC_VDD_160_165 0x00000008 /* VDD voltage 1.60 - 1.65 */
204#define MMC_VDD_165_170 0x00000010 /* VDD voltage 1.65 - 1.70 */
205#define MMC_VDD_17_18 0x00000020 /* VDD voltage 1.7 - 1.8 */
206#define MMC_VDD_18_19 0x00000040 /* VDD voltage 1.8 - 1.9 */
207#define MMC_VDD_19_20 0x00000080 /* VDD voltage 1.9 - 2.0 */
208#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
209#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
210#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
211#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
212#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
213#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
214#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
215#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
216#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
217#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
218#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
219#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
220#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
221#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
222#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
223#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
224#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */
225
226/*
227 * Card Command Classes (CCC)
228 */
229#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
230 /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
231#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
232 /* (CMD11) */
233#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */
234 /* (CMD16,17,18) */
235#define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */
236 /* (CMD20) */
237#define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */
238 /* (CMD16,24,25,26,27) */
239#define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */
240 /* (CMD32,33,34,35,36,37,38,39) */
241#define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */
242 /* (CMD28,29,30) */
243#define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */
244 /* (CMD16,CMD42) */
245#define CCC_APP_SPEC (1<<8) /* (8) Application specific */
246 /* (CMD55,56,57,ACMD*) */
247#define CCC_IO_MODE (1<<9) /* (9) I/O mode */
248 /* (CMD5,39,40,52,53) */
249#define CCC_SWITCH (1<<10) /* (10) High speed switch */
250 /* (CMD6,34,35,36,37,50) */
251 /* (11) Reserved */
252 /* (CMD?) */
253
254/*
255 * CSD field definitions
256 */
257
258#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */
259#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */
260#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
261#define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */
262
263#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */
264#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */
265#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */
266#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */
267#define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */
268
269/*
270 * EXT_CSD fields
271 */
272
273#define EXT_CSD_BUS_WIDTH 183 /* R/W */
274#define EXT_CSD_HS_TIMING 185 /* R/W */
275#define EXT_CSD_CARD_TYPE 196 /* RO */
276
277/*
278 * EXT_CSD field definitions
279 */
280
281#define EXT_CSD_CMD_SET_NORMAL (1<<0)
282#define EXT_CSD_CMD_SET_SECURE (1<<1)
283#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
284
285#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
286#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
287
288#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
289#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
290#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
291
292/*
293 * MMC_SWITCH access modes
294 */
295
296#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
297#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
298#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
299#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
300
301/*
302 * SCR field definitions
303 */
304
305#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
306#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
307#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */
308
309/*
310 * SD bus widths
311 */
312#define SD_BUS_WIDTH_1 0
313#define SD_BUS_WIDTH_4 2
314
315#endif /* MMC_MMC_PROTOCOL_H */
316