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1/* 2 * pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the 3 * PATA port of the controller. The SATA ports are 4 * driven by AHCI in the usual configuration although 5 * this driver can handle other setups if we need it. 6 * 7 * (c) 2006 Red Hat <alan@redhat.com> 8 */ 9 10#include <linux/kernel.h> 11#include <linux/module.h> 12#include <linux/pci.h> 13#include <linux/init.h> 14#include <linux/blkdev.h> 15#include <linux/delay.h> 16#include <linux/device.h> 17#include <scsi/scsi_host.h> 18#include <linux/libata.h> 19#include <linux/ata.h> 20 21#define DRV_NAME "pata_jmicron" 22#define DRV_VERSION "0.1.4" 23 24typedef enum { 25 PORT_PATA0 = 0, 26 PORT_PATA1 = 1, 27 PORT_SATA = 2, 28} port_type; 29 30/** 31 * jmicron_pre_reset - check for 40/80 pin 32 * @ap: Port 33 * 34 * Perform the PATA port setup we need. 35 36 * On the Jmicron 361/363 there is a single PATA port that can be mapped 37 * either as primary or secondary (or neither). We don't do any policy 38 * and setup here. We assume that has been done by init_one and the 39 * BIOS. 40 */ 41 42static int jmicron_pre_reset(struct ata_port *ap) 43{ 44 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 45 u32 control; 46 u32 control5; 47 int port_mask = 1<< (4 * ap->port_no); 48 int port = ap->port_no; 49 port_type port_map[2]; 50 51 /* Check if our port is enabled */ 52 pci_read_config_dword(pdev, 0x40, &control); 53 if ((control & port_mask) == 0) 54 return -ENOENT; 55 56 /* There are two basic mappings. One has the two SATA ports merged 57 as master/slave and the secondary as PATA, the other has only the 58 SATA port mapped */ 59 if (control & (1 << 23)) { 60 port_map[0] = PORT_SATA; 61 port_map[1] = PORT_PATA0; 62 } else { 63 port_map[0] = PORT_SATA; 64 port_map[1] = PORT_SATA; 65 } 66 67 /* The 365/366 may have this bit set to map the second PATA port 68 as the internal primary channel */ 69 pci_read_config_dword(pdev, 0x80, &control5); 70 if (control5 & (1<<24)) 71 port_map[0] = PORT_PATA1; 72 73 /* The two ports may then be logically swapped by the firmware */ 74 if (control & (1 << 22)) 75 port = port ^ 1; 76 77 /* 78 * Now we know which physical port we are talking about we can 79 * actually do our cable checking etc. Thankfully we don't need 80 * to do the plumbing for other cases. 81 */ 82 switch (port_map[port]) 83 { 84 case PORT_PATA0: 85 if (control & (1 << 5)) 86 return 0; 87 if (control & (1 << 3)) /* 40/80 pin primary */ 88 ap->cbl = ATA_CBL_PATA40; 89 else 90 ap->cbl = ATA_CBL_PATA80; 91 break; 92 case PORT_PATA1: 93 /* Bit 21 is set if the port is enabled */ 94 if ((control5 & (1 << 21)) == 0) 95 return 0; 96 if (control5 & (1 << 19)) /* 40/80 pin secondary */ 97 ap->cbl = ATA_CBL_PATA40; 98 else 99 ap->cbl = ATA_CBL_PATA80; 100 break; 101 case PORT_SATA: 102 ap->cbl = ATA_CBL_SATA; 103 break; 104 } 105 return ata_std_prereset(ap); 106} 107 108/** 109 * jmicron_error_handler - Setup and error handler 110 * @ap: Port to handle 111 * 112 * LOCKING: 113 * None (inherited from caller). 114 */ 115 116static void jmicron_error_handler(struct ata_port *ap) 117{ 118 return ata_bmdma_drive_eh(ap, jmicron_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 119} 120 121/* No PIO or DMA methods needed for this device */ 122 123static struct scsi_host_template jmicron_sht = { 124 .module = THIS_MODULE, 125 .name = DRV_NAME, 126 .ioctl = ata_scsi_ioctl, 127 .queuecommand = ata_scsi_queuecmd, 128 .can_queue = ATA_DEF_QUEUE, 129 .this_id = ATA_SHT_THIS_ID, 130 .sg_tablesize = LIBATA_MAX_PRD, 131 .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 132 .emulated = ATA_SHT_EMULATED, 133 .use_clustering = ATA_SHT_USE_CLUSTERING, 134 .proc_name = DRV_NAME, 135 .dma_boundary = ATA_DMA_BOUNDARY, 136 .slave_configure = ata_scsi_slave_config, 137 .slave_destroy = ata_scsi_slave_destroy, 138 /* Use standard CHS mapping rules */ 139 .bios_param = ata_std_bios_param, 140}; 141 142static const struct ata_port_operations jmicron_ops = { 143 .port_disable = ata_port_disable, 144 145 /* Task file is PCI ATA format, use helpers */ 146 .tf_load = ata_tf_load, 147 .tf_read = ata_tf_read, 148 .check_status = ata_check_status, 149 .exec_command = ata_exec_command, 150 .dev_select = ata_std_dev_select, 151 152 .freeze = ata_bmdma_freeze, 153 .thaw = ata_bmdma_thaw, 154 .error_handler = jmicron_error_handler, 155 .post_internal_cmd = ata_bmdma_post_internal_cmd, 156 157 /* BMDMA handling is PCI ATA format, use helpers */ 158 .bmdma_setup = ata_bmdma_setup, 159 .bmdma_start = ata_bmdma_start, 160 .bmdma_stop = ata_bmdma_stop, 161 .bmdma_status = ata_bmdma_status, 162 .qc_prep = ata_qc_prep, 163 .qc_issue = ata_qc_issue_prot, 164 .data_xfer = ata_pio_data_xfer, 165 166 /* IRQ-related hooks */ 167 .irq_handler = ata_interrupt, 168 .irq_clear = ata_bmdma_irq_clear, 169 170 /* Generic PATA PCI ATA helpers */ 171 .port_start = ata_port_start, 172 .port_stop = ata_port_stop, 173 .host_stop = ata_host_stop, 174}; 175 176 177/** 178 * jmicron_init_one - Register Jmicron ATA PCI device with kernel services 179 * @pdev: PCI device to register 180 * @ent: Entry in jmicron_pci_tbl matching with @pdev 181 * 182 * Called from kernel PCI layer. 183 * 184 * LOCKING: 185 * Inherited from PCI layer (may sleep). 186 * 187 * RETURNS: 188 * Zero on success, or -ERRNO value. 189 */ 190 191static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id) 192{ 193 static struct ata_port_info info = { 194 .sht = &jmicron_sht, 195 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 196 197 .pio_mask = 0x1f, 198 .mwdma_mask = 0x07, 199 .udma_mask = 0x3f, 200 201 .port_ops = &jmicron_ops, 202 }; 203 struct ata_port_info *port_info[2] = { &info, &info }; 204 205 u32 reg; 206 207 if (id->driver_data != 368) { 208 /* Put the controller into AHCI mode in case the AHCI driver 209 has not yet been loaded. This can be done with either 210 function present */ 211 212 /* FIXME: We may want a way to override this in future */ 213 pci_write_config_byte(pdev, 0x41, 0xa1); 214 215 /* PATA controller is fn 1, AHCI is fn 0 */ 216 if (PCI_FUNC(pdev->devfn) != 1) 217 return -ENODEV; 218 } 219 if ( id->driver_data == 365 || id->driver_data == 366) { 220 /* The 365/66 have two PATA channels, redirect the second */ 221 pci_read_config_dword(pdev, 0x80, &reg); 222 reg |= (1 << 24); /* IDE1 to PATA IDE secondary */ 223 pci_write_config_dword(pdev, 0x80, reg); 224 } 225 226 return ata_pci_init_one(pdev, port_info, 2); 227} 228 229static int jmicron_reinit_one(struct pci_dev *pdev) 230{ 231 u32 reg; 232 233 switch(pdev->device) { 234 case PCI_DEVICE_ID_JMICRON_JMB368: 235 break; 236 case PCI_DEVICE_ID_JMICRON_JMB365: 237 case PCI_DEVICE_ID_JMICRON_JMB366: 238 /* Restore mapping or disks swap and boy does it get ugly */ 239 pci_read_config_dword(pdev, 0x80, &reg); 240 reg |= (1 << 24); /* IDE1 to PATA IDE secondary */ 241 pci_write_config_dword(pdev, 0x80, reg); 242 /* Fall through */ 243 default: 244 /* Make sure AHCI is turned back on */ 245 pci_write_config_byte(pdev, 0x41, 0xa1); 246 } 247 return ata_pci_device_resume(pdev); 248} 249 250static const struct pci_device_id jmicron_pci_tbl[] = { 251 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB361), 361}, 252 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB363), 363}, 253 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB365), 365}, 254 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB366), 366}, 255 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB368), 368}, 256 257 { } /* terminate list */ 258}; 259 260static struct pci_driver jmicron_pci_driver = { 261 .name = DRV_NAME, 262 .id_table = jmicron_pci_tbl, 263 .probe = jmicron_init_one, 264 .remove = ata_pci_remove_one, 265 .suspend = ata_pci_device_suspend, 266 .resume = jmicron_reinit_one, 267}; 268 269static int __init jmicron_init(void) 270{ 271 return pci_register_driver(&jmicron_pci_driver); 272} 273 274static void __exit jmicron_exit(void) 275{ 276 pci_unregister_driver(&jmicron_pci_driver); 277} 278 279module_init(jmicron_init); 280module_exit(jmicron_exit); 281 282MODULE_AUTHOR("Alan Cox"); 283MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports"); 284MODULE_LICENSE("GPL"); 285MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl); 286MODULE_VERSION(DRV_VERSION); 287