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1/* 2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, 5 Philip Edelbrock <phil@netroedge.com>, 6 and Mark Studebaker <mdsxyz123@yahoo.com> 7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org> 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; if not, write to the Free Software 21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22*/ 23 24/* 25 Supports following chips: 26 27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 28 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) 29 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) 30 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) 31 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) 32 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC) 33 34 For other winbond chips, and for i2c support in the above chips, 35 use w83781d.c. 36 37 Note: automatic ("cruise") fan control for 697, 637 & 627thf not 38 supported yet. 39*/ 40 41#include <linux/module.h> 42#include <linux/init.h> 43#include <linux/slab.h> 44#include <linux/jiffies.h> 45#include <linux/i2c.h> 46#include <linux/i2c-isa.h> 47#include <linux/hwmon.h> 48#include <linux/hwmon-vid.h> 49#include <linux/err.h> 50#include <linux/mutex.h> 51#include <asm/io.h> 52#include "lm75.h" 53 54static u16 force_addr; 55module_param(force_addr, ushort, 0); 56MODULE_PARM_DESC(force_addr, 57 "Initialize the base address of the sensors"); 58static u8 force_i2c = 0x1f; 59module_param(force_i2c, byte, 0); 60MODULE_PARM_DESC(force_i2c, 61 "Initialize the i2c address of the sensors"); 62 63/* The actual ISA address is read from Super-I/O configuration space */ 64static unsigned short address; 65 66/* Insmod parameters */ 67enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; 68 69static int reset; 70module_param(reset, bool, 0); 71MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); 72 73static int init = 1; 74module_param(init, bool, 0); 75MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 76 77/* modified from kernel/include/traps.c */ 78static int REG; /* The register to read/write */ 79#define DEV 0x07 /* Register: Logical device select */ 80static int VAL; /* The value to read/write */ 81 82/* logical device numbers for superio_select (below) */ 83#define W83627HF_LD_FDC 0x00 84#define W83627HF_LD_PRT 0x01 85#define W83627HF_LD_UART1 0x02 86#define W83627HF_LD_UART2 0x03 87#define W83627HF_LD_KBC 0x05 88#define W83627HF_LD_CIR 0x06 /* w83627hf only */ 89#define W83627HF_LD_GAME 0x07 90#define W83627HF_LD_MIDI 0x07 91#define W83627HF_LD_GPIO1 0x07 92#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */ 93#define W83627HF_LD_GPIO2 0x08 94#define W83627HF_LD_GPIO3 0x09 95#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */ 96#define W83627HF_LD_ACPI 0x0a 97#define W83627HF_LD_HWM 0x0b 98 99#define DEVID 0x20 /* Register: Device ID */ 100 101#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */ 102#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */ 103#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */ 104 105#define W83687THF_VID_EN 0x29 /* w83687thf only */ 106#define W83687THF_VID_CFG 0xF0 /* w83687thf only */ 107#define W83687THF_VID_DATA 0xF1 /* w83687thf only */ 108 109static inline void 110superio_outb(int reg, int val) 111{ 112 outb(reg, REG); 113 outb(val, VAL); 114} 115 116static inline int 117superio_inb(int reg) 118{ 119 outb(reg, REG); 120 return inb(VAL); 121} 122 123static inline void 124superio_select(int ld) 125{ 126 outb(DEV, REG); 127 outb(ld, VAL); 128} 129 130static inline void 131superio_enter(void) 132{ 133 outb(0x87, REG); 134 outb(0x87, REG); 135} 136 137static inline void 138superio_exit(void) 139{ 140 outb(0xAA, REG); 141} 142 143#define W627_DEVID 0x52 144#define W627THF_DEVID 0x82 145#define W697_DEVID 0x60 146#define W637_DEVID 0x70 147#define W687THF_DEVID 0x85 148#define WINB_ACT_REG 0x30 149#define WINB_BASE_REG 0x60 150/* Constants specified below */ 151 152/* Alignment of the base address */ 153#define WINB_ALIGNMENT ~7 154 155/* Offset & size of I/O region we are interested in */ 156#define WINB_REGION_OFFSET 5 157#define WINB_REGION_SIZE 2 158 159/* Where are the sensors address/data registers relative to the base address */ 160#define W83781D_ADDR_REG_OFFSET 5 161#define W83781D_DATA_REG_OFFSET 6 162 163/* The W83781D registers */ 164/* The W83782D registers for nr=7,8 are in bank 5 */ 165#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 166 (0x554 + (((nr) - 7) * 2))) 167#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 168 (0x555 + (((nr) - 7) * 2))) 169#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 170 (0x550 + (nr) - 7)) 171 172#define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) 173#define W83781D_REG_FAN(nr) (0x27 + (nr)) 174 175#define W83781D_REG_TEMP2_CONFIG 0x152 176#define W83781D_REG_TEMP3_CONFIG 0x252 177#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ 178 ((nr == 2) ? (0x0150) : \ 179 (0x27))) 180#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ 181 ((nr == 2) ? (0x153) : \ 182 (0x3A))) 183#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ 184 ((nr == 2) ? (0x155) : \ 185 (0x39))) 186 187#define W83781D_REG_BANK 0x4E 188 189#define W83781D_REG_CONFIG 0x40 190#define W83781D_REG_ALARM1 0x459 191#define W83781D_REG_ALARM2 0x45A 192#define W83781D_REG_ALARM3 0x45B 193 194#define W83781D_REG_BEEP_CONFIG 0x4D 195#define W83781D_REG_BEEP_INTS1 0x56 196#define W83781D_REG_BEEP_INTS2 0x57 197#define W83781D_REG_BEEP_INTS3 0x453 198 199#define W83781D_REG_VID_FANDIV 0x47 200 201#define W83781D_REG_CHIPID 0x49 202#define W83781D_REG_WCHIPID 0x58 203#define W83781D_REG_CHIPMAN 0x4F 204#define W83781D_REG_PIN 0x4B 205 206#define W83781D_REG_VBAT 0x5D 207 208#define W83627HF_REG_PWM1 0x5A 209#define W83627HF_REG_PWM2 0x5B 210 211#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */ 212#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */ 213#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */ 214 215#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */ 216 217static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 }; 218static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2, 219 W83627THF_REG_PWM3 }; 220#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ 221 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1]) 222 223#define W83781D_REG_I2C_ADDR 0x48 224#define W83781D_REG_I2C_SUBADDR 0x4A 225 226/* Sensor selection */ 227#define W83781D_REG_SCFG1 0x5D 228static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 229#define W83781D_REG_SCFG2 0x59 230static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 231#define W83781D_DEFAULT_BETA 3435 232 233/* Conversions. Limit checking is only done on the TO_REG 234 variants. Note that you should be a bit careful with which arguments 235 these macros are called: arguments may be evaluated more than once. 236 Fixing this is just not worth it. */ 237#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255)) 238#define IN_FROM_REG(val) ((val) * 16) 239 240static inline u8 FAN_TO_REG(long rpm, int div) 241{ 242 if (rpm == 0) 243 return 255; 244 rpm = SENSORS_LIMIT(rpm, 1, 1000000); 245 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 246 254); 247} 248 249#define TEMP_MIN (-128000) 250#define TEMP_MAX ( 127000) 251 252/* TEMP: 0.001C/bit (-128C to +127C) 253 REG: 1C/bit, two's complement */ 254static u8 TEMP_TO_REG(int temp) 255{ 256 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX); 257 ntemp += (ntemp<0 ? -500 : 500); 258 return (u8)(ntemp / 1000); 259} 260 261static int TEMP_FROM_REG(u8 reg) 262{ 263 return (s8)reg * 1000; 264} 265 266#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) 267 268#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) 269 270#define BEEP_MASK_FROM_REG(val) (val) 271#define BEEP_MASK_TO_REG(val) ((val) & 0xffffff) 272#define BEEP_ENABLE_TO_REG(val) ((val)?1:0) 273#define BEEP_ENABLE_FROM_REG(val) ((val)?1:0) 274 275#define DIV_FROM_REG(val) (1 << (val)) 276 277static inline u8 DIV_TO_REG(long val) 278{ 279 int i; 280 val = SENSORS_LIMIT(val, 1, 128) >> 1; 281 for (i = 0; i < 7; i++) { 282 if (val == 0) 283 break; 284 val >>= 1; 285 } 286 return ((u8) i); 287} 288 289/* For each registered chip, we need to keep some data in memory. That 290 data is pointed to by w83627hf_list[NR]->data. The structure itself is 291 dynamically allocated, at the same time when a new client is allocated. */ 292struct w83627hf_data { 293 struct i2c_client client; 294 struct class_device *class_dev; 295 struct mutex lock; 296 enum chips type; 297 298 struct mutex update_lock; 299 char valid; /* !=0 if following fields are valid */ 300 unsigned long last_updated; /* In jiffies */ 301 302 struct i2c_client *lm75; /* for secondary I2C addresses */ 303 /* pointer to array of 2 subclients */ 304 305 u8 in[9]; /* Register value */ 306 u8 in_max[9]; /* Register value */ 307 u8 in_min[9]; /* Register value */ 308 u8 fan[3]; /* Register value */ 309 u8 fan_min[3]; /* Register value */ 310 u8 temp; 311 u8 temp_max; /* Register value */ 312 u8 temp_max_hyst; /* Register value */ 313 u16 temp_add[2]; /* Register value */ 314 u16 temp_max_add[2]; /* Register value */ 315 u16 temp_max_hyst_add[2]; /* Register value */ 316 u8 fan_div[3]; /* Register encoding, shifted right */ 317 u8 vid; /* Register encoding, combined */ 318 u32 alarms; /* Register encoding, combined */ 319 u32 beep_mask; /* Register encoding, combined */ 320 u8 beep_enable; /* Boolean */ 321 u8 pwm[3]; /* Register value */ 322 u16 sens[3]; /* 782D/783S only. 323 1 = pentium diode; 2 = 3904 diode; 324 3000-5000 = thermistor beta. 325 Default = 3435. 326 Other Betas unimplemented */ 327 u8 vrm; 328 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ 329}; 330 331 332static int w83627hf_detect(struct i2c_adapter *adapter); 333static int w83627hf_detach_client(struct i2c_client *client); 334 335static int w83627hf_read_value(struct i2c_client *client, u16 reg); 336static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value); 337static struct w83627hf_data *w83627hf_update_device(struct device *dev); 338static void w83627hf_init_client(struct i2c_client *client); 339 340static struct i2c_driver w83627hf_driver = { 341 .driver = { 342 .owner = THIS_MODULE, 343 .name = "w83627hf", 344 }, 345 .attach_adapter = w83627hf_detect, 346 .detach_client = w83627hf_detach_client, 347}; 348 349/* following are the sysfs callback functions */ 350#define show_in_reg(reg) \ 351static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 352{ \ 353 struct w83627hf_data *data = w83627hf_update_device(dev); \ 354 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \ 355} 356show_in_reg(in) 357show_in_reg(in_min) 358show_in_reg(in_max) 359 360#define store_in_reg(REG, reg) \ 361static ssize_t \ 362store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ 363{ \ 364 struct i2c_client *client = to_i2c_client(dev); \ 365 struct w83627hf_data *data = i2c_get_clientdata(client); \ 366 u32 val; \ 367 \ 368 val = simple_strtoul(buf, NULL, 10); \ 369 \ 370 mutex_lock(&data->update_lock); \ 371 data->in_##reg[nr] = IN_TO_REG(val); \ 372 w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \ 373 data->in_##reg[nr]); \ 374 \ 375 mutex_unlock(&data->update_lock); \ 376 return count; \ 377} 378store_in_reg(MIN, min) 379store_in_reg(MAX, max) 380 381#define sysfs_in_offset(offset) \ 382static ssize_t \ 383show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 384{ \ 385 return show_in(dev, buf, offset); \ 386} \ 387static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); 388 389#define sysfs_in_reg_offset(reg, offset) \ 390static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 391{ \ 392 return show_in_##reg (dev, buf, offset); \ 393} \ 394static ssize_t \ 395store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \ 396 const char *buf, size_t count) \ 397{ \ 398 return store_in_##reg (dev, buf, count, offset); \ 399} \ 400static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \ 401 show_regs_in_##reg##offset, store_regs_in_##reg##offset); 402 403#define sysfs_in_offsets(offset) \ 404sysfs_in_offset(offset) \ 405sysfs_in_reg_offset(min, offset) \ 406sysfs_in_reg_offset(max, offset) 407 408sysfs_in_offsets(1); 409sysfs_in_offsets(2); 410sysfs_in_offsets(3); 411sysfs_in_offsets(4); 412sysfs_in_offsets(5); 413sysfs_in_offsets(6); 414sysfs_in_offsets(7); 415sysfs_in_offsets(8); 416 417/* use a different set of functions for in0 */ 418static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg) 419{ 420 long in0; 421 422 if ((data->vrm_ovt & 0x01) && 423 (w83627thf == data->type || w83637hf == data->type 424 || w83687thf == data->type)) 425 426 /* use VRM9 calculation */ 427 in0 = (long)((reg * 488 + 70000 + 50) / 100); 428 else 429 /* use VRM8 (standard) calculation */ 430 in0 = (long)IN_FROM_REG(reg); 431 432 return sprintf(buf,"%ld\n", in0); 433} 434 435static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf) 436{ 437 struct w83627hf_data *data = w83627hf_update_device(dev); 438 return show_in_0(data, buf, data->in[0]); 439} 440 441static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf) 442{ 443 struct w83627hf_data *data = w83627hf_update_device(dev); 444 return show_in_0(data, buf, data->in_min[0]); 445} 446 447static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf) 448{ 449 struct w83627hf_data *data = w83627hf_update_device(dev); 450 return show_in_0(data, buf, data->in_max[0]); 451} 452 453static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr, 454 const char *buf, size_t count) 455{ 456 struct i2c_client *client = to_i2c_client(dev); 457 struct w83627hf_data *data = i2c_get_clientdata(client); 458 u32 val; 459 460 val = simple_strtoul(buf, NULL, 10); 461 462 mutex_lock(&data->update_lock); 463 464 if ((data->vrm_ovt & 0x01) && 465 (w83627thf == data->type || w83637hf == data->type 466 || w83687thf == data->type)) 467 468 /* use VRM9 calculation */ 469 data->in_min[0] = 470 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, 471 255); 472 else 473 /* use VRM8 (standard) calculation */ 474 data->in_min[0] = IN_TO_REG(val); 475 476 w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]); 477 mutex_unlock(&data->update_lock); 478 return count; 479} 480 481static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr, 482 const char *buf, size_t count) 483{ 484 struct i2c_client *client = to_i2c_client(dev); 485 struct w83627hf_data *data = i2c_get_clientdata(client); 486 u32 val; 487 488 val = simple_strtoul(buf, NULL, 10); 489 490 mutex_lock(&data->update_lock); 491 492 if ((data->vrm_ovt & 0x01) && 493 (w83627thf == data->type || w83637hf == data->type 494 || w83687thf == data->type)) 495 496 /* use VRM9 calculation */ 497 data->in_max[0] = 498 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, 499 255); 500 else 501 /* use VRM8 (standard) calculation */ 502 data->in_max[0] = IN_TO_REG(val); 503 504 w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]); 505 mutex_unlock(&data->update_lock); 506 return count; 507} 508 509static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL); 510static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, 511 show_regs_in_min0, store_regs_in_min0); 512static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, 513 show_regs_in_max0, store_regs_in_max0); 514 515#define show_fan_reg(reg) \ 516static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 517{ \ 518 struct w83627hf_data *data = w83627hf_update_device(dev); \ 519 return sprintf(buf,"%ld\n", \ 520 FAN_FROM_REG(data->reg[nr-1], \ 521 (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ 522} 523show_fan_reg(fan); 524show_fan_reg(fan_min); 525 526static ssize_t 527store_fan_min(struct device *dev, const char *buf, size_t count, int nr) 528{ 529 struct i2c_client *client = to_i2c_client(dev); 530 struct w83627hf_data *data = i2c_get_clientdata(client); 531 u32 val; 532 533 val = simple_strtoul(buf, NULL, 10); 534 535 mutex_lock(&data->update_lock); 536 data->fan_min[nr - 1] = 537 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); 538 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr), 539 data->fan_min[nr - 1]); 540 541 mutex_unlock(&data->update_lock); 542 return count; 543} 544 545#define sysfs_fan_offset(offset) \ 546static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 547{ \ 548 return show_fan(dev, buf, offset); \ 549} \ 550static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); 551 552#define sysfs_fan_min_offset(offset) \ 553static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 554{ \ 555 return show_fan_min(dev, buf, offset); \ 556} \ 557static ssize_t \ 558store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 559{ \ 560 return store_fan_min(dev, buf, count, offset); \ 561} \ 562static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \ 563 show_regs_fan_min##offset, store_regs_fan_min##offset); 564 565sysfs_fan_offset(1); 566sysfs_fan_min_offset(1); 567sysfs_fan_offset(2); 568sysfs_fan_min_offset(2); 569sysfs_fan_offset(3); 570sysfs_fan_min_offset(3); 571 572#define show_temp_reg(reg) \ 573static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 574{ \ 575 struct w83627hf_data *data = w83627hf_update_device(dev); \ 576 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 577 return sprintf(buf,"%ld\n", \ 578 (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ 579 } else { /* TEMP1 */ \ 580 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ 581 } \ 582} 583show_temp_reg(temp); 584show_temp_reg(temp_max); 585show_temp_reg(temp_max_hyst); 586 587#define store_temp_reg(REG, reg) \ 588static ssize_t \ 589store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ 590{ \ 591 struct i2c_client *client = to_i2c_client(dev); \ 592 struct w83627hf_data *data = i2c_get_clientdata(client); \ 593 u32 val; \ 594 \ 595 val = simple_strtoul(buf, NULL, 10); \ 596 \ 597 mutex_lock(&data->update_lock); \ 598 \ 599 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 600 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ 601 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \ 602 data->temp_##reg##_add[nr-2]); \ 603 } else { /* TEMP1 */ \ 604 data->temp_##reg = TEMP_TO_REG(val); \ 605 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \ 606 data->temp_##reg); \ 607 } \ 608 \ 609 mutex_unlock(&data->update_lock); \ 610 return count; \ 611} 612store_temp_reg(OVER, max); 613store_temp_reg(HYST, max_hyst); 614 615#define sysfs_temp_offset(offset) \ 616static ssize_t \ 617show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 618{ \ 619 return show_temp(dev, buf, offset); \ 620} \ 621static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); 622 623#define sysfs_temp_reg_offset(reg, offset) \ 624static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 625{ \ 626 return show_temp_##reg (dev, buf, offset); \ 627} \ 628static ssize_t \ 629store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \ 630 const char *buf, size_t count) \ 631{ \ 632 return store_temp_##reg (dev, buf, count, offset); \ 633} \ 634static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \ 635 show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); 636 637#define sysfs_temp_offsets(offset) \ 638sysfs_temp_offset(offset) \ 639sysfs_temp_reg_offset(max, offset) \ 640sysfs_temp_reg_offset(max_hyst, offset) 641 642sysfs_temp_offsets(1); 643sysfs_temp_offsets(2); 644sysfs_temp_offsets(3); 645 646static ssize_t 647show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) 648{ 649 struct w83627hf_data *data = w83627hf_update_device(dev); 650 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 651} 652static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 653 654static ssize_t 655show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) 656{ 657 struct w83627hf_data *data = w83627hf_update_device(dev); 658 return sprintf(buf, "%ld\n", (long) data->vrm); 659} 660static ssize_t 661store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 662{ 663 struct i2c_client *client = to_i2c_client(dev); 664 struct w83627hf_data *data = i2c_get_clientdata(client); 665 u32 val; 666 667 val = simple_strtoul(buf, NULL, 10); 668 data->vrm = val; 669 670 return count; 671} 672static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 673 674static ssize_t 675show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) 676{ 677 struct w83627hf_data *data = w83627hf_update_device(dev); 678 return sprintf(buf, "%ld\n", (long) data->alarms); 679} 680static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); 681 682#define show_beep_reg(REG, reg) \ 683static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ 684{ \ 685 struct w83627hf_data *data = w83627hf_update_device(dev); \ 686 return sprintf(buf,"%ld\n", \ 687 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \ 688} 689show_beep_reg(ENABLE, enable) 690show_beep_reg(MASK, mask) 691 692#define BEEP_ENABLE 0 /* Store beep_enable */ 693#define BEEP_MASK 1 /* Store beep_mask */ 694 695static ssize_t 696store_beep_reg(struct device *dev, const char *buf, size_t count, 697 int update_mask) 698{ 699 struct i2c_client *client = to_i2c_client(dev); 700 struct w83627hf_data *data = i2c_get_clientdata(client); 701 u32 val, val2; 702 703 val = simple_strtoul(buf, NULL, 10); 704 705 mutex_lock(&data->update_lock); 706 707 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ 708 data->beep_mask = BEEP_MASK_TO_REG(val); 709 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1, 710 data->beep_mask & 0xff); 711 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3, 712 ((data->beep_mask) >> 16) & 0xff); 713 val2 = (data->beep_mask >> 8) & 0x7f; 714 } else { /* We are storing beep_enable */ 715 val2 = 716 w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; 717 data->beep_enable = BEEP_ENABLE_TO_REG(val); 718 } 719 720 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 721 val2 | data->beep_enable << 7); 722 723 mutex_unlock(&data->update_lock); 724 return count; 725} 726 727#define sysfs_beep(REG, reg) \ 728static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ 729{ \ 730 return show_beep_##reg(dev, attr, buf); \ 731} \ 732static ssize_t \ 733store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 734{ \ 735 return store_beep_reg(dev, buf, count, BEEP_##REG); \ 736} \ 737static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \ 738 show_regs_beep_##reg, store_regs_beep_##reg); 739 740sysfs_beep(ENABLE, enable); 741sysfs_beep(MASK, mask); 742 743static ssize_t 744show_fan_div_reg(struct device *dev, char *buf, int nr) 745{ 746 struct w83627hf_data *data = w83627hf_update_device(dev); 747 return sprintf(buf, "%ld\n", 748 (long) DIV_FROM_REG(data->fan_div[nr - 1])); 749} 750 751/* Note: we save and restore the fan minimum here, because its value is 752 determined in part by the fan divisor. This follows the principle of 753 least surprise; the user doesn't expect the fan minimum to change just 754 because the divisor changed. */ 755static ssize_t 756store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) 757{ 758 struct i2c_client *client = to_i2c_client(dev); 759 struct w83627hf_data *data = i2c_get_clientdata(client); 760 unsigned long min; 761 u8 reg; 762 unsigned long val = simple_strtoul(buf, NULL, 10); 763 764 mutex_lock(&data->update_lock); 765 766 /* Save fan_min */ 767 min = FAN_FROM_REG(data->fan_min[nr], 768 DIV_FROM_REG(data->fan_div[nr])); 769 770 data->fan_div[nr] = DIV_TO_REG(val); 771 772 reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 773 & (nr==0 ? 0xcf : 0x3f)) 774 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); 775 w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 776 777 reg = (w83627hf_read_value(client, W83781D_REG_VBAT) 778 & ~(1 << (5 + nr))) 779 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 780 w83627hf_write_value(client, W83781D_REG_VBAT, reg); 781 782 /* Restore fan_min */ 783 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 784 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); 785 786 mutex_unlock(&data->update_lock); 787 return count; 788} 789 790#define sysfs_fan_div(offset) \ 791static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 792{ \ 793 return show_fan_div_reg(dev, buf, offset); \ 794} \ 795static ssize_t \ 796store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \ 797 const char *buf, size_t count) \ 798{ \ 799 return store_fan_div_reg(dev, buf, count, offset - 1); \ 800} \ 801static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \ 802 show_regs_fan_div_##offset, store_regs_fan_div_##offset); 803 804sysfs_fan_div(1); 805sysfs_fan_div(2); 806sysfs_fan_div(3); 807 808static ssize_t 809show_pwm_reg(struct device *dev, char *buf, int nr) 810{ 811 struct w83627hf_data *data = w83627hf_update_device(dev); 812 return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]); 813} 814 815static ssize_t 816store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) 817{ 818 struct i2c_client *client = to_i2c_client(dev); 819 struct w83627hf_data *data = i2c_get_clientdata(client); 820 u32 val; 821 822 val = simple_strtoul(buf, NULL, 10); 823 824 mutex_lock(&data->update_lock); 825 826 if (data->type == w83627thf) { 827 /* bits 0-3 are reserved in 627THF */ 828 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0; 829 w83627hf_write_value(client, 830 W836X7HF_REG_PWM(data->type, nr), 831 data->pwm[nr - 1] | 832 (w83627hf_read_value(client, 833 W836X7HF_REG_PWM(data->type, nr)) & 0x0f)); 834 } else { 835 data->pwm[nr - 1] = PWM_TO_REG(val); 836 w83627hf_write_value(client, 837 W836X7HF_REG_PWM(data->type, nr), 838 data->pwm[nr - 1]); 839 } 840 841 mutex_unlock(&data->update_lock); 842 return count; 843} 844 845#define sysfs_pwm(offset) \ 846static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 847{ \ 848 return show_pwm_reg(dev, buf, offset); \ 849} \ 850static ssize_t \ 851store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 852{ \ 853 return store_pwm_reg(dev, buf, count, offset); \ 854} \ 855static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ 856 show_regs_pwm_##offset, store_regs_pwm_##offset); 857 858sysfs_pwm(1); 859sysfs_pwm(2); 860sysfs_pwm(3); 861 862static ssize_t 863show_sensor_reg(struct device *dev, char *buf, int nr) 864{ 865 struct w83627hf_data *data = w83627hf_update_device(dev); 866 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); 867} 868 869static ssize_t 870store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) 871{ 872 struct i2c_client *client = to_i2c_client(dev); 873 struct w83627hf_data *data = i2c_get_clientdata(client); 874 u32 val, tmp; 875 876 val = simple_strtoul(buf, NULL, 10); 877 878 mutex_lock(&data->update_lock); 879 880 switch (val) { 881 case 1: /* PII/Celeron diode */ 882 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); 883 w83627hf_write_value(client, W83781D_REG_SCFG1, 884 tmp | BIT_SCFG1[nr - 1]); 885 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2); 886 w83627hf_write_value(client, W83781D_REG_SCFG2, 887 tmp | BIT_SCFG2[nr - 1]); 888 data->sens[nr - 1] = val; 889 break; 890 case 2: /* 3904 */ 891 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); 892 w83627hf_write_value(client, W83781D_REG_SCFG1, 893 tmp | BIT_SCFG1[nr - 1]); 894 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2); 895 w83627hf_write_value(client, W83781D_REG_SCFG2, 896 tmp & ~BIT_SCFG2[nr - 1]); 897 data->sens[nr - 1] = val; 898 break; 899 case W83781D_DEFAULT_BETA: /* thermistor */ 900 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); 901 w83627hf_write_value(client, W83781D_REG_SCFG1, 902 tmp & ~BIT_SCFG1[nr - 1]); 903 data->sens[nr - 1] = val; 904 break; 905 default: 906 dev_err(&client->dev, 907 "Invalid sensor type %ld; must be 1, 2, or %d\n", 908 (long) val, W83781D_DEFAULT_BETA); 909 break; 910 } 911 912 mutex_unlock(&data->update_lock); 913 return count; 914} 915 916#define sysfs_sensor(offset) \ 917static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 918{ \ 919 return show_sensor_reg(dev, buf, offset); \ 920} \ 921static ssize_t \ 922store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 923{ \ 924 return store_sensor_reg(dev, buf, count, offset); \ 925} \ 926static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \ 927 show_regs_sensor_##offset, store_regs_sensor_##offset); 928 929sysfs_sensor(1); 930sysfs_sensor(2); 931sysfs_sensor(3); 932 933static int __init w83627hf_find(int sioaddr, unsigned short *addr) 934{ 935 u16 val; 936 937 REG = sioaddr; 938 VAL = sioaddr + 1; 939 940 superio_enter(); 941 val= superio_inb(DEVID); 942 if(val != W627_DEVID && 943 val != W627THF_DEVID && 944 val != W697_DEVID && 945 val != W637_DEVID && 946 val != W687THF_DEVID) { 947 superio_exit(); 948 return -ENODEV; 949 } 950 951 superio_select(W83627HF_LD_HWM); 952 val = (superio_inb(WINB_BASE_REG) << 8) | 953 superio_inb(WINB_BASE_REG + 1); 954 *addr = val & WINB_ALIGNMENT; 955 if (*addr == 0 && force_addr == 0) { 956 superio_exit(); 957 return -ENODEV; 958 } 959 960 superio_exit(); 961 return 0; 962} 963 964static struct attribute *w83627hf_attributes[] = { 965 &dev_attr_in0_input.attr, 966 &dev_attr_in0_min.attr, 967 &dev_attr_in0_max.attr, 968 &dev_attr_in2_input.attr, 969 &dev_attr_in2_min.attr, 970 &dev_attr_in2_max.attr, 971 &dev_attr_in3_input.attr, 972 &dev_attr_in3_min.attr, 973 &dev_attr_in3_max.attr, 974 &dev_attr_in4_input.attr, 975 &dev_attr_in4_min.attr, 976 &dev_attr_in4_max.attr, 977 &dev_attr_in7_input.attr, 978 &dev_attr_in7_min.attr, 979 &dev_attr_in7_max.attr, 980 &dev_attr_in8_input.attr, 981 &dev_attr_in8_min.attr, 982 &dev_attr_in8_max.attr, 983 984 &dev_attr_fan1_input.attr, 985 &dev_attr_fan1_min.attr, 986 &dev_attr_fan1_div.attr, 987 &dev_attr_fan2_input.attr, 988 &dev_attr_fan2_min.attr, 989 &dev_attr_fan2_div.attr, 990 991 &dev_attr_temp1_input.attr, 992 &dev_attr_temp1_max.attr, 993 &dev_attr_temp1_max_hyst.attr, 994 &dev_attr_temp1_type.attr, 995 &dev_attr_temp2_input.attr, 996 &dev_attr_temp2_max.attr, 997 &dev_attr_temp2_max_hyst.attr, 998 &dev_attr_temp2_type.attr, 999 1000 &dev_attr_alarms.attr, 1001 &dev_attr_beep_enable.attr, 1002 &dev_attr_beep_mask.attr, 1003 1004 &dev_attr_pwm1.attr, 1005 &dev_attr_pwm2.attr, 1006 1007 NULL 1008}; 1009 1010static const struct attribute_group w83627hf_group = { 1011 .attrs = w83627hf_attributes, 1012}; 1013 1014static struct attribute *w83627hf_attributes_opt[] = { 1015 &dev_attr_in1_input.attr, 1016 &dev_attr_in1_min.attr, 1017 &dev_attr_in1_max.attr, 1018 &dev_attr_in5_input.attr, 1019 &dev_attr_in5_min.attr, 1020 &dev_attr_in5_max.attr, 1021 &dev_attr_in6_input.attr, 1022 &dev_attr_in6_min.attr, 1023 &dev_attr_in6_max.attr, 1024 1025 &dev_attr_fan3_input.attr, 1026 &dev_attr_fan3_min.attr, 1027 &dev_attr_fan3_div.attr, 1028 1029 &dev_attr_temp3_input.attr, 1030 &dev_attr_temp3_max.attr, 1031 &dev_attr_temp3_max_hyst.attr, 1032 &dev_attr_temp3_type.attr, 1033 1034 &dev_attr_pwm3.attr, 1035 1036 NULL 1037}; 1038 1039static const struct attribute_group w83627hf_group_opt = { 1040 .attrs = w83627hf_attributes_opt, 1041}; 1042 1043static int w83627hf_detect(struct i2c_adapter *adapter) 1044{ 1045 int val, kind; 1046 struct i2c_client *new_client; 1047 struct w83627hf_data *data; 1048 int err = 0; 1049 const char *client_name = ""; 1050 1051 if(force_addr) 1052 address = force_addr & WINB_ALIGNMENT; 1053 1054 if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE, 1055 w83627hf_driver.driver.name)) { 1056 err = -EBUSY; 1057 goto ERROR0; 1058 } 1059 1060 if(force_addr) { 1061 printk("w83627hf.o: forcing ISA address 0x%04X\n", address); 1062 superio_enter(); 1063 superio_select(W83627HF_LD_HWM); 1064 superio_outb(WINB_BASE_REG, address >> 8); 1065 superio_outb(WINB_BASE_REG+1, address & 0xff); 1066 superio_exit(); 1067 } 1068 1069 superio_enter(); 1070 val= superio_inb(DEVID); 1071 if(val == W627_DEVID) 1072 kind = w83627hf; 1073 else if(val == W697_DEVID) 1074 kind = w83697hf; 1075 else if(val == W627THF_DEVID) 1076 kind = w83627thf; 1077 else if(val == W637_DEVID) 1078 kind = w83637hf; 1079 else if (val == W687THF_DEVID) 1080 kind = w83687thf; 1081 else { 1082 dev_info(&adapter->dev, 1083 "Unsupported chip (dev_id=0x%02X).\n", val); 1084 goto ERROR1; 1085 } 1086 1087 superio_select(W83627HF_LD_HWM); 1088 if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0) 1089 superio_outb(WINB_ACT_REG, 1); 1090 superio_exit(); 1091 1092 /* OK. For now, we presume we have a valid client. We now create the 1093 client structure, even though we cannot fill it completely yet. 1094 But it allows us to access w83627hf_{read,write}_value. */ 1095 1096 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) { 1097 err = -ENOMEM; 1098 goto ERROR1; 1099 } 1100 1101 new_client = &data->client; 1102 i2c_set_clientdata(new_client, data); 1103 new_client->addr = address; 1104 mutex_init(&data->lock); 1105 new_client->adapter = adapter; 1106 new_client->driver = &w83627hf_driver; 1107 new_client->flags = 0; 1108 1109 1110 if (kind == w83627hf) { 1111 client_name = "w83627hf"; 1112 } else if (kind == w83627thf) { 1113 client_name = "w83627thf"; 1114 } else if (kind == w83697hf) { 1115 client_name = "w83697hf"; 1116 } else if (kind == w83637hf) { 1117 client_name = "w83637hf"; 1118 } else if (kind == w83687thf) { 1119 client_name = "w83687thf"; 1120 } 1121 1122 /* Fill in the remaining client fields and put into the global list */ 1123 strlcpy(new_client->name, client_name, I2C_NAME_SIZE); 1124 data->type = kind; 1125 data->valid = 0; 1126 mutex_init(&data->update_lock); 1127 1128 /* Tell the I2C layer a new client has arrived */ 1129 if ((err = i2c_attach_client(new_client))) 1130 goto ERROR2; 1131 1132 data->lm75 = NULL; 1133 1134 /* Initialize the chip */ 1135 w83627hf_init_client(new_client); 1136 1137 /* A few vars need to be filled upon startup */ 1138 data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1)); 1139 data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2)); 1140 data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3)); 1141 1142 /* Register common device attributes */ 1143 if ((err = sysfs_create_group(&new_client->dev.kobj, &w83627hf_group))) 1144 goto ERROR3; 1145 1146 /* Register chip-specific device attributes */ 1147 if (kind == w83627hf || kind == w83697hf) 1148 if ((err = device_create_file(&new_client->dev, 1149 &dev_attr_in5_input)) 1150 || (err = device_create_file(&new_client->dev, 1151 &dev_attr_in5_min)) 1152 || (err = device_create_file(&new_client->dev, 1153 &dev_attr_in5_max)) 1154 || (err = device_create_file(&new_client->dev, 1155 &dev_attr_in6_input)) 1156 || (err = device_create_file(&new_client->dev, 1157 &dev_attr_in6_min)) 1158 || (err = device_create_file(&new_client->dev, 1159 &dev_attr_in6_max))) 1160 goto ERROR4; 1161 1162 if (kind != w83697hf) 1163 if ((err = device_create_file(&new_client->dev, 1164 &dev_attr_in1_input)) 1165 || (err = device_create_file(&new_client->dev, 1166 &dev_attr_in1_min)) 1167 || (err = device_create_file(&new_client->dev, 1168 &dev_attr_in1_max)) 1169 || (err = device_create_file(&new_client->dev, 1170 &dev_attr_fan3_input)) 1171 || (err = device_create_file(&new_client->dev, 1172 &dev_attr_fan3_min)) 1173 || (err = device_create_file(&new_client->dev, 1174 &dev_attr_fan3_div)) 1175 || (err = device_create_file(&new_client->dev, 1176 &dev_attr_temp3_input)) 1177 || (err = device_create_file(&new_client->dev, 1178 &dev_attr_temp3_max)) 1179 || (err = device_create_file(&new_client->dev, 1180 &dev_attr_temp3_max_hyst)) 1181 || (err = device_create_file(&new_client->dev, 1182 &dev_attr_temp3_type))) 1183 goto ERROR4; 1184 1185 if (kind != w83697hf && data->vid != 0xff) 1186 if ((err = device_create_file(&new_client->dev, 1187 &dev_attr_cpu0_vid)) 1188 || (err = device_create_file(&new_client->dev, 1189 &dev_attr_vrm))) 1190 goto ERROR4; 1191 1192 if (kind == w83627thf || kind == w83637hf || kind == w83687thf) 1193 if ((err = device_create_file(&new_client->dev, 1194 &dev_attr_pwm3))) 1195 goto ERROR4; 1196 1197 data->class_dev = hwmon_device_register(&new_client->dev); 1198 if (IS_ERR(data->class_dev)) { 1199 err = PTR_ERR(data->class_dev); 1200 goto ERROR4; 1201 } 1202 1203 return 0; 1204 1205 ERROR4: 1206 sysfs_remove_group(&new_client->dev.kobj, &w83627hf_group); 1207 sysfs_remove_group(&new_client->dev.kobj, &w83627hf_group_opt); 1208 ERROR3: 1209 i2c_detach_client(new_client); 1210 ERROR2: 1211 kfree(data); 1212 ERROR1: 1213 release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE); 1214 ERROR0: 1215 return err; 1216} 1217 1218static int w83627hf_detach_client(struct i2c_client *client) 1219{ 1220 struct w83627hf_data *data = i2c_get_clientdata(client); 1221 int err; 1222 1223 hwmon_device_unregister(data->class_dev); 1224 1225 sysfs_remove_group(&client->dev.kobj, &w83627hf_group); 1226 sysfs_remove_group(&client->dev.kobj, &w83627hf_group_opt); 1227 1228 if ((err = i2c_detach_client(client))) 1229 return err; 1230 1231 release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE); 1232 kfree(data); 1233 1234 return 0; 1235} 1236 1237 1238/* 1239 ISA access must always be locked explicitly! 1240 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, 1241 would slow down the W83781D access and should not be necessary. 1242 There are some ugly typecasts here, but the good news is - they should 1243 nowhere else be necessary! */ 1244static int w83627hf_read_value(struct i2c_client *client, u16 reg) 1245{ 1246 struct w83627hf_data *data = i2c_get_clientdata(client); 1247 int res, word_sized; 1248 1249 mutex_lock(&data->lock); 1250 word_sized = (((reg & 0xff00) == 0x100) 1251 || ((reg & 0xff00) == 0x200)) 1252 && (((reg & 0x00ff) == 0x50) 1253 || ((reg & 0x00ff) == 0x53) 1254 || ((reg & 0x00ff) == 0x55)); 1255 if (reg & 0xff00) { 1256 outb_p(W83781D_REG_BANK, 1257 client->addr + W83781D_ADDR_REG_OFFSET); 1258 outb_p(reg >> 8, 1259 client->addr + W83781D_DATA_REG_OFFSET); 1260 } 1261 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); 1262 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); 1263 if (word_sized) { 1264 outb_p((reg & 0xff) + 1, 1265 client->addr + W83781D_ADDR_REG_OFFSET); 1266 res = 1267 (res << 8) + inb_p(client->addr + 1268 W83781D_DATA_REG_OFFSET); 1269 } 1270 if (reg & 0xff00) { 1271 outb_p(W83781D_REG_BANK, 1272 client->addr + W83781D_ADDR_REG_OFFSET); 1273 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); 1274 } 1275 mutex_unlock(&data->lock); 1276 return res; 1277} 1278 1279static int w83627thf_read_gpio5(struct i2c_client *client) 1280{ 1281 int res = 0xff, sel; 1282 1283 superio_enter(); 1284 superio_select(W83627HF_LD_GPIO5); 1285 1286 /* Make sure these GPIO pins are enabled */ 1287 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) { 1288 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n"); 1289 goto exit; 1290 } 1291 1292 /* Make sure the pins are configured for input 1293 There must be at least five (VRM 9), and possibly 6 (VRM 10) */ 1294 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f; 1295 if ((sel & 0x1f) != 0x1f) { 1296 dev_dbg(&client->dev, "GPIO5 not configured for VID " 1297 "function\n"); 1298 goto exit; 1299 } 1300 1301 dev_info(&client->dev, "Reading VID from GPIO5\n"); 1302 res = superio_inb(W83627THF_GPIO5_DR) & sel; 1303 1304exit: 1305 superio_exit(); 1306 return res; 1307} 1308 1309static int w83687thf_read_vid(struct i2c_client *client) 1310{ 1311 int res = 0xff; 1312 1313 superio_enter(); 1314 superio_select(W83627HF_LD_HWM); 1315 1316 /* Make sure these GPIO pins are enabled */ 1317 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) { 1318 dev_dbg(&client->dev, "VID disabled, no VID function\n"); 1319 goto exit; 1320 } 1321 1322 /* Make sure the pins are configured for input */ 1323 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) { 1324 dev_dbg(&client->dev, "VID configured as output, " 1325 "no VID function\n"); 1326 goto exit; 1327 } 1328 1329 res = superio_inb(W83687THF_VID_DATA) & 0x3f; 1330 1331exit: 1332 superio_exit(); 1333 return res; 1334} 1335 1336static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value) 1337{ 1338 struct w83627hf_data *data = i2c_get_clientdata(client); 1339 int word_sized; 1340 1341 mutex_lock(&data->lock); 1342 word_sized = (((reg & 0xff00) == 0x100) 1343 || ((reg & 0xff00) == 0x200)) 1344 && (((reg & 0x00ff) == 0x53) 1345 || ((reg & 0x00ff) == 0x55)); 1346 if (reg & 0xff00) { 1347 outb_p(W83781D_REG_BANK, 1348 client->addr + W83781D_ADDR_REG_OFFSET); 1349 outb_p(reg >> 8, 1350 client->addr + W83781D_DATA_REG_OFFSET); 1351 } 1352 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); 1353 if (word_sized) { 1354 outb_p(value >> 8, 1355 client->addr + W83781D_DATA_REG_OFFSET); 1356 outb_p((reg & 0xff) + 1, 1357 client->addr + W83781D_ADDR_REG_OFFSET); 1358 } 1359 outb_p(value & 0xff, 1360 client->addr + W83781D_DATA_REG_OFFSET); 1361 if (reg & 0xff00) { 1362 outb_p(W83781D_REG_BANK, 1363 client->addr + W83781D_ADDR_REG_OFFSET); 1364 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); 1365 } 1366 mutex_unlock(&data->lock); 1367 return 0; 1368} 1369 1370static void w83627hf_init_client(struct i2c_client *client) 1371{ 1372 struct w83627hf_data *data = i2c_get_clientdata(client); 1373 int i; 1374 int type = data->type; 1375 u8 tmp; 1376 1377 if (reset) { 1378 /* Resetting the chip has been the default for a long time, 1379 but repeatedly caused problems (fans going to full 1380 speed...) so it is now optional. It might even go away if 1381 nobody reports it as being useful, as I see very little 1382 reason why this would be needed at all. */ 1383 dev_info(&client->dev, "If reset=1 solved a problem you were " 1384 "having, please report!\n"); 1385 1386 /* save this register */ 1387 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG); 1388 /* Reset all except Watchdog values and last conversion values 1389 This sets fan-divs to 2, among others */ 1390 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80); 1391 /* Restore the register and disable power-on abnormal beep. 1392 This saves FAN 1/2/3 input/output values set by BIOS. */ 1393 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); 1394 /* Disable master beep-enable (reset turns it on). 1395 Individual beeps should be reset to off but for some reason 1396 disabling this bit helps some people not get beeped */ 1397 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0); 1398 } 1399 1400 /* Minimize conflicts with other winbond i2c-only clients... */ 1401 /* disable i2c subclients... how to disable main i2c client?? */ 1402 /* force i2c address to relatively uncommon address */ 1403 w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89); 1404 w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c); 1405 1406 /* Read VID only once */ 1407 if (w83627hf == data->type || w83637hf == data->type) { 1408 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV); 1409 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID); 1410 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); 1411 } else if (w83627thf == data->type) { 1412 data->vid = w83627thf_read_gpio5(client); 1413 } else if (w83687thf == data->type) { 1414 data->vid = w83687thf_read_vid(client); 1415 } 1416 1417 /* Read VRM & OVT Config only once */ 1418 if (w83627thf == data->type || w83637hf == data->type 1419 || w83687thf == data->type) { 1420 data->vrm_ovt = 1421 w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG); 1422 } 1423 1424 /* Convert VID to voltage based on VRM */ 1425 data->vrm = vid_which_vrm(); 1426 1427 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); 1428 for (i = 1; i <= 3; i++) { 1429 if (!(tmp & BIT_SCFG1[i - 1])) { 1430 data->sens[i - 1] = W83781D_DEFAULT_BETA; 1431 } else { 1432 if (w83627hf_read_value 1433 (client, 1434 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1435 data->sens[i - 1] = 1; 1436 else 1437 data->sens[i - 1] = 2; 1438 } 1439 if ((type == w83697hf) && (i == 2)) 1440 break; 1441 } 1442 1443 if(init) { 1444 /* Enable temp2 */ 1445 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG); 1446 if (tmp & 0x01) { 1447 dev_warn(&client->dev, "Enabling temp2, readings " 1448 "might not make sense\n"); 1449 w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG, 1450 tmp & 0xfe); 1451 } 1452 1453 /* Enable temp3 */ 1454 if (type != w83697hf) { 1455 tmp = w83627hf_read_value(client, 1456 W83781D_REG_TEMP3_CONFIG); 1457 if (tmp & 0x01) { 1458 dev_warn(&client->dev, "Enabling temp3, " 1459 "readings might not make sense\n"); 1460 w83627hf_write_value(client, 1461 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); 1462 } 1463 } 1464 } 1465 1466 /* Start monitoring */ 1467 w83627hf_write_value(client, W83781D_REG_CONFIG, 1468 (w83627hf_read_value(client, 1469 W83781D_REG_CONFIG) & 0xf7) 1470 | 0x01); 1471} 1472 1473static struct w83627hf_data *w83627hf_update_device(struct device *dev) 1474{ 1475 struct i2c_client *client = to_i2c_client(dev); 1476 struct w83627hf_data *data = i2c_get_clientdata(client); 1477 int i; 1478 1479 mutex_lock(&data->update_lock); 1480 1481 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1482 || !data->valid) { 1483 for (i = 0; i <= 8; i++) { 1484 /* skip missing sensors */ 1485 if (((data->type == w83697hf) && (i == 1)) || 1486 ((data->type != w83627hf && data->type != w83697hf) 1487 && (i == 5 || i == 6))) 1488 continue; 1489 data->in[i] = 1490 w83627hf_read_value(client, W83781D_REG_IN(i)); 1491 data->in_min[i] = 1492 w83627hf_read_value(client, 1493 W83781D_REG_IN_MIN(i)); 1494 data->in_max[i] = 1495 w83627hf_read_value(client, 1496 W83781D_REG_IN_MAX(i)); 1497 } 1498 for (i = 1; i <= 3; i++) { 1499 data->fan[i - 1] = 1500 w83627hf_read_value(client, W83781D_REG_FAN(i)); 1501 data->fan_min[i - 1] = 1502 w83627hf_read_value(client, 1503 W83781D_REG_FAN_MIN(i)); 1504 } 1505 for (i = 1; i <= 3; i++) { 1506 u8 tmp = w83627hf_read_value(client, 1507 W836X7HF_REG_PWM(data->type, i)); 1508 /* bits 0-3 are reserved in 627THF */ 1509 if (data->type == w83627thf) 1510 tmp &= 0xf0; 1511 data->pwm[i - 1] = tmp; 1512 if(i == 2 && 1513 (data->type == w83627hf || data->type == w83697hf)) 1514 break; 1515 } 1516 1517 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1)); 1518 data->temp_max = 1519 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1)); 1520 data->temp_max_hyst = 1521 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1)); 1522 data->temp_add[0] = 1523 w83627hf_read_value(client, W83781D_REG_TEMP(2)); 1524 data->temp_max_add[0] = 1525 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2)); 1526 data->temp_max_hyst_add[0] = 1527 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2)); 1528 if (data->type != w83697hf) { 1529 data->temp_add[1] = 1530 w83627hf_read_value(client, W83781D_REG_TEMP(3)); 1531 data->temp_max_add[1] = 1532 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3)); 1533 data->temp_max_hyst_add[1] = 1534 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3)); 1535 } 1536 1537 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV); 1538 data->fan_div[0] = (i >> 4) & 0x03; 1539 data->fan_div[1] = (i >> 6) & 0x03; 1540 if (data->type != w83697hf) { 1541 data->fan_div[2] = (w83627hf_read_value(client, 1542 W83781D_REG_PIN) >> 6) & 0x03; 1543 } 1544 i = w83627hf_read_value(client, W83781D_REG_VBAT); 1545 data->fan_div[0] |= (i >> 3) & 0x04; 1546 data->fan_div[1] |= (i >> 4) & 0x04; 1547 if (data->type != w83697hf) 1548 data->fan_div[2] |= (i >> 5) & 0x04; 1549 data->alarms = 1550 w83627hf_read_value(client, W83781D_REG_ALARM1) | 1551 (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) | 1552 (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16); 1553 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2); 1554 data->beep_enable = i >> 7; 1555 data->beep_mask = ((i & 0x7f) << 8) | 1556 w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) | 1557 w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16; 1558 data->last_updated = jiffies; 1559 data->valid = 1; 1560 } 1561 1562 mutex_unlock(&data->update_lock); 1563 1564 return data; 1565} 1566 1567static int __init sensors_w83627hf_init(void) 1568{ 1569 if (w83627hf_find(0x2e, &address) 1570 && w83627hf_find(0x4e, &address)) { 1571 return -ENODEV; 1572 } 1573 1574 return i2c_isa_add_driver(&w83627hf_driver); 1575} 1576 1577static void __exit sensors_w83627hf_exit(void) 1578{ 1579 i2c_isa_del_driver(&w83627hf_driver); 1580} 1581 1582MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 1583 "Philip Edelbrock <phil@netroedge.com>, " 1584 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 1585MODULE_DESCRIPTION("W83627HF driver"); 1586MODULE_LICENSE("GPL"); 1587 1588module_init(sensors_w83627hf_init); 1589module_exit(sensors_w83627hf_exit);