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1#ifndef _ASM_IA64_HW_IRQ_H
2#define _ASM_IA64_HW_IRQ_H
3
4/*
5 * Copyright (C) 2001-2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
8
9#include <linux/interrupt.h>
10#include <linux/sched.h>
11#include <linux/types.h>
12#include <linux/profile.h>
13
14#include <asm/machvec.h>
15#include <asm/ptrace.h>
16#include <asm/smp.h>
17
18typedef u8 ia64_vector;
19
20/*
21 * 0 special
22 *
23 * 1,3-14 are reserved from firmware
24 *
25 * 16-255 (vectored external interrupts) are available
26 *
27 * 15 spurious interrupt (see IVR)
28 *
29 * 16 lowest priority, 255 highest priority
30 *
31 * 15 classes of 16 interrupts each.
32 */
33#define IA64_MIN_VECTORED_IRQ 16
34#define IA64_MAX_VECTORED_IRQ 255
35#define IA64_NUM_VECTORS 256
36
37#define AUTO_ASSIGN -1
38
39#define IA64_SPURIOUS_INT_VECTOR 0x0f
40
41/*
42 * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI.
43 */
44#define IA64_CPEP_VECTOR 0x1c /* corrected platform error polling vector */
45#define IA64_CMCP_VECTOR 0x1d /* corrected machine-check polling vector */
46#define IA64_CPE_VECTOR 0x1e /* corrected platform error interrupt vector */
47#define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */
48/*
49 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
50 * Use vectors 0x30-0xe7 as the default device vector range for ia64.
51 * Platforms may choose to reduce this range in platform_irq_setup, but the
52 * platform range must fall within
53 * [IA64_DEF_FIRST_DEVICE_VECTOR..IA64_DEF_LAST_DEVICE_VECTOR]
54 */
55extern int ia64_first_device_vector;
56extern int ia64_last_device_vector;
57
58#define IA64_DEF_FIRST_DEVICE_VECTOR 0x30
59#define IA64_DEF_LAST_DEVICE_VECTOR 0xe7
60#define IA64_FIRST_DEVICE_VECTOR ia64_first_device_vector
61#define IA64_LAST_DEVICE_VECTOR ia64_last_device_vector
62#define IA64_MAX_DEVICE_VECTORS (IA64_DEF_LAST_DEVICE_VECTOR - IA64_DEF_FIRST_DEVICE_VECTOR + 1)
63#define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1)
64
65#define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */
66#define IA64_PERFMON_VECTOR 0xee /* performanc monitor interrupt vector */
67#define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */
68#define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */
69#define IA64_IPI_RESCHEDULE 0xfd /* SMP reschedule */
70#define IA64_IPI_VECTOR 0xfe /* inter-processor interrupt vector */
71
72/* Used for encoding redirected irqs */
73
74#define IA64_IRQ_REDIRECTED (1 << 31)
75
76/* IA64 inter-cpu interrupt related definitions */
77
78#define IA64_IPI_DEFAULT_BASE_ADDR 0xfee00000
79
80/* Delivery modes for inter-cpu interrupts */
81enum {
82 IA64_IPI_DM_INT = 0x0, /* pend an external interrupt */
83 IA64_IPI_DM_PMI = 0x2, /* pend a PMI */
84 IA64_IPI_DM_NMI = 0x4, /* pend an NMI (vector 2) */
85 IA64_IPI_DM_INIT = 0x5, /* pend an INIT interrupt */
86 IA64_IPI_DM_EXTINT = 0x7, /* pend an 8259-compatible interrupt. */
87};
88
89extern __u8 isa_irq_to_vector_map[16];
90#define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)]
91
92extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
93
94extern int assign_irq_vector (int irq); /* allocate a free vector */
95extern void free_irq_vector (int vector);
96extern int reserve_irq_vector (int vector);
97extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
98extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
99
100static inline void ia64_resend_irq(unsigned int vector)
101{
102 platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
103}
104
105/*
106 * Default implementations for the irq-descriptor API:
107 */
108
109extern irq_desc_t irq_desc[NR_IRQS];
110
111#ifndef CONFIG_IA64_GENERIC
112static inline unsigned int
113__ia64_local_vector_to_irq (ia64_vector vec)
114{
115 return (unsigned int) vec;
116}
117#endif
118
119/*
120 * Next follows the irq descriptor interface. On IA-64, each CPU supports 256 interrupt
121 * vectors. On smaller systems, there is a one-to-one correspondence between interrupt
122 * vectors and the Linux irq numbers. However, larger systems may have multiple interrupt
123 * domains meaning that the translation from vector number to irq number depends on the
124 * interrupt domain that a CPU belongs to. This API abstracts such platform-dependent
125 * differences and provides a uniform means to translate between vector and irq numbers
126 * and to obtain the irq descriptor for a given irq number.
127 */
128
129/* Extract the IA-64 vector that corresponds to IRQ. */
130static inline ia64_vector
131irq_to_vector (int irq)
132{
133 return (ia64_vector) irq;
134}
135
136/*
137 * Convert the local IA-64 vector to the corresponding irq number. This translation is
138 * done in the context of the interrupt domain that the currently executing CPU belongs
139 * to.
140 */
141static inline unsigned int
142local_vector_to_irq (ia64_vector vec)
143{
144 return platform_local_vector_to_irq(vec);
145}
146
147#endif /* _ASM_IA64_HW_IRQ_H */