Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
28 * Torben Mathiasen <torben.mathiasen@hp.com>
29 *
30 */
31
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/proc_fs.h>
37#include <linux/slab.h>
38#include <linux/workqueue.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/interrupt.h>
42
43#include <asm/uaccess.h>
44
45#include "cpqphp.h"
46#include "cpqphp_nvram.h"
47#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
48
49
50/* Global variables */
51int cpqhp_debug;
52int cpqhp_legacy_mode;
53struct controller *cpqhp_ctrl_list; /* = NULL */
54struct pci_func *cpqhp_slot_list[256];
55
56/* local variables */
57static void __iomem *smbios_table;
58static void __iomem *smbios_start;
59static void __iomem *cpqhp_rom_start;
60static int power_mode;
61static int debug;
62static int initialized;
63
64#define DRIVER_VERSION "0.9.8"
65#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
66#define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
67
68MODULE_AUTHOR(DRIVER_AUTHOR);
69MODULE_DESCRIPTION(DRIVER_DESC);
70MODULE_LICENSE("GPL");
71
72module_param(power_mode, bool, 0644);
73MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
74
75module_param(debug, bool, 0644);
76MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
77
78#define CPQHPC_MODULE_MINOR 208
79
80static int one_time_init (void);
81static int set_attention_status (struct hotplug_slot *slot, u8 value);
82static int process_SI (struct hotplug_slot *slot);
83static int process_SS (struct hotplug_slot *slot);
84static int hardware_test (struct hotplug_slot *slot, u32 value);
85static int get_power_status (struct hotplug_slot *slot, u8 *value);
86static int get_attention_status (struct hotplug_slot *slot, u8 *value);
87static int get_latch_status (struct hotplug_slot *slot, u8 *value);
88static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
89static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
90static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
91
92static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
93 .owner = THIS_MODULE,
94 .set_attention_status = set_attention_status,
95 .enable_slot = process_SI,
96 .disable_slot = process_SS,
97 .hardware_test = hardware_test,
98 .get_power_status = get_power_status,
99 .get_attention_status = get_attention_status,
100 .get_latch_status = get_latch_status,
101 .get_adapter_status = get_adapter_status,
102 .get_max_bus_speed = get_max_bus_speed,
103 .get_cur_bus_speed = get_cur_bus_speed,
104};
105
106
107static inline int is_slot64bit(struct slot *slot)
108{
109 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
110}
111
112static inline int is_slot66mhz(struct slot *slot)
113{
114 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
115}
116
117/**
118 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
119 *
120 * @begin: begin pointer for region to be scanned.
121 * @end: end pointer for region to be scanned.
122 *
123 * Returns pointer to the head of the SMBIOS tables (or NULL)
124 *
125 */
126static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
127{
128 void __iomem *fp;
129 void __iomem *endp;
130 u8 temp1, temp2, temp3, temp4;
131 int status = 0;
132
133 endp = (end - sizeof(u32) + 1);
134
135 for (fp = begin; fp <= endp; fp += 16) {
136 temp1 = readb(fp);
137 temp2 = readb(fp+1);
138 temp3 = readb(fp+2);
139 temp4 = readb(fp+3);
140 if (temp1 == '_' &&
141 temp2 == 'S' &&
142 temp3 == 'M' &&
143 temp4 == '_') {
144 status = 1;
145 break;
146 }
147 }
148
149 if (!status)
150 fp = NULL;
151
152 dbg("Discovered SMBIOS Entry point at %p\n", fp);
153
154 return fp;
155}
156
157/**
158 * init_SERR - Initializes the per slot SERR generation.
159 *
160 * For unexpected switch opens
161 *
162 */
163static int init_SERR(struct controller * ctrl)
164{
165 u32 tempdword;
166 u32 number_of_slots;
167 u8 physical_slot;
168
169 if (!ctrl)
170 return 1;
171
172 tempdword = ctrl->first_slot;
173
174 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
175 // Loop through slots
176 while (number_of_slots) {
177 physical_slot = tempdword;
178 writeb(0, ctrl->hpc_reg + SLOT_SERR);
179 tempdword++;
180 number_of_slots--;
181 }
182
183 return 0;
184}
185
186
187/* nice debugging output */
188static int pci_print_IRQ_route (void)
189{
190 struct irq_routing_table *routing_table;
191 int len;
192 int loop;
193
194 u8 tbus, tdevice, tslot;
195
196 routing_table = pcibios_get_irq_routing_table();
197 if (routing_table == NULL) {
198 err("No BIOS Routing Table??? Not good\n");
199 return -ENOMEM;
200 }
201
202 len = (routing_table->size - sizeof(struct irq_routing_table)) /
203 sizeof(struct irq_info);
204 // Make sure I got at least one entry
205 if (len == 0) {
206 kfree(routing_table);
207 return -1;
208 }
209
210 dbg("bus dev func slot\n");
211
212 for (loop = 0; loop < len; ++loop) {
213 tbus = routing_table->slots[loop].bus;
214 tdevice = routing_table->slots[loop].devfn;
215 tslot = routing_table->slots[loop].slot;
216 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
217
218 }
219 kfree(routing_table);
220 return 0;
221}
222
223
224/**
225 * get_subsequent_smbios_entry: get the next entry from bios table.
226 *
227 * Gets the first entry if previous == NULL
228 * Otherwise, returns the next entry
229 * Uses global SMBIOS Table pointer
230 *
231 * @curr: %NULL or pointer to previously returned structure
232 *
233 * returns a pointer to an SMBIOS structure or NULL if none found
234 */
235static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
236 void __iomem *smbios_table,
237 void __iomem *curr)
238{
239 u8 bail = 0;
240 u8 previous_byte = 1;
241 void __iomem *p_temp;
242 void __iomem *p_max;
243
244 if (!smbios_table || !curr)
245 return(NULL);
246
247 // set p_max to the end of the table
248 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
249
250 p_temp = curr;
251 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
252
253 while ((p_temp < p_max) && !bail) {
254 /* Look for the double NULL terminator
255 * The first condition is the previous byte
256 * and the second is the curr */
257 if (!previous_byte && !(readb(p_temp))) {
258 bail = 1;
259 }
260
261 previous_byte = readb(p_temp);
262 p_temp++;
263 }
264
265 if (p_temp < p_max) {
266 return p_temp;
267 } else {
268 return NULL;
269 }
270}
271
272
273/**
274 * get_SMBIOS_entry
275 *
276 * @type:SMBIOS structure type to be returned
277 * @previous: %NULL or pointer to previously returned structure
278 *
279 * Gets the first entry of the specified type if previous == NULL
280 * Otherwise, returns the next entry of the given type.
281 * Uses global SMBIOS Table pointer
282 * Uses get_subsequent_smbios_entry
283 *
284 * returns a pointer to an SMBIOS structure or %NULL if none found
285 */
286static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
287 void __iomem *smbios_table,
288 u8 type,
289 void __iomem *previous)
290{
291 if (!smbios_table)
292 return NULL;
293
294 if (!previous) {
295 previous = smbios_start;
296 } else {
297 previous = get_subsequent_smbios_entry(smbios_start,
298 smbios_table, previous);
299 }
300
301 while (previous) {
302 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
303 previous = get_subsequent_smbios_entry(smbios_start,
304 smbios_table, previous);
305 } else {
306 break;
307 }
308 }
309
310 return previous;
311}
312
313static void release_slot(struct hotplug_slot *hotplug_slot)
314{
315 struct slot *slot = hotplug_slot->private;
316
317 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
318
319 kfree(slot->hotplug_slot->info);
320 kfree(slot->hotplug_slot->name);
321 kfree(slot->hotplug_slot);
322 kfree(slot);
323}
324
325static int ctrl_slot_setup(struct controller *ctrl,
326 void __iomem *smbios_start,
327 void __iomem *smbios_table)
328{
329 struct slot *slot;
330 struct hotplug_slot *hotplug_slot;
331 struct hotplug_slot_info *hotplug_slot_info;
332 u8 number_of_slots;
333 u8 slot_device;
334 u8 slot_number;
335 u8 ctrl_slot;
336 u32 tempdword;
337 void __iomem *slot_entry= NULL;
338 int result = -ENOMEM;
339
340 dbg("%s\n", __FUNCTION__);
341
342 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
343
344 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
345 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
346 slot_number = ctrl->first_slot;
347
348 while (number_of_slots) {
349 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
350 if (!slot)
351 goto error;
352
353 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
354 GFP_KERNEL);
355 if (!slot->hotplug_slot)
356 goto error_slot;
357 hotplug_slot = slot->hotplug_slot;
358
359 hotplug_slot->info =
360 kzalloc(sizeof(*(hotplug_slot->info)),
361 GFP_KERNEL);
362 if (!hotplug_slot->info)
363 goto error_hpslot;
364 hotplug_slot_info = hotplug_slot->info;
365 hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
366
367 if (!hotplug_slot->name)
368 goto error_info;
369
370 slot->ctrl = ctrl;
371 slot->bus = ctrl->bus;
372 slot->device = slot_device;
373 slot->number = slot_number;
374 dbg("slot->number = %d\n", slot->number);
375
376 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
377 slot_entry);
378
379 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
380 slot->number)) {
381 slot_entry = get_SMBIOS_entry(smbios_start,
382 smbios_table, 9, slot_entry);
383 }
384
385 slot->p_sm_slot = slot_entry;
386
387 init_timer(&slot->task_event);
388 slot->task_event.expires = jiffies + 5 * HZ;
389 slot->task_event.function = cpqhp_pushbutton_thread;
390
391 //FIXME: these capabilities aren't used but if they are
392 // they need to be correctly implemented
393 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
394 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
395
396 if (is_slot64bit(slot))
397 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
398 if (is_slot66mhz(slot))
399 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
400 if (ctrl->speed == PCI_SPEED_66MHz)
401 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
402
403 ctrl_slot =
404 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
405
406 // Check presence
407 slot->capabilities |=
408 ((((~tempdword) >> 23) |
409 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
410 // Check the switch state
411 slot->capabilities |=
412 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
413 // Check the slot enable
414 slot->capabilities |=
415 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
416
417 /* register this slot with the hotplug pci core */
418 hotplug_slot->release = &release_slot;
419 hotplug_slot->private = slot;
420 make_slot_name(hotplug_slot->name, SLOT_NAME_SIZE, slot);
421 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
422
423 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
424 hotplug_slot_info->attention_status =
425 cpq_get_attention_status(ctrl, slot);
426 hotplug_slot_info->latch_status =
427 cpq_get_latch_status(ctrl, slot);
428 hotplug_slot_info->adapter_status =
429 get_presence_status(ctrl, slot);
430
431 dbg("registering bus %d, dev %d, number %d, "
432 "ctrl->slot_device_offset %d, slot %d\n",
433 slot->bus, slot->device,
434 slot->number, ctrl->slot_device_offset,
435 slot_number);
436 result = pci_hp_register(hotplug_slot);
437 if (result) {
438 err("pci_hp_register failed with error %d\n", result);
439 goto error_name;
440 }
441
442 slot->next = ctrl->slot;
443 ctrl->slot = slot;
444
445 number_of_slots--;
446 slot_device++;
447 slot_number++;
448 }
449
450 return 0;
451error_name:
452 kfree(hotplug_slot->name);
453error_info:
454 kfree(hotplug_slot_info);
455error_hpslot:
456 kfree(hotplug_slot);
457error_slot:
458 kfree(slot);
459error:
460 return result;
461}
462
463static int ctrl_slot_cleanup (struct controller * ctrl)
464{
465 struct slot *old_slot, *next_slot;
466
467 old_slot = ctrl->slot;
468 ctrl->slot = NULL;
469
470 while (old_slot) {
471 /* memory will be freed by the release_slot callback */
472 next_slot = old_slot->next;
473 pci_hp_deregister (old_slot->hotplug_slot);
474 old_slot = next_slot;
475 }
476
477 cpqhp_remove_debugfs_files(ctrl);
478
479 //Free IRQ associated with hot plug device
480 free_irq(ctrl->interrupt, ctrl);
481 //Unmap the memory
482 iounmap(ctrl->hpc_reg);
483 //Finally reclaim PCI mem
484 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
485 pci_resource_len(ctrl->pci_dev, 0));
486
487 return(0);
488}
489
490
491//============================================================================
492// function: get_slot_mapping
493//
494// Description: Attempts to determine a logical slot mapping for a PCI
495// device. Won't work for more than one PCI-PCI bridge
496// in a slot.
497//
498// Input: u8 bus_num - bus number of PCI device
499// u8 dev_num - device number of PCI device
500// u8 *slot - Pointer to u8 where slot number will
501// be returned
502//
503// Output: SUCCESS or FAILURE
504//=============================================================================
505static int
506get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
507{
508 struct irq_routing_table *PCIIRQRoutingInfoLength;
509 u32 work;
510 long len;
511 long loop;
512
513 u8 tbus, tdevice, tslot, bridgeSlot;
514
515 dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
516
517 bridgeSlot = 0xFF;
518
519 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
520 if (!PCIIRQRoutingInfoLength)
521 return -1;
522
523 len = (PCIIRQRoutingInfoLength->size -
524 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
525 // Make sure I got at least one entry
526 if (len == 0) {
527 kfree(PCIIRQRoutingInfoLength);
528 return -1;
529 }
530
531 for (loop = 0; loop < len; ++loop) {
532 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
533 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
534 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
535
536 if ((tbus == bus_num) && (tdevice == dev_num)) {
537 *slot = tslot;
538 kfree(PCIIRQRoutingInfoLength);
539 return 0;
540 } else {
541 /* Did not get a match on the target PCI device. Check
542 * if the current IRQ table entry is a PCI-to-PCI bridge
543 * device. If so, and it's secondary bus matches the
544 * bus number for the target device, I need to save the
545 * bridge's slot number. If I can not find an entry for
546 * the target device, I will have to assume it's on the
547 * other side of the bridge, and assign it the bridge's
548 * slot. */
549 bus->number = tbus;
550 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
551 PCI_REVISION_ID, &work);
552
553 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
554 pci_bus_read_config_dword(bus,
555 PCI_DEVFN(tdevice, 0),
556 PCI_PRIMARY_BUS, &work);
557 // See if bridge's secondary bus matches target bus.
558 if (((work >> 8) & 0x000000FF) == (long) bus_num) {
559 bridgeSlot = tslot;
560 }
561 }
562 }
563
564 }
565
566 // If we got here, we didn't find an entry in the IRQ mapping table
567 // for the target PCI device. If we did determine that the target
568 // device is on the other side of a PCI-to-PCI bridge, return the
569 // slot number for the bridge.
570 if (bridgeSlot != 0xFF) {
571 *slot = bridgeSlot;
572 kfree(PCIIRQRoutingInfoLength);
573 return 0;
574 }
575 kfree(PCIIRQRoutingInfoLength);
576 // Couldn't find an entry in the routing table for this PCI device
577 return -1;
578}
579
580
581/**
582 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
583 *
584 */
585static int
586cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
587 u32 status)
588{
589 u8 hp_slot;
590
591 if (func == NULL)
592 return(1);
593
594 hp_slot = func->device - ctrl->slot_device_offset;
595
596 // Wait for exclusive access to hardware
597 mutex_lock(&ctrl->crit_sect);
598
599 if (status == 1) {
600 amber_LED_on (ctrl, hp_slot);
601 } else if (status == 0) {
602 amber_LED_off (ctrl, hp_slot);
603 } else {
604 // Done with exclusive hardware access
605 mutex_unlock(&ctrl->crit_sect);
606 return(1);
607 }
608
609 set_SOGO(ctrl);
610
611 // Wait for SOBS to be unset
612 wait_for_ctrl_irq (ctrl);
613
614 // Done with exclusive hardware access
615 mutex_unlock(&ctrl->crit_sect);
616
617 return(0);
618}
619
620
621/**
622 * set_attention_status - Turns the Amber LED for a slot on or off
623 *
624 */
625static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
626{
627 struct pci_func *slot_func;
628 struct slot *slot = hotplug_slot->private;
629 struct controller *ctrl = slot->ctrl;
630 u8 bus;
631 u8 devfn;
632 u8 device;
633 u8 function;
634
635 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
636
637 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
638 return -ENODEV;
639
640 device = devfn >> 3;
641 function = devfn & 0x7;
642 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
643
644 slot_func = cpqhp_slot_find(bus, device, function);
645 if (!slot_func)
646 return -ENODEV;
647
648 return cpqhp_set_attention_status(ctrl, slot_func, status);
649}
650
651
652static int process_SI(struct hotplug_slot *hotplug_slot)
653{
654 struct pci_func *slot_func;
655 struct slot *slot = hotplug_slot->private;
656 struct controller *ctrl = slot->ctrl;
657 u8 bus;
658 u8 devfn;
659 u8 device;
660 u8 function;
661
662 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
663
664 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
665 return -ENODEV;
666
667 device = devfn >> 3;
668 function = devfn & 0x7;
669 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
670
671 slot_func = cpqhp_slot_find(bus, device, function);
672 if (!slot_func)
673 return -ENODEV;
674
675 slot_func->bus = bus;
676 slot_func->device = device;
677 slot_func->function = function;
678 slot_func->configured = 0;
679 dbg("board_added(%p, %p)\n", slot_func, ctrl);
680 return cpqhp_process_SI(ctrl, slot_func);
681}
682
683
684static int process_SS(struct hotplug_slot *hotplug_slot)
685{
686 struct pci_func *slot_func;
687 struct slot *slot = hotplug_slot->private;
688 struct controller *ctrl = slot->ctrl;
689 u8 bus;
690 u8 devfn;
691 u8 device;
692 u8 function;
693
694 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
695
696 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
697 return -ENODEV;
698
699 device = devfn >> 3;
700 function = devfn & 0x7;
701 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
702
703 slot_func = cpqhp_slot_find(bus, device, function);
704 if (!slot_func)
705 return -ENODEV;
706
707 dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl);
708 return cpqhp_process_SS(ctrl, slot_func);
709}
710
711
712static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
713{
714 struct slot *slot = hotplug_slot->private;
715 struct controller *ctrl = slot->ctrl;
716
717 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
718
719 return cpqhp_hardware_test(ctrl, value);
720}
721
722
723static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
724{
725 struct slot *slot = hotplug_slot->private;
726 struct controller *ctrl = slot->ctrl;
727
728 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
729
730 *value = get_slot_enabled(ctrl, slot);
731 return 0;
732}
733
734static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
735{
736 struct slot *slot = hotplug_slot->private;
737 struct controller *ctrl = slot->ctrl;
738
739 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
740
741 *value = cpq_get_attention_status(ctrl, slot);
742 return 0;
743}
744
745static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
746{
747 struct slot *slot = hotplug_slot->private;
748 struct controller *ctrl = slot->ctrl;
749
750 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
751
752 *value = cpq_get_latch_status(ctrl, slot);
753
754 return 0;
755}
756
757static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
758{
759 struct slot *slot = hotplug_slot->private;
760 struct controller *ctrl = slot->ctrl;
761
762 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
763
764 *value = get_presence_status(ctrl, slot);
765
766 return 0;
767}
768
769static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
770{
771 struct slot *slot = hotplug_slot->private;
772 struct controller *ctrl = slot->ctrl;
773
774 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
775
776 *value = ctrl->speed_capability;
777
778 return 0;
779}
780
781static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
782{
783 struct slot *slot = hotplug_slot->private;
784 struct controller *ctrl = slot->ctrl;
785
786 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
787
788 *value = ctrl->speed;
789
790 return 0;
791}
792
793static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
794{
795 u8 num_of_slots = 0;
796 u8 hp_slot = 0;
797 u8 device;
798 u8 rev;
799 u8 bus_cap;
800 u16 temp_word;
801 u16 vendor_id;
802 u16 subsystem_vid;
803 u16 subsystem_deviceid;
804 u32 rc;
805 struct controller *ctrl;
806 struct pci_func *func;
807 int err;
808
809 err = pci_enable_device(pdev);
810 if (err) {
811 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
812 pci_name(pdev), err);
813 return err;
814 }
815
816 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
817 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
818 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
819 err(msg_HPC_non_compaq_or_intel);
820 rc = -ENODEV;
821 goto err_disable_device;
822 }
823 dbg("Vendor ID: %x\n", vendor_id);
824
825 rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
826 dbg("revision: %d\n", rev);
827 if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
828 err(msg_HPC_rev_error);
829 rc = -ENODEV;
830 goto err_disable_device;
831 }
832
833 /* Check for the proper subsytem ID's
834 * Intel uses a different SSID programming model than Compaq.
835 * For Intel, each SSID bit identifies a PHP capability.
836 * Also Intel HPC's may have RID=0.
837 */
838 if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
839 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
840 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
841 if (rc) {
842 err("%s : pci_read_config_word failed\n", __FUNCTION__);
843 goto err_disable_device;
844 }
845 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
846 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
847 err(msg_HPC_non_compaq_or_intel);
848 rc = -ENODEV;
849 goto err_disable_device;
850 }
851
852 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
853 if (!ctrl) {
854 err("%s : out of memory\n", __FUNCTION__);
855 rc = -ENOMEM;
856 goto err_disable_device;
857 }
858
859 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
860 if (rc) {
861 err("%s : pci_read_config_word failed\n", __FUNCTION__);
862 goto err_free_ctrl;
863 }
864
865 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
866
867 /* Set Vendor ID, so it can be accessed later from other functions */
868 ctrl->vendor_id = vendor_id;
869
870 switch (subsystem_vid) {
871 case PCI_VENDOR_ID_COMPAQ:
872 if (rev >= 0x13) { /* CIOBX */
873 ctrl->push_flag = 1;
874 ctrl->slot_switch_type = 1;
875 ctrl->push_button = 1;
876 ctrl->pci_config_space = 1;
877 ctrl->defeature_PHP = 1;
878 ctrl->pcix_support = 1;
879 ctrl->pcix_speed_capability = 1;
880 pci_read_config_byte(pdev, 0x41, &bus_cap);
881 if (bus_cap & 0x80) {
882 dbg("bus max supports 133MHz PCI-X\n");
883 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
884 break;
885 }
886 if (bus_cap & 0x40) {
887 dbg("bus max supports 100MHz PCI-X\n");
888 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
889 break;
890 }
891 if (bus_cap & 20) {
892 dbg("bus max supports 66MHz PCI-X\n");
893 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
894 break;
895 }
896 if (bus_cap & 10) {
897 dbg("bus max supports 66MHz PCI\n");
898 ctrl->speed_capability = PCI_SPEED_66MHz;
899 break;
900 }
901
902 break;
903 }
904
905 switch (subsystem_deviceid) {
906 case PCI_SUB_HPC_ID:
907 /* Original 6500/7000 implementation */
908 ctrl->slot_switch_type = 1;
909 ctrl->speed_capability = PCI_SPEED_33MHz;
910 ctrl->push_button = 0;
911 ctrl->pci_config_space = 1;
912 ctrl->defeature_PHP = 1;
913 ctrl->pcix_support = 0;
914 ctrl->pcix_speed_capability = 0;
915 break;
916 case PCI_SUB_HPC_ID2:
917 /* First Pushbutton implementation */
918 ctrl->push_flag = 1;
919 ctrl->slot_switch_type = 1;
920 ctrl->speed_capability = PCI_SPEED_33MHz;
921 ctrl->push_button = 1;
922 ctrl->pci_config_space = 1;
923 ctrl->defeature_PHP = 1;
924 ctrl->pcix_support = 0;
925 ctrl->pcix_speed_capability = 0;
926 break;
927 case PCI_SUB_HPC_ID_INTC:
928 /* Third party (6500/7000) */
929 ctrl->slot_switch_type = 1;
930 ctrl->speed_capability = PCI_SPEED_33MHz;
931 ctrl->push_button = 0;
932 ctrl->pci_config_space = 1;
933 ctrl->defeature_PHP = 1;
934 ctrl->pcix_support = 0;
935 ctrl->pcix_speed_capability = 0;
936 break;
937 case PCI_SUB_HPC_ID3:
938 /* First 66 Mhz implementation */
939 ctrl->push_flag = 1;
940 ctrl->slot_switch_type = 1;
941 ctrl->speed_capability = PCI_SPEED_66MHz;
942 ctrl->push_button = 1;
943 ctrl->pci_config_space = 1;
944 ctrl->defeature_PHP = 1;
945 ctrl->pcix_support = 0;
946 ctrl->pcix_speed_capability = 0;
947 break;
948 case PCI_SUB_HPC_ID4:
949 /* First PCI-X implementation, 100MHz */
950 ctrl->push_flag = 1;
951 ctrl->slot_switch_type = 1;
952 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
953 ctrl->push_button = 1;
954 ctrl->pci_config_space = 1;
955 ctrl->defeature_PHP = 1;
956 ctrl->pcix_support = 1;
957 ctrl->pcix_speed_capability = 0;
958 break;
959 default:
960 err(msg_HPC_not_supported);
961 rc = -ENODEV;
962 goto err_free_ctrl;
963 }
964 break;
965
966 case PCI_VENDOR_ID_INTEL:
967 /* Check for speed capability (0=33, 1=66) */
968 if (subsystem_deviceid & 0x0001) {
969 ctrl->speed_capability = PCI_SPEED_66MHz;
970 } else {
971 ctrl->speed_capability = PCI_SPEED_33MHz;
972 }
973
974 /* Check for push button */
975 if (subsystem_deviceid & 0x0002) {
976 /* no push button */
977 ctrl->push_button = 0;
978 } else {
979 /* push button supported */
980 ctrl->push_button = 1;
981 }
982
983 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
984 if (subsystem_deviceid & 0x0004) {
985 /* no switch */
986 ctrl->slot_switch_type = 0;
987 } else {
988 /* switch */
989 ctrl->slot_switch_type = 1;
990 }
991
992 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
993 if (subsystem_deviceid & 0x0008) {
994 ctrl->defeature_PHP = 1; // PHP supported
995 } else {
996 ctrl->defeature_PHP = 0; // PHP not supported
997 }
998
999 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
1000 if (subsystem_deviceid & 0x0010) {
1001 ctrl->alternate_base_address = 1; // supported
1002 } else {
1003 ctrl->alternate_base_address = 0; // not supported
1004 }
1005
1006 /* PCI Config Space Index (0=not supported, 1=supported) */
1007 if (subsystem_deviceid & 0x0020) {
1008 ctrl->pci_config_space = 1; // supported
1009 } else {
1010 ctrl->pci_config_space = 0; // not supported
1011 }
1012
1013 /* PCI-X support */
1014 if (subsystem_deviceid & 0x0080) {
1015 /* PCI-X capable */
1016 ctrl->pcix_support = 1;
1017 /* Frequency of operation in PCI-X mode */
1018 if (subsystem_deviceid & 0x0040) {
1019 /* 133MHz PCI-X if bit 7 is 1 */
1020 ctrl->pcix_speed_capability = 1;
1021 } else {
1022 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1023 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1024 ctrl->pcix_speed_capability = 0;
1025 }
1026 } else {
1027 /* Conventional PCI */
1028 ctrl->pcix_support = 0;
1029 ctrl->pcix_speed_capability = 0;
1030 }
1031 break;
1032
1033 default:
1034 err(msg_HPC_not_supported);
1035 rc = -ENODEV;
1036 goto err_free_ctrl;
1037 }
1038
1039 } else {
1040 err(msg_HPC_not_supported);
1041 return -ENODEV;
1042 }
1043
1044 // Tell the user that we found one.
1045 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1046 pdev->bus->number);
1047
1048 dbg("Hotplug controller capabilities:\n");
1049 dbg(" speed_capability %d\n", ctrl->speed_capability);
1050 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1051 "switch present" : "no switch");
1052 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1053 "PHP supported" : "PHP not supported");
1054 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1055 "supported" : "not supported");
1056 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1057 "supported" : "not supported");
1058 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1059 "supported" : "not supported");
1060 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1061 "supported" : "not supported");
1062
1063 ctrl->pci_dev = pdev;
1064 pci_set_drvdata(pdev, ctrl);
1065
1066 /* make our own copy of the pci bus structure,
1067 * as we like tweaking it a lot */
1068 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
1069 if (!ctrl->pci_bus) {
1070 err("out of memory\n");
1071 rc = -ENOMEM;
1072 goto err_free_ctrl;
1073 }
1074 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1075
1076 ctrl->bus = pdev->bus->number;
1077 ctrl->rev = rev;
1078 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1079 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1080
1081 mutex_init(&ctrl->crit_sect);
1082 init_waitqueue_head(&ctrl->queue);
1083
1084 /* initialize our threads if they haven't already been started up */
1085 rc = one_time_init();
1086 if (rc) {
1087 goto err_free_bus;
1088 }
1089
1090 dbg("pdev = %p\n", pdev);
1091 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1092 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1093
1094 if (!request_mem_region(pci_resource_start(pdev, 0),
1095 pci_resource_len(pdev, 0), MY_NAME)) {
1096 err("cannot reserve MMIO region\n");
1097 rc = -ENOMEM;
1098 goto err_free_bus;
1099 }
1100
1101 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1102 pci_resource_len(pdev, 0));
1103 if (!ctrl->hpc_reg) {
1104 err("cannot remap MMIO region %llx @ %llx\n",
1105 (unsigned long long)pci_resource_len(pdev, 0),
1106 (unsigned long long)pci_resource_start(pdev, 0));
1107 rc = -ENODEV;
1108 goto err_free_mem_region;
1109 }
1110
1111 // Check for 66Mhz operation
1112 ctrl->speed = get_controller_speed(ctrl);
1113
1114
1115 /********************************************************
1116 *
1117 * Save configuration headers for this and
1118 * subordinate PCI buses
1119 *
1120 ********************************************************/
1121
1122 // find the physical slot number of the first hot plug slot
1123
1124 /* Get slot won't work for devices behind bridges, but
1125 * in this case it will always be called for the "base"
1126 * bus/dev/func of a slot.
1127 * CS: this is leveraging the PCIIRQ routing code from the kernel
1128 * (pci-pc.c: get_irq_routing_table) */
1129 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1130 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1131 &(ctrl->first_slot));
1132 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1133 ctrl->first_slot, rc);
1134 if (rc) {
1135 err(msg_initialization_err, rc);
1136 goto err_iounmap;
1137 }
1138
1139 // Store PCI Config Space for all devices on this bus
1140 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1141 if (rc) {
1142 err("%s: unable to save PCI configuration data, error %d\n",
1143 __FUNCTION__, rc);
1144 goto err_iounmap;
1145 }
1146
1147 /*
1148 * Get IO, memory, and IRQ resources for new devices
1149 */
1150 // The next line is required for cpqhp_find_available_resources
1151 ctrl->interrupt = pdev->irq;
1152 if (ctrl->interrupt < 0x10) {
1153 cpqhp_legacy_mode = 1;
1154 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1155 }
1156
1157 ctrl->cfgspc_irq = 0;
1158 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1159
1160 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1161 ctrl->add_support = !rc;
1162 if (rc) {
1163 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1164 err("unable to locate PCI configuration resources for hot plug add.\n");
1165 goto err_iounmap;
1166 }
1167
1168 /*
1169 * Finish setting up the hot plug ctrl device
1170 */
1171 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1172 dbg("NumSlots %d \n", ctrl->slot_device_offset);
1173
1174 ctrl->next_event = 0;
1175
1176 /* Setup the slot information structures */
1177 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1178 if (rc) {
1179 err(msg_initialization_err, 6);
1180 err("%s: unable to save PCI configuration data, error %d\n",
1181 __FUNCTION__, rc);
1182 goto err_iounmap;
1183 }
1184
1185 /* Mask all general input interrupts */
1186 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1187
1188 /* set up the interrupt */
1189 dbg("HPC interrupt = %d \n", ctrl->interrupt);
1190 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1191 IRQF_SHARED, MY_NAME, ctrl)) {
1192 err("Can't get irq %d for the hotplug pci controller\n",
1193 ctrl->interrupt);
1194 rc = -ENODEV;
1195 goto err_iounmap;
1196 }
1197
1198 /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
1199 temp_word = readw(ctrl->hpc_reg + MISC);
1200 temp_word |= 0x4006;
1201 writew(temp_word, ctrl->hpc_reg + MISC);
1202
1203 // Changed 05/05/97 to clear all interrupts at start
1204 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1205
1206 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1207
1208 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1209
1210 if (!cpqhp_ctrl_list) {
1211 cpqhp_ctrl_list = ctrl;
1212 ctrl->next = NULL;
1213 } else {
1214 ctrl->next = cpqhp_ctrl_list;
1215 cpqhp_ctrl_list = ctrl;
1216 }
1217
1218 // turn off empty slots here unless command line option "ON" set
1219 // Wait for exclusive access to hardware
1220 mutex_lock(&ctrl->crit_sect);
1221
1222 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1223
1224 // find first device number for the ctrl
1225 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1226
1227 while (num_of_slots) {
1228 dbg("num_of_slots: %d\n", num_of_slots);
1229 func = cpqhp_slot_find(ctrl->bus, device, 0);
1230 if (!func)
1231 break;
1232
1233 hp_slot = func->device - ctrl->slot_device_offset;
1234 dbg("hp_slot: %d\n", hp_slot);
1235
1236 // We have to save the presence info for these slots
1237 temp_word = ctrl->ctrl_int_comp >> 16;
1238 func->presence_save = (temp_word >> hp_slot) & 0x01;
1239 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1240
1241 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1242 func->switch_save = 0;
1243 } else {
1244 func->switch_save = 0x10;
1245 }
1246
1247 if (!power_mode) {
1248 if (!func->is_a_board) {
1249 green_LED_off(ctrl, hp_slot);
1250 slot_disable(ctrl, hp_slot);
1251 }
1252 }
1253
1254 device++;
1255 num_of_slots--;
1256 }
1257
1258 if (!power_mode) {
1259 set_SOGO(ctrl);
1260 // Wait for SOBS to be unset
1261 wait_for_ctrl_irq(ctrl);
1262 }
1263
1264 rc = init_SERR(ctrl);
1265 if (rc) {
1266 err("init_SERR failed\n");
1267 mutex_unlock(&ctrl->crit_sect);
1268 goto err_free_irq;
1269 }
1270
1271 // Done with exclusive hardware access
1272 mutex_unlock(&ctrl->crit_sect);
1273
1274 cpqhp_create_debugfs_files(ctrl);
1275
1276 return 0;
1277
1278err_free_irq:
1279 free_irq(ctrl->interrupt, ctrl);
1280err_iounmap:
1281 iounmap(ctrl->hpc_reg);
1282err_free_mem_region:
1283 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1284err_free_bus:
1285 kfree(ctrl->pci_bus);
1286err_free_ctrl:
1287 kfree(ctrl);
1288err_disable_device:
1289 pci_disable_device(pdev);
1290 return rc;
1291}
1292
1293
1294static int one_time_init(void)
1295{
1296 int loop;
1297 int retval = 0;
1298
1299 if (initialized)
1300 return 0;
1301
1302 power_mode = 0;
1303
1304 retval = pci_print_IRQ_route();
1305 if (retval)
1306 goto error;
1307
1308 dbg("Initialize + Start the notification mechanism \n");
1309
1310 retval = cpqhp_event_start_thread();
1311 if (retval)
1312 goto error;
1313
1314 dbg("Initialize slot lists\n");
1315 for (loop = 0; loop < 256; loop++) {
1316 cpqhp_slot_list[loop] = NULL;
1317 }
1318
1319 // FIXME: We also need to hook the NMI handler eventually.
1320 // this also needs to be worked with Christoph
1321 // register_NMI_handler();
1322
1323 // Map rom address
1324 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
1325 if (!cpqhp_rom_start) {
1326 err ("Could not ioremap memory region for ROM\n");
1327 retval = -EIO;
1328 goto error;
1329 }
1330
1331 /* Now, map the int15 entry point if we are on compaq specific hardware */
1332 compaq_nvram_init(cpqhp_rom_start);
1333
1334 /* Map smbios table entry point structure */
1335 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
1336 cpqhp_rom_start + ROM_PHY_LEN);
1337 if (!smbios_table) {
1338 err ("Could not find the SMBIOS pointer in memory\n");
1339 retval = -EIO;
1340 goto error_rom_start;
1341 }
1342
1343 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
1344 readw(smbios_table + ST_LENGTH));
1345 if (!smbios_start) {
1346 err ("Could not ioremap memory region taken from SMBIOS values\n");
1347 retval = -EIO;
1348 goto error_smbios_start;
1349 }
1350
1351 initialized = 1;
1352
1353 return retval;
1354
1355error_smbios_start:
1356 iounmap(smbios_start);
1357error_rom_start:
1358 iounmap(cpqhp_rom_start);
1359error:
1360 return retval;
1361}
1362
1363
1364static void __exit unload_cpqphpd(void)
1365{
1366 struct pci_func *next;
1367 struct pci_func *TempSlot;
1368 int loop;
1369 u32 rc;
1370 struct controller *ctrl;
1371 struct controller *tctrl;
1372 struct pci_resource *res;
1373 struct pci_resource *tres;
1374
1375 rc = compaq_nvram_store(cpqhp_rom_start);
1376
1377 ctrl = cpqhp_ctrl_list;
1378
1379 while (ctrl) {
1380 if (ctrl->hpc_reg) {
1381 u16 misc;
1382 rc = read_slot_enable (ctrl);
1383
1384 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1385 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1386
1387 misc = readw(ctrl->hpc_reg + MISC);
1388 misc &= 0xFFFD;
1389 writew(misc, ctrl->hpc_reg + MISC);
1390 }
1391
1392 ctrl_slot_cleanup(ctrl);
1393
1394 res = ctrl->io_head;
1395 while (res) {
1396 tres = res;
1397 res = res->next;
1398 kfree(tres);
1399 }
1400
1401 res = ctrl->mem_head;
1402 while (res) {
1403 tres = res;
1404 res = res->next;
1405 kfree(tres);
1406 }
1407
1408 res = ctrl->p_mem_head;
1409 while (res) {
1410 tres = res;
1411 res = res->next;
1412 kfree(tres);
1413 }
1414
1415 res = ctrl->bus_head;
1416 while (res) {
1417 tres = res;
1418 res = res->next;
1419 kfree(tres);
1420 }
1421
1422 kfree (ctrl->pci_bus);
1423
1424 tctrl = ctrl;
1425 ctrl = ctrl->next;
1426 kfree(tctrl);
1427 }
1428
1429 for (loop = 0; loop < 256; loop++) {
1430 next = cpqhp_slot_list[loop];
1431 while (next != NULL) {
1432 res = next->io_head;
1433 while (res) {
1434 tres = res;
1435 res = res->next;
1436 kfree(tres);
1437 }
1438
1439 res = next->mem_head;
1440 while (res) {
1441 tres = res;
1442 res = res->next;
1443 kfree(tres);
1444 }
1445
1446 res = next->p_mem_head;
1447 while (res) {
1448 tres = res;
1449 res = res->next;
1450 kfree(tres);
1451 }
1452
1453 res = next->bus_head;
1454 while (res) {
1455 tres = res;
1456 res = res->next;
1457 kfree(tres);
1458 }
1459
1460 TempSlot = next;
1461 next = next->next;
1462 kfree(TempSlot);
1463 }
1464 }
1465
1466 // Stop the notification mechanism
1467 if (initialized)
1468 cpqhp_event_stop_thread();
1469
1470 //unmap the rom address
1471 if (cpqhp_rom_start)
1472 iounmap(cpqhp_rom_start);
1473 if (smbios_start)
1474 iounmap(smbios_start);
1475}
1476
1477
1478
1479static struct pci_device_id hpcd_pci_tbl[] = {
1480 {
1481 /* handle any PCI Hotplug controller */
1482 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1483 .class_mask = ~0,
1484
1485 /* no matter who makes it */
1486 .vendor = PCI_ANY_ID,
1487 .device = PCI_ANY_ID,
1488 .subvendor = PCI_ANY_ID,
1489 .subdevice = PCI_ANY_ID,
1490
1491 }, { /* end: all zeroes */ }
1492};
1493
1494MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1495
1496
1497
1498static struct pci_driver cpqhpc_driver = {
1499 .name = "compaq_pci_hotplug",
1500 .id_table = hpcd_pci_tbl,
1501 .probe = cpqhpc_probe,
1502 /* remove: cpqhpc_remove_one, */
1503};
1504
1505
1506
1507static int __init cpqhpc_init(void)
1508{
1509 int result;
1510
1511 cpqhp_debug = debug;
1512
1513 info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
1514 cpqhp_initialize_debugfs();
1515 result = pci_register_driver(&cpqhpc_driver);
1516 dbg("pci_register_driver = %d\n", result);
1517 return result;
1518}
1519
1520
1521static void __exit cpqhpc_cleanup(void)
1522{
1523 dbg("unload_cpqphpd()\n");
1524 unload_cpqphpd();
1525
1526 dbg("pci_unregister_driver\n");
1527 pci_unregister_driver(&cpqhpc_driver);
1528 cpqhp_shutdown_debugfs();
1529}
1530
1531
1532module_init(cpqhpc_init);
1533module_exit(cpqhpc_cleanup);
1534
1535