Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v2.6.18-rc6 4394 lines 124 kB view raw
1/* esp.c: ESP Sun SCSI driver. 2 * 3 * Copyright (C) 1995, 1998, 2006 David S. Miller (davem@davemloft.net) 4 */ 5 6/* TODO: 7 * 8 * 1) Maybe disable parity checking in config register one for SCSI1 9 * targets. (Gilmore says parity error on the SBus can lock up 10 * old sun4c's) 11 * 2) Add support for DMA2 pipelining. 12 * 3) Add tagged queueing. 13 */ 14 15#include <linux/kernel.h> 16#include <linux/delay.h> 17#include <linux/types.h> 18#include <linux/string.h> 19#include <linux/slab.h> 20#include <linux/blkdev.h> 21#include <linux/proc_fs.h> 22#include <linux/stat.h> 23#include <linux/init.h> 24#include <linux/spinlock.h> 25#include <linux/interrupt.h> 26#include <linux/module.h> 27 28#include "esp.h" 29 30#include <asm/sbus.h> 31#include <asm/dma.h> 32#include <asm/system.h> 33#include <asm/ptrace.h> 34#include <asm/pgtable.h> 35#include <asm/oplib.h> 36#include <asm/io.h> 37#include <asm/irq.h> 38#ifndef __sparc_v9__ 39#include <asm/machines.h> 40#include <asm/idprom.h> 41#endif 42 43#include <scsi/scsi.h> 44#include <scsi/scsi_cmnd.h> 45#include <scsi/scsi_device.h> 46#include <scsi/scsi_eh.h> 47#include <scsi/scsi_host.h> 48#include <scsi/scsi_tcq.h> 49 50#define DRV_VERSION "1.101" 51 52#define DEBUG_ESP 53/* #define DEBUG_ESP_HME */ 54/* #define DEBUG_ESP_DATA */ 55/* #define DEBUG_ESP_QUEUE */ 56/* #define DEBUG_ESP_DISCONNECT */ 57/* #define DEBUG_ESP_STATUS */ 58/* #define DEBUG_ESP_PHASES */ 59/* #define DEBUG_ESP_WORKBUS */ 60/* #define DEBUG_STATE_MACHINE */ 61/* #define DEBUG_ESP_CMDS */ 62/* #define DEBUG_ESP_IRQS */ 63/* #define DEBUG_SDTR */ 64/* #define DEBUG_ESP_SG */ 65 66/* Use the following to sprinkle debugging messages in a way which 67 * suits you if combinations of the above become too verbose when 68 * trying to track down a specific problem. 69 */ 70/* #define DEBUG_ESP_MISC */ 71 72#if defined(DEBUG_ESP) 73#define ESPLOG(foo) printk foo 74#else 75#define ESPLOG(foo) 76#endif /* (DEBUG_ESP) */ 77 78#if defined(DEBUG_ESP_HME) 79#define ESPHME(foo) printk foo 80#else 81#define ESPHME(foo) 82#endif 83 84#if defined(DEBUG_ESP_DATA) 85#define ESPDATA(foo) printk foo 86#else 87#define ESPDATA(foo) 88#endif 89 90#if defined(DEBUG_ESP_QUEUE) 91#define ESPQUEUE(foo) printk foo 92#else 93#define ESPQUEUE(foo) 94#endif 95 96#if defined(DEBUG_ESP_DISCONNECT) 97#define ESPDISC(foo) printk foo 98#else 99#define ESPDISC(foo) 100#endif 101 102#if defined(DEBUG_ESP_STATUS) 103#define ESPSTAT(foo) printk foo 104#else 105#define ESPSTAT(foo) 106#endif 107 108#if defined(DEBUG_ESP_PHASES) 109#define ESPPHASE(foo) printk foo 110#else 111#define ESPPHASE(foo) 112#endif 113 114#if defined(DEBUG_ESP_WORKBUS) 115#define ESPBUS(foo) printk foo 116#else 117#define ESPBUS(foo) 118#endif 119 120#if defined(DEBUG_ESP_IRQS) 121#define ESPIRQ(foo) printk foo 122#else 123#define ESPIRQ(foo) 124#endif 125 126#if defined(DEBUG_SDTR) 127#define ESPSDTR(foo) printk foo 128#else 129#define ESPSDTR(foo) 130#endif 131 132#if defined(DEBUG_ESP_MISC) 133#define ESPMISC(foo) printk foo 134#else 135#define ESPMISC(foo) 136#endif 137 138/* Command phase enumeration. */ 139enum { 140 not_issued = 0x00, /* Still in the issue_SC queue. */ 141 142 /* Various forms of selecting a target. */ 143#define in_slct_mask 0x10 144 in_slct_norm = 0x10, /* ESP is arbitrating, normal selection */ 145 in_slct_stop = 0x11, /* ESP will select, then stop with IRQ */ 146 in_slct_msg = 0x12, /* select, then send a message */ 147 in_slct_tag = 0x13, /* select and send tagged queue msg */ 148 in_slct_sneg = 0x14, /* select and acquire sync capabilities */ 149 150 /* Any post selection activity. */ 151#define in_phases_mask 0x20 152 in_datain = 0x20, /* Data is transferring from the bus */ 153 in_dataout = 0x21, /* Data is transferring to the bus */ 154 in_data_done = 0x22, /* Last DMA data operation done (maybe) */ 155 in_msgin = 0x23, /* Eating message from target */ 156 in_msgincont = 0x24, /* Eating more msg bytes from target */ 157 in_msgindone = 0x25, /* Decide what to do with what we got */ 158 in_msgout = 0x26, /* Sending message to target */ 159 in_msgoutdone = 0x27, /* Done sending msg out */ 160 in_cmdbegin = 0x28, /* Sending cmd after abnormal selection */ 161 in_cmdend = 0x29, /* Done sending slow cmd */ 162 in_status = 0x2a, /* Was in status phase, finishing cmd */ 163 in_freeing = 0x2b, /* freeing the bus for cmd cmplt or disc */ 164 in_the_dark = 0x2c, /* Don't know what bus phase we are in */ 165 166 /* Special states, ie. not normal bus transitions... */ 167#define in_spec_mask 0x80 168 in_abortone = 0x80, /* Aborting one command currently */ 169 in_abortall = 0x81, /* Blowing away all commands we have */ 170 in_resetdev = 0x82, /* SCSI target reset in progress */ 171 in_resetbus = 0x83, /* SCSI bus reset in progress */ 172 in_tgterror = 0x84, /* Target did something stupid */ 173}; 174 175enum { 176 /* Zero has special meaning, see skipahead[12]. */ 177/*0*/ do_never, 178 179/*1*/ do_phase_determine, 180/*2*/ do_reset_bus, 181/*3*/ do_reset_complete, 182/*4*/ do_work_bus, 183/*5*/ do_intr_end 184}; 185 186/* Forward declarations. */ 187static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs); 188 189/* Debugging routines */ 190struct esp_cmdstrings { 191 u8 cmdchar; 192 char *text; 193} esp_cmd_strings[] = { 194 /* Miscellaneous */ 195 { ESP_CMD_NULL, "ESP_NOP", }, 196 { ESP_CMD_FLUSH, "FIFO_FLUSH", }, 197 { ESP_CMD_RC, "RSTESP", }, 198 { ESP_CMD_RS, "RSTSCSI", }, 199 /* Disconnected State Group */ 200 { ESP_CMD_RSEL, "RESLCTSEQ", }, 201 { ESP_CMD_SEL, "SLCTNATN", }, 202 { ESP_CMD_SELA, "SLCTATN", }, 203 { ESP_CMD_SELAS, "SLCTATNSTOP", }, 204 { ESP_CMD_ESEL, "ENSLCTRESEL", }, 205 { ESP_CMD_DSEL, "DISSELRESEL", }, 206 { ESP_CMD_SA3, "SLCTATN3", }, 207 { ESP_CMD_RSEL3, "RESLCTSEQ", }, 208 /* Target State Group */ 209 { ESP_CMD_SMSG, "SNDMSG", }, 210 { ESP_CMD_SSTAT, "SNDSTATUS", }, 211 { ESP_CMD_SDATA, "SNDDATA", }, 212 { ESP_CMD_DSEQ, "DISCSEQ", }, 213 { ESP_CMD_TSEQ, "TERMSEQ", }, 214 { ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", }, 215 { ESP_CMD_DCNCT, "DISC", }, 216 { ESP_CMD_RMSG, "RCVMSG", }, 217 { ESP_CMD_RCMD, "RCVCMD", }, 218 { ESP_CMD_RDATA, "RCVDATA", }, 219 { ESP_CMD_RCSEQ, "RCVCMDSEQ", }, 220 /* Initiator State Group */ 221 { ESP_CMD_TI, "TRANSINFO", }, 222 { ESP_CMD_ICCSEQ, "INICMDSEQCOMP", }, 223 { ESP_CMD_MOK, "MSGACCEPTED", }, 224 { ESP_CMD_TPAD, "TPAD", }, 225 { ESP_CMD_SATN, "SATN", }, 226 { ESP_CMD_RATN, "RATN", }, 227}; 228#define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings))) 229 230/* Print textual representation of an ESP command */ 231static inline void esp_print_cmd(u8 espcmd) 232{ 233 u8 dma_bit = espcmd & ESP_CMD_DMA; 234 int i; 235 236 espcmd &= ~dma_bit; 237 for (i = 0; i < NUM_ESP_COMMANDS; i++) 238 if (esp_cmd_strings[i].cmdchar == espcmd) 239 break; 240 if (i == NUM_ESP_COMMANDS) 241 printk("ESP_Unknown"); 242 else 243 printk("%s%s", esp_cmd_strings[i].text, 244 ((dma_bit) ? "+DMA" : "")); 245} 246 247/* Print the status register's value */ 248static inline void esp_print_statreg(u8 statreg) 249{ 250 u8 phase; 251 252 printk("STATUS<"); 253 phase = statreg & ESP_STAT_PMASK; 254 printk("%s,", (phase == ESP_DOP ? "DATA-OUT" : 255 (phase == ESP_DIP ? "DATA-IN" : 256 (phase == ESP_CMDP ? "COMMAND" : 257 (phase == ESP_STATP ? "STATUS" : 258 (phase == ESP_MOP ? "MSG-OUT" : 259 (phase == ESP_MIP ? "MSG_IN" : 260 "unknown"))))))); 261 if (statreg & ESP_STAT_TDONE) 262 printk("TRANS_DONE,"); 263 if (statreg & ESP_STAT_TCNT) 264 printk("TCOUNT_ZERO,"); 265 if (statreg & ESP_STAT_PERR) 266 printk("P_ERROR,"); 267 if (statreg & ESP_STAT_SPAM) 268 printk("SPAM,"); 269 if (statreg & ESP_STAT_INTR) 270 printk("IRQ,"); 271 printk(">"); 272} 273 274/* Print the interrupt register's value */ 275static inline void esp_print_ireg(u8 intreg) 276{ 277 printk("INTREG< "); 278 if (intreg & ESP_INTR_S) 279 printk("SLCT_NATN "); 280 if (intreg & ESP_INTR_SATN) 281 printk("SLCT_ATN "); 282 if (intreg & ESP_INTR_RSEL) 283 printk("RSLCT "); 284 if (intreg & ESP_INTR_FDONE) 285 printk("FDONE "); 286 if (intreg & ESP_INTR_BSERV) 287 printk("BSERV "); 288 if (intreg & ESP_INTR_DC) 289 printk("DISCNCT "); 290 if (intreg & ESP_INTR_IC) 291 printk("ILL_CMD "); 292 if (intreg & ESP_INTR_SR) 293 printk("SCSI_BUS_RESET "); 294 printk(">"); 295} 296 297/* Print the sequence step registers contents */ 298static inline void esp_print_seqreg(u8 stepreg) 299{ 300 stepreg &= ESP_STEP_VBITS; 301 printk("STEP<%s>", 302 (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" : 303 (stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" : 304 (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" : 305 (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" : 306 (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" : 307 "UNKNOWN")))))); 308} 309 310static char *phase_string(int phase) 311{ 312 switch (phase) { 313 case not_issued: 314 return "UNISSUED"; 315 case in_slct_norm: 316 return "SLCTNORM"; 317 case in_slct_stop: 318 return "SLCTSTOP"; 319 case in_slct_msg: 320 return "SLCTMSG"; 321 case in_slct_tag: 322 return "SLCTTAG"; 323 case in_slct_sneg: 324 return "SLCTSNEG"; 325 case in_datain: 326 return "DATAIN"; 327 case in_dataout: 328 return "DATAOUT"; 329 case in_data_done: 330 return "DATADONE"; 331 case in_msgin: 332 return "MSGIN"; 333 case in_msgincont: 334 return "MSGINCONT"; 335 case in_msgindone: 336 return "MSGINDONE"; 337 case in_msgout: 338 return "MSGOUT"; 339 case in_msgoutdone: 340 return "MSGOUTDONE"; 341 case in_cmdbegin: 342 return "CMDBEGIN"; 343 case in_cmdend: 344 return "CMDEND"; 345 case in_status: 346 return "STATUS"; 347 case in_freeing: 348 return "FREEING"; 349 case in_the_dark: 350 return "CLUELESS"; 351 case in_abortone: 352 return "ABORTONE"; 353 case in_abortall: 354 return "ABORTALL"; 355 case in_resetdev: 356 return "RESETDEV"; 357 case in_resetbus: 358 return "RESETBUS"; 359 case in_tgterror: 360 return "TGTERROR"; 361 default: 362 return "UNKNOWN"; 363 }; 364} 365 366#ifdef DEBUG_STATE_MACHINE 367static inline void esp_advance_phase(struct scsi_cmnd *s, int newphase) 368{ 369 ESPLOG(("<%s>", phase_string(newphase))); 370 s->SCp.sent_command = s->SCp.phase; 371 s->SCp.phase = newphase; 372} 373#else 374#define esp_advance_phase(__s, __newphase) \ 375 (__s)->SCp.sent_command = (__s)->SCp.phase; \ 376 (__s)->SCp.phase = (__newphase); 377#endif 378 379#ifdef DEBUG_ESP_CMDS 380static inline void esp_cmd(struct esp *esp, u8 cmd) 381{ 382 esp->espcmdlog[esp->espcmdent] = cmd; 383 esp->espcmdent = (esp->espcmdent + 1) & 31; 384 sbus_writeb(cmd, esp->eregs + ESP_CMD); 385} 386#else 387#define esp_cmd(__esp, __cmd) \ 388 sbus_writeb((__cmd), ((__esp)->eregs) + ESP_CMD) 389#endif 390 391#define ESP_INTSOFF(__dregs) \ 392 sbus_writel(sbus_readl((__dregs)+DMA_CSR)&~(DMA_INT_ENAB), (__dregs)+DMA_CSR) 393#define ESP_INTSON(__dregs) \ 394 sbus_writel(sbus_readl((__dregs)+DMA_CSR)|DMA_INT_ENAB, (__dregs)+DMA_CSR) 395#define ESP_IRQ_P(__dregs) \ 396 (sbus_readl((__dregs)+DMA_CSR) & (DMA_HNDL_INTR|DMA_HNDL_ERROR)) 397 398/* How we use the various Linux SCSI data structures for operation. 399 * 400 * struct scsi_cmnd: 401 * 402 * We keep track of the synchronous capabilities of a target 403 * in the device member, using sync_min_period and 404 * sync_max_offset. These are the values we directly write 405 * into the ESP registers while running a command. If offset 406 * is zero the ESP will use asynchronous transfers. 407 * If the borken flag is set we assume we shouldn't even bother 408 * trying to negotiate for synchronous transfer as this target 409 * is really stupid. If we notice the target is dropping the 410 * bus, and we have been allowing it to disconnect, we clear 411 * the disconnect flag. 412 */ 413 414 415/* Manipulation of the ESP command queues. Thanks to the aha152x driver 416 * and its author, Juergen E. Fischer, for the methods used here. 417 * Note that these are per-ESP queues, not global queues like 418 * the aha152x driver uses. 419 */ 420static inline void append_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC) 421{ 422 struct scsi_cmnd *end; 423 424 new_SC->host_scribble = (unsigned char *) NULL; 425 if (!*SC) 426 *SC = new_SC; 427 else { 428 for (end=*SC;end->host_scribble;end=(struct scsi_cmnd *)end->host_scribble) 429 ; 430 end->host_scribble = (unsigned char *) new_SC; 431 } 432} 433 434static inline void prepend_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC) 435{ 436 new_SC->host_scribble = (unsigned char *) *SC; 437 *SC = new_SC; 438} 439 440static inline struct scsi_cmnd *remove_first_SC(struct scsi_cmnd **SC) 441{ 442 struct scsi_cmnd *ptr; 443 ptr = *SC; 444 if (ptr) 445 *SC = (struct scsi_cmnd *) (*SC)->host_scribble; 446 return ptr; 447} 448 449static inline struct scsi_cmnd *remove_SC(struct scsi_cmnd **SC, int target, int lun) 450{ 451 struct scsi_cmnd *ptr, *prev; 452 453 for (ptr = *SC, prev = NULL; 454 ptr && ((ptr->device->id != target) || (ptr->device->lun != lun)); 455 prev = ptr, ptr = (struct scsi_cmnd *) ptr->host_scribble) 456 ; 457 if (ptr) { 458 if (prev) 459 prev->host_scribble=ptr->host_scribble; 460 else 461 *SC=(struct scsi_cmnd *)ptr->host_scribble; 462 } 463 return ptr; 464} 465 466/* Resetting various pieces of the ESP scsi driver chipset/buses. */ 467static void esp_reset_dma(struct esp *esp) 468{ 469 int can_do_burst16, can_do_burst32, can_do_burst64; 470 int can_do_sbus64; 471 u32 tmp; 472 473 can_do_burst16 = (esp->bursts & DMA_BURST16) != 0; 474 can_do_burst32 = (esp->bursts & DMA_BURST32) != 0; 475 can_do_burst64 = 0; 476 can_do_sbus64 = 0; 477 if (sbus_can_dma_64bit(esp->sdev)) 478 can_do_sbus64 = 1; 479 if (sbus_can_burst64(esp->sdev)) 480 can_do_burst64 = (esp->bursts & DMA_BURST64) != 0; 481 482 /* Punt the DVMA into a known state. */ 483 if (esp->dma->revision != dvmahme) { 484 tmp = sbus_readl(esp->dregs + DMA_CSR); 485 sbus_writel(tmp | DMA_RST_SCSI, esp->dregs + DMA_CSR); 486 sbus_writel(tmp & ~DMA_RST_SCSI, esp->dregs + DMA_CSR); 487 } 488 switch (esp->dma->revision) { 489 case dvmahme: 490 /* This is the HME DVMA gate array. */ 491 492 sbus_writel(DMA_RESET_FAS366, esp->dregs + DMA_CSR); 493 sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR); 494 495 esp->prev_hme_dmacsr = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB); 496 esp->prev_hme_dmacsr &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ); 497 498 if (can_do_burst64) 499 esp->prev_hme_dmacsr |= DMA_BRST64; 500 else if (can_do_burst32) 501 esp->prev_hme_dmacsr |= DMA_BRST32; 502 503 if (can_do_sbus64) { 504 esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64; 505 sbus_set_sbus64(esp->sdev, esp->bursts); 506 } 507 508 /* This chip is horrible. */ 509 while (sbus_readl(esp->dregs + DMA_CSR) & DMA_PEND_READ) 510 udelay(1); 511 512 sbus_writel(0, esp->dregs + DMA_CSR); 513 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR); 514 515 /* This is necessary to avoid having the SCSI channel 516 * engine lock up on us. 517 */ 518 sbus_writel(0, esp->dregs + DMA_ADDR); 519 520 break; 521 case dvmarev2: 522 /* This is the gate array found in the sun4m 523 * NCR SBUS I/O subsystem. 524 */ 525 if (esp->erev != esp100) { 526 tmp = sbus_readl(esp->dregs + DMA_CSR); 527 sbus_writel(tmp | DMA_3CLKS, esp->dregs + DMA_CSR); 528 } 529 break; 530 case dvmarev3: 531 tmp = sbus_readl(esp->dregs + DMA_CSR); 532 tmp &= ~DMA_3CLKS; 533 tmp |= DMA_2CLKS; 534 if (can_do_burst32) { 535 tmp &= ~DMA_BRST_SZ; 536 tmp |= DMA_BRST32; 537 } 538 sbus_writel(tmp, esp->dregs + DMA_CSR); 539 break; 540 case dvmaesc1: 541 /* This is the DMA unit found on SCSI/Ether cards. */ 542 tmp = sbus_readl(esp->dregs + DMA_CSR); 543 tmp |= DMA_ADD_ENABLE; 544 tmp &= ~DMA_BCNT_ENAB; 545 if (!can_do_burst32 && can_do_burst16) { 546 tmp |= DMA_ESC_BURST; 547 } else { 548 tmp &= ~(DMA_ESC_BURST); 549 } 550 sbus_writel(tmp, esp->dregs + DMA_CSR); 551 break; 552 default: 553 break; 554 }; 555 ESP_INTSON(esp->dregs); 556} 557 558/* Reset the ESP chip, _not_ the SCSI bus. */ 559static void __init esp_reset_esp(struct esp *esp) 560{ 561 u8 family_code, version; 562 int i; 563 564 /* Now reset the ESP chip */ 565 esp_cmd(esp, ESP_CMD_RC); 566 esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA); 567 esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA); 568 569 /* Reload the configuration registers */ 570 sbus_writeb(esp->cfact, esp->eregs + ESP_CFACT); 571 esp->prev_stp = 0; 572 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 573 esp->prev_soff = 0; 574 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 575 sbus_writeb(esp->neg_defp, esp->eregs + ESP_TIMEO); 576 577 /* This is the only point at which it is reliable to read 578 * the ID-code for a fast ESP chip variants. 579 */ 580 esp->max_period = ((35 * esp->ccycle) / 1000); 581 if (esp->erev == fast) { 582 version = sbus_readb(esp->eregs + ESP_UID); 583 family_code = (version & 0xf8) >> 3; 584 if (family_code == 0x02) 585 esp->erev = fas236; 586 else if (family_code == 0x0a) 587 esp->erev = fashme; /* Version is usually '5'. */ 588 else 589 esp->erev = fas100a; 590 ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n", 591 esp->esp_id, 592 (esp->erev == fas236) ? "fas236" : 593 ((esp->erev == fas100a) ? "fas100a" : 594 "fasHME"), family_code, (version & 7))); 595 596 esp->min_period = ((4 * esp->ccycle) / 1000); 597 } else { 598 esp->min_period = ((5 * esp->ccycle) / 1000); 599 } 600 esp->max_period = (esp->max_period + 3)>>2; 601 esp->min_period = (esp->min_period + 3)>>2; 602 603 sbus_writeb(esp->config1, esp->eregs + ESP_CFG1); 604 switch (esp->erev) { 605 case esp100: 606 /* nothing to do */ 607 break; 608 case esp100a: 609 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 610 break; 611 case esp236: 612 /* Slow 236 */ 613 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 614 esp->prev_cfg3 = esp->config3[0]; 615 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 616 break; 617 case fashme: 618 esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB); 619 /* fallthrough... */ 620 case fas236: 621 /* Fast 236 or HME */ 622 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 623 for (i = 0; i < 16; i++) { 624 if (esp->erev == fashme) { 625 u8 cfg3; 626 627 cfg3 = ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH; 628 if (esp->scsi_id >= 8) 629 cfg3 |= ESP_CONFIG3_IDBIT3; 630 esp->config3[i] |= cfg3; 631 } else { 632 esp->config3[i] |= ESP_CONFIG3_FCLK; 633 } 634 } 635 esp->prev_cfg3 = esp->config3[0]; 636 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 637 if (esp->erev == fashme) { 638 esp->radelay = 80; 639 } else { 640 if (esp->diff) 641 esp->radelay = 0; 642 else 643 esp->radelay = 96; 644 } 645 break; 646 case fas100a: 647 /* Fast 100a */ 648 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 649 for (i = 0; i < 16; i++) 650 esp->config3[i] |= ESP_CONFIG3_FCLOCK; 651 esp->prev_cfg3 = esp->config3[0]; 652 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 653 esp->radelay = 32; 654 break; 655 default: 656 panic("esp: what could it be... I wonder..."); 657 break; 658 }; 659 660 /* Eat any bitrot in the chip */ 661 sbus_readb(esp->eregs + ESP_INTRPT); 662 udelay(100); 663} 664 665/* This places the ESP into a known state at boot time. */ 666static void __init esp_bootup_reset(struct esp *esp) 667{ 668 u8 tmp; 669 670 /* Reset the DMA */ 671 esp_reset_dma(esp); 672 673 /* Reset the ESP */ 674 esp_reset_esp(esp); 675 676 /* Reset the SCSI bus, but tell ESP not to generate an irq */ 677 tmp = sbus_readb(esp->eregs + ESP_CFG1); 678 tmp |= ESP_CONFIG1_SRRDISAB; 679 sbus_writeb(tmp, esp->eregs + ESP_CFG1); 680 681 esp_cmd(esp, ESP_CMD_RS); 682 udelay(400); 683 684 sbus_writeb(esp->config1, esp->eregs + ESP_CFG1); 685 686 /* Eat any bitrot in the chip and we are done... */ 687 sbus_readb(esp->eregs + ESP_INTRPT); 688} 689 690static int __init esp_find_dvma(struct esp *esp, struct sbus_dev *dma_sdev) 691{ 692 struct sbus_dev *sdev = esp->sdev; 693 struct sbus_dma *dma; 694 695 if (dma_sdev != NULL) { 696 for_each_dvma(dma) { 697 if (dma->sdev == dma_sdev) 698 break; 699 } 700 } else { 701 for_each_dvma(dma) { 702 /* If allocated already, can't use it. */ 703 if (dma->allocated) 704 continue; 705 706 if (dma->sdev == NULL) 707 break; 708 709 /* If bus + slot are the same and it has the 710 * correct OBP name, it's ours. 711 */ 712 if (sdev->bus == dma->sdev->bus && 713 sdev->slot == dma->sdev->slot && 714 (!strcmp(dma->sdev->prom_name, "dma") || 715 !strcmp(dma->sdev->prom_name, "espdma"))) 716 break; 717 } 718 } 719 720 /* If we don't know how to handle the dvma, 721 * do not use this device. 722 */ 723 if (dma == NULL) { 724 printk("Cannot find dvma for ESP%d's SCSI\n", esp->esp_id); 725 return -1; 726 } 727 if (dma->allocated) { 728 printk("esp%d: can't use my espdma\n", esp->esp_id); 729 return -1; 730 } 731 dma->allocated = 1; 732 esp->dma = dma; 733 esp->dregs = dma->regs; 734 735 return 0; 736} 737 738static int __init esp_map_regs(struct esp *esp, int hme) 739{ 740 struct sbus_dev *sdev = esp->sdev; 741 struct resource *res; 742 743 /* On HME, two reg sets exist, first is DVMA, 744 * second is ESP registers. 745 */ 746 if (hme) 747 res = &sdev->resource[1]; 748 else 749 res = &sdev->resource[0]; 750 751 esp->eregs = sbus_ioremap(res, 0, ESP_REG_SIZE, "ESP Registers"); 752 753 if (esp->eregs == 0) 754 return -1; 755 return 0; 756} 757 758static int __init esp_map_cmdarea(struct esp *esp) 759{ 760 struct sbus_dev *sdev = esp->sdev; 761 762 esp->esp_command = sbus_alloc_consistent(sdev, 16, 763 &esp->esp_command_dvma); 764 if (esp->esp_command == NULL || 765 esp->esp_command_dvma == 0) 766 return -1; 767 return 0; 768} 769 770static int __init esp_register_irq(struct esp *esp) 771{ 772 esp->ehost->irq = esp->irq = esp->sdev->irqs[0]; 773 774 /* We used to try various overly-clever things to 775 * reduce the interrupt processing overhead on 776 * sun4c/sun4m when multiple ESP's shared the 777 * same IRQ. It was too complex and messy to 778 * sanely maintain. 779 */ 780 if (request_irq(esp->ehost->irq, esp_intr, 781 IRQF_SHARED, "ESP SCSI", esp)) { 782 printk("esp%d: Cannot acquire irq line\n", 783 esp->esp_id); 784 return -1; 785 } 786 787 printk("esp%d: IRQ %d ", esp->esp_id, 788 esp->ehost->irq); 789 790 return 0; 791} 792 793static void __init esp_get_scsi_id(struct esp *esp) 794{ 795 struct sbus_dev *sdev = esp->sdev; 796 struct device_node *dp = sdev->ofdev.node; 797 798 esp->scsi_id = of_getintprop_default(dp, 799 "initiator-id", 800 -1); 801 if (esp->scsi_id == -1) 802 esp->scsi_id = of_getintprop_default(dp, 803 "scsi-initiator-id", 804 -1); 805 if (esp->scsi_id == -1) 806 esp->scsi_id = (sdev->bus == NULL) ? 7 : 807 of_getintprop_default(sdev->bus->ofdev.node, 808 "scsi-initiator-id", 809 7); 810 esp->ehost->this_id = esp->scsi_id; 811 esp->scsi_id_mask = (1 << esp->scsi_id); 812 813} 814 815static void __init esp_get_clock_params(struct esp *esp) 816{ 817 struct sbus_dev *sdev = esp->sdev; 818 int prom_node = esp->prom_node; 819 int sbus_prom_node; 820 unsigned int fmhz; 821 u8 ccf; 822 823 if (sdev != NULL && sdev->bus != NULL) 824 sbus_prom_node = sdev->bus->prom_node; 825 else 826 sbus_prom_node = 0; 827 828 /* This is getting messy but it has to be done 829 * correctly or else you get weird behavior all 830 * over the place. We are trying to basically 831 * figure out three pieces of information. 832 * 833 * a) Clock Conversion Factor 834 * 835 * This is a representation of the input 836 * crystal clock frequency going into the 837 * ESP on this machine. Any operation whose 838 * timing is longer than 400ns depends on this 839 * value being correct. For example, you'll 840 * get blips for arbitration/selection during 841 * high load or with multiple targets if this 842 * is not set correctly. 843 * 844 * b) Selection Time-Out 845 * 846 * The ESP isn't very bright and will arbitrate 847 * for the bus and try to select a target 848 * forever if you let it. This value tells 849 * the ESP when it has taken too long to 850 * negotiate and that it should interrupt 851 * the CPU so we can see what happened. 852 * The value is computed as follows (from 853 * NCR/Symbios chip docs). 854 * 855 * (Time Out Period) * (Input Clock) 856 * STO = ---------------------------------- 857 * (8192) * (Clock Conversion Factor) 858 * 859 * You usually want the time out period to be 860 * around 250ms, I think we'll set it a little 861 * bit higher to account for fully loaded SCSI 862 * bus's and slow devices that don't respond so 863 * quickly to selection attempts. (yeah, I know 864 * this is out of spec. but there is a lot of 865 * buggy pieces of firmware out there so bite me) 866 * 867 * c) Imperical constants for synchronous offset 868 * and transfer period register values 869 * 870 * This entails the smallest and largest sync 871 * period we could ever handle on this ESP. 872 */ 873 874 fmhz = prom_getintdefault(prom_node, "clock-frequency", -1); 875 if (fmhz == -1) 876 fmhz = (!sbus_prom_node) ? 0 : 877 prom_getintdefault(sbus_prom_node, "clock-frequency", -1); 878 879 if (fmhz <= (5000000)) 880 ccf = 0; 881 else 882 ccf = (((5000000 - 1) + (fmhz))/(5000000)); 883 884 if (!ccf || ccf > 8) { 885 /* If we can't find anything reasonable, 886 * just assume 20MHZ. This is the clock 887 * frequency of the older sun4c's where I've 888 * been unable to find the clock-frequency 889 * PROM property. All other machines provide 890 * useful values it seems. 891 */ 892 ccf = ESP_CCF_F4; 893 fmhz = (20000000); 894 } 895 896 if (ccf == (ESP_CCF_F7 + 1)) 897 esp->cfact = ESP_CCF_F0; 898 else if (ccf == ESP_CCF_NEVER) 899 esp->cfact = ESP_CCF_F2; 900 else 901 esp->cfact = ccf; 902 esp->raw_cfact = ccf; 903 904 esp->cfreq = fmhz; 905 esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz); 906 esp->ctick = ESP_TICK(ccf, esp->ccycle); 907 esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf); 908 esp->sync_defp = SYNC_DEFP_SLOW; 909 910 printk("SCSI ID %d Clk %dMHz CCYC=%d CCF=%d TOut %d ", 911 esp->scsi_id, (fmhz / 1000000), 912 (int)esp->ccycle, (int)ccf, (int) esp->neg_defp); 913} 914 915static void __init esp_get_bursts(struct esp *esp, struct sbus_dev *dma) 916{ 917 struct sbus_dev *sdev = esp->sdev; 918 u8 bursts; 919 920 bursts = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff); 921 922 if (dma) { 923 u8 tmp = prom_getintdefault(dma->prom_node, 924 "burst-sizes", 0xff); 925 if (tmp != 0xff) 926 bursts &= tmp; 927 } 928 929 if (sdev->bus) { 930 u8 tmp = prom_getintdefault(sdev->bus->prom_node, 931 "burst-sizes", 0xff); 932 if (tmp != 0xff) 933 bursts &= tmp; 934 } 935 936 if (bursts == 0xff || 937 (bursts & DMA_BURST16) == 0 || 938 (bursts & DMA_BURST32) == 0) 939 bursts = (DMA_BURST32 - 1); 940 941 esp->bursts = bursts; 942} 943 944static void __init esp_get_revision(struct esp *esp) 945{ 946 u8 tmp; 947 948 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7)); 949 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY); 950 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 951 952 tmp = sbus_readb(esp->eregs + ESP_CFG2); 953 tmp &= ~ESP_CONFIG2_MAGIC; 954 if (tmp != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) { 955 /* If what we write to cfg2 does not come back, cfg2 956 * is not implemented, therefore this must be a plain 957 * esp100. 958 */ 959 esp->erev = esp100; 960 printk("NCR53C90(esp100)\n"); 961 } else { 962 esp->config2 = 0; 963 esp->prev_cfg3 = esp->config3[0] = 5; 964 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 965 sbus_writeb(0, esp->eregs + ESP_CFG3); 966 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 967 968 tmp = sbus_readb(esp->eregs + ESP_CFG3); 969 if (tmp != 5) { 970 /* The cfg2 register is implemented, however 971 * cfg3 is not, must be esp100a. 972 */ 973 esp->erev = esp100a; 974 printk("NCR53C90A(esp100a)\n"); 975 } else { 976 int target; 977 978 for (target = 0; target < 16; target++) 979 esp->config3[target] = 0; 980 esp->prev_cfg3 = 0; 981 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 982 983 /* All of cfg{1,2,3} implemented, must be one of 984 * the fas variants, figure out which one. 985 */ 986 if (esp->raw_cfact > ESP_CCF_F5) { 987 esp->erev = fast; 988 esp->sync_defp = SYNC_DEFP_FAST; 989 printk("NCR53C9XF(espfast)\n"); 990 } else { 991 esp->erev = esp236; 992 printk("NCR53C9x(esp236)\n"); 993 } 994 esp->config2 = 0; 995 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 996 } 997 } 998} 999 1000static void __init esp_init_swstate(struct esp *esp) 1001{ 1002 int i; 1003 1004 /* Command queues... */ 1005 esp->current_SC = NULL; 1006 esp->disconnected_SC = NULL; 1007 esp->issue_SC = NULL; 1008 1009 /* Target and current command state... */ 1010 esp->targets_present = 0; 1011 esp->resetting_bus = 0; 1012 esp->snip = 0; 1013 1014 init_waitqueue_head(&esp->reset_queue); 1015 1016 /* Debugging... */ 1017 for(i = 0; i < 32; i++) 1018 esp->espcmdlog[i] = 0; 1019 esp->espcmdent = 0; 1020 1021 /* MSG phase state... */ 1022 for(i = 0; i < 16; i++) { 1023 esp->cur_msgout[i] = 0; 1024 esp->cur_msgin[i] = 0; 1025 } 1026 esp->prevmsgout = esp->prevmsgin = 0; 1027 esp->msgout_len = esp->msgin_len = 0; 1028 1029 /* Clear the one behind caches to hold unmatchable values. */ 1030 esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff; 1031 esp->prev_hme_dmacsr = 0xffffffff; 1032} 1033 1034static int __init detect_one_esp(struct scsi_host_template *tpnt, 1035 struct device *dev, 1036 struct sbus_dev *esp_dev, 1037 struct sbus_dev *espdma, 1038 struct sbus_bus *sbus, 1039 int hme) 1040{ 1041 static int instance; 1042 struct Scsi_Host *esp_host = scsi_host_alloc(tpnt, sizeof(struct esp)); 1043 struct esp *esp; 1044 1045 if (!esp_host) 1046 return -ENOMEM; 1047 1048 if (hme) 1049 esp_host->max_id = 16; 1050 esp = (struct esp *) esp_host->hostdata; 1051 esp->ehost = esp_host; 1052 esp->sdev = esp_dev; 1053 esp->esp_id = instance; 1054 esp->prom_node = esp_dev->prom_node; 1055 prom_getstring(esp->prom_node, "name", esp->prom_name, 1056 sizeof(esp->prom_name)); 1057 1058 if (esp_find_dvma(esp, espdma) < 0) 1059 goto fail_unlink; 1060 if (esp_map_regs(esp, hme) < 0) { 1061 printk("ESP registers unmappable"); 1062 goto fail_dvma_release; 1063 } 1064 if (esp_map_cmdarea(esp) < 0) { 1065 printk("ESP DVMA transport area unmappable"); 1066 goto fail_unmap_regs; 1067 } 1068 if (esp_register_irq(esp) < 0) 1069 goto fail_unmap_cmdarea; 1070 1071 esp_get_scsi_id(esp); 1072 1073 esp->diff = prom_getbool(esp->prom_node, "differential"); 1074 if (esp->diff) 1075 printk("Differential "); 1076 1077 esp_get_clock_params(esp); 1078 esp_get_bursts(esp, espdma); 1079 esp_get_revision(esp); 1080 esp_init_swstate(esp); 1081 1082 esp_bootup_reset(esp); 1083 1084 if (scsi_add_host(esp_host, dev)) 1085 goto fail_free_irq; 1086 1087 dev_set_drvdata(&esp_dev->ofdev.dev, esp); 1088 1089 scsi_scan_host(esp_host); 1090 instance++; 1091 1092 return 0; 1093 1094fail_free_irq: 1095 free_irq(esp->ehost->irq, esp); 1096 1097fail_unmap_cmdarea: 1098 sbus_free_consistent(esp->sdev, 16, 1099 (void *) esp->esp_command, 1100 esp->esp_command_dvma); 1101 1102fail_unmap_regs: 1103 sbus_iounmap(esp->eregs, ESP_REG_SIZE); 1104 1105fail_dvma_release: 1106 esp->dma->allocated = 0; 1107 1108fail_unlink: 1109 scsi_host_put(esp_host); 1110 return -1; 1111} 1112 1113/* Detecting ESP chips on the machine. This is the simple and easy 1114 * version. 1115 */ 1116static int __devexit esp_remove_common(struct esp *esp) 1117{ 1118 unsigned int irq = esp->ehost->irq; 1119 1120 scsi_remove_host(esp->ehost); 1121 1122 ESP_INTSOFF(esp->dregs); 1123#if 0 1124 esp_reset_dma(esp); 1125 esp_reset_esp(esp); 1126#endif 1127 1128 free_irq(irq, esp); 1129 sbus_free_consistent(esp->sdev, 16, 1130 (void *) esp->esp_command, esp->esp_command_dvma); 1131 sbus_iounmap(esp->eregs, ESP_REG_SIZE); 1132 esp->dma->allocated = 0; 1133 1134 scsi_host_put(esp->ehost); 1135 1136 return 0; 1137} 1138 1139 1140#ifdef CONFIG_SUN4 1141 1142#include <asm/sun4paddr.h> 1143 1144static struct sbus_dev sun4_esp_dev; 1145 1146static int __init esp_sun4_probe(struct scsi_host_template *tpnt) 1147{ 1148 if (sun4_esp_physaddr) { 1149 memset(&sun4_esp_dev, 0, sizeof(sun4_esp_dev)); 1150 sun4_esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr; 1151 sun4_esp_dev.irqs[0] = 4; 1152 sun4_esp_dev.resource[0].start = sun4_esp_physaddr; 1153 sun4_esp_dev.resource[0].end = 1154 sun4_esp_physaddr + ESP_REG_SIZE - 1; 1155 sun4_esp_dev.resource[0].flags = IORESOURCE_IO; 1156 1157 return detect_one_esp(tpnt, NULL, 1158 &sun4_esp_dev, NULL, NULL, 0); 1159 } 1160 return 0; 1161} 1162 1163static int __devexit esp_sun4_remove(void) 1164{ 1165 struct of_device *dev = &sun4_esp_dev.ofdev; 1166 struct esp *esp = dev_get_drvdata(&dev->dev); 1167 1168 return esp_remove_common(esp); 1169} 1170 1171#else /* !CONFIG_SUN4 */ 1172 1173static int __devinit esp_sbus_probe(struct of_device *dev, const struct of_device_id *match) 1174{ 1175 struct sbus_dev *sdev = to_sbus_device(&dev->dev); 1176 struct device_node *dp = dev->node; 1177 struct sbus_dev *dma_sdev = NULL; 1178 int hme = 0; 1179 1180 if (dp->parent && 1181 (!strcmp(dp->parent->name, "espdma") || 1182 !strcmp(dp->parent->name, "dma"))) 1183 dma_sdev = sdev->parent; 1184 else if (!strcmp(dp->name, "SUNW,fas")) { 1185 dma_sdev = sdev; 1186 hme = 1; 1187 } 1188 1189 return detect_one_esp(match->data, &dev->dev, 1190 sdev, dma_sdev, sdev->bus, hme); 1191} 1192 1193static int __devexit esp_sbus_remove(struct of_device *dev) 1194{ 1195 struct esp *esp = dev_get_drvdata(&dev->dev); 1196 1197 return esp_remove_common(esp); 1198} 1199 1200#endif /* !CONFIG_SUN4 */ 1201 1202/* The info function will return whatever useful 1203 * information the developer sees fit. If not provided, then 1204 * the name field will be used instead. 1205 */ 1206static const char *esp_info(struct Scsi_Host *host) 1207{ 1208 struct esp *esp; 1209 1210 esp = (struct esp *) host->hostdata; 1211 switch (esp->erev) { 1212 case esp100: 1213 return "Sparc ESP100 (NCR53C90)"; 1214 case esp100a: 1215 return "Sparc ESP100A (NCR53C90A)"; 1216 case esp236: 1217 return "Sparc ESP236"; 1218 case fas236: 1219 return "Sparc ESP236-FAST"; 1220 case fashme: 1221 return "Sparc ESP366-HME"; 1222 case fas100a: 1223 return "Sparc ESP100A-FAST"; 1224 default: 1225 return "Bogon ESP revision"; 1226 }; 1227} 1228 1229/* From Wolfgang Stanglmeier's NCR scsi driver. */ 1230struct info_str 1231{ 1232 char *buffer; 1233 int length; 1234 int offset; 1235 int pos; 1236}; 1237 1238static void copy_mem_info(struct info_str *info, char *data, int len) 1239{ 1240 if (info->pos + len > info->length) 1241 len = info->length - info->pos; 1242 1243 if (info->pos + len < info->offset) { 1244 info->pos += len; 1245 return; 1246 } 1247 if (info->pos < info->offset) { 1248 data += (info->offset - info->pos); 1249 len -= (info->offset - info->pos); 1250 } 1251 1252 if (len > 0) { 1253 memcpy(info->buffer + info->pos, data, len); 1254 info->pos += len; 1255 } 1256} 1257 1258static int copy_info(struct info_str *info, char *fmt, ...) 1259{ 1260 va_list args; 1261 char buf[81]; 1262 int len; 1263 1264 va_start(args, fmt); 1265 len = vsprintf(buf, fmt, args); 1266 va_end(args); 1267 1268 copy_mem_info(info, buf, len); 1269 return len; 1270} 1271 1272static int esp_host_info(struct esp *esp, char *ptr, off_t offset, int len) 1273{ 1274 struct scsi_device *sdev; 1275 struct info_str info; 1276 int i; 1277 1278 info.buffer = ptr; 1279 info.length = len; 1280 info.offset = offset; 1281 info.pos = 0; 1282 1283 copy_info(&info, "Sparc ESP Host Adapter:\n"); 1284 copy_info(&info, "\tPROM node\t\t%08x\n", (unsigned int) esp->prom_node); 1285 copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name); 1286 copy_info(&info, "\tESP Model\t\t"); 1287 switch (esp->erev) { 1288 case esp100: 1289 copy_info(&info, "ESP100\n"); 1290 break; 1291 case esp100a: 1292 copy_info(&info, "ESP100A\n"); 1293 break; 1294 case esp236: 1295 copy_info(&info, "ESP236\n"); 1296 break; 1297 case fas236: 1298 copy_info(&info, "FAS236\n"); 1299 break; 1300 case fas100a: 1301 copy_info(&info, "FAS100A\n"); 1302 break; 1303 case fast: 1304 copy_info(&info, "FAST\n"); 1305 break; 1306 case fashme: 1307 copy_info(&info, "Happy Meal FAS\n"); 1308 break; 1309 case espunknown: 1310 default: 1311 copy_info(&info, "Unknown!\n"); 1312 break; 1313 }; 1314 copy_info(&info, "\tDMA Revision\t\t"); 1315 switch (esp->dma->revision) { 1316 case dvmarev0: 1317 copy_info(&info, "Rev 0\n"); 1318 break; 1319 case dvmaesc1: 1320 copy_info(&info, "ESC Rev 1\n"); 1321 break; 1322 case dvmarev1: 1323 copy_info(&info, "Rev 1\n"); 1324 break; 1325 case dvmarev2: 1326 copy_info(&info, "Rev 2\n"); 1327 break; 1328 case dvmarev3: 1329 copy_info(&info, "Rev 3\n"); 1330 break; 1331 case dvmarevplus: 1332 copy_info(&info, "Rev 1+\n"); 1333 break; 1334 case dvmahme: 1335 copy_info(&info, "Rev HME/FAS\n"); 1336 break; 1337 default: 1338 copy_info(&info, "Unknown!\n"); 1339 break; 1340 }; 1341 copy_info(&info, "\tLive Targets\t\t[ "); 1342 for (i = 0; i < 15; i++) { 1343 if (esp->targets_present & (1 << i)) 1344 copy_info(&info, "%d ", i); 1345 } 1346 copy_info(&info, "]\n\n"); 1347 1348 /* Now describe the state of each existing target. */ 1349 copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n"); 1350 1351 shost_for_each_device(sdev, esp->ehost) { 1352 struct esp_device *esp_dev = sdev->hostdata; 1353 uint id = sdev->id; 1354 1355 if (!(esp->targets_present & (1 << id))) 1356 continue; 1357 1358 copy_info(&info, "%d\t\t", id); 1359 copy_info(&info, "%08lx\t", esp->config3[id]); 1360 copy_info(&info, "[%02lx,%02lx]\t\t\t", 1361 esp_dev->sync_max_offset, 1362 esp_dev->sync_min_period); 1363 copy_info(&info, "%s\t\t", 1364 esp_dev->disconnect ? "yes" : "no"); 1365 copy_info(&info, "%s\n", 1366 (esp->config3[id] & ESP_CONFIG3_EWIDE) ? "yes" : "no"); 1367 } 1368 return info.pos > info.offset? info.pos - info.offset : 0; 1369} 1370 1371/* ESP proc filesystem code. */ 1372static int esp_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset, 1373 int length, int inout) 1374{ 1375 struct esp *esp = (struct esp *) host->hostdata; 1376 1377 if (inout) 1378 return -EINVAL; /* not yet */ 1379 1380 if (start) 1381 *start = buffer; 1382 1383 return esp_host_info(esp, buffer, offset, length); 1384} 1385 1386static void esp_get_dmabufs(struct esp *esp, struct scsi_cmnd *sp) 1387{ 1388 if (sp->use_sg == 0) { 1389 sp->SCp.this_residual = sp->request_bufflen; 1390 sp->SCp.buffer = (struct scatterlist *) sp->request_buffer; 1391 sp->SCp.buffers_residual = 0; 1392 if (sp->request_bufflen) { 1393 sp->SCp.have_data_in = sbus_map_single(esp->sdev, sp->SCp.buffer, 1394 sp->SCp.this_residual, 1395 sp->sc_data_direction); 1396 sp->SCp.ptr = (char *) ((unsigned long)sp->SCp.have_data_in); 1397 } else { 1398 sp->SCp.ptr = NULL; 1399 } 1400 } else { 1401 sp->SCp.buffer = (struct scatterlist *) sp->request_buffer; 1402 sp->SCp.buffers_residual = sbus_map_sg(esp->sdev, 1403 sp->SCp.buffer, 1404 sp->use_sg, 1405 sp->sc_data_direction); 1406 sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer); 1407 sp->SCp.ptr = (char *) ((unsigned long)sg_dma_address(sp->SCp.buffer)); 1408 } 1409} 1410 1411static void esp_release_dmabufs(struct esp *esp, struct scsi_cmnd *sp) 1412{ 1413 if (sp->use_sg) { 1414 sbus_unmap_sg(esp->sdev, sp->request_buffer, sp->use_sg, 1415 sp->sc_data_direction); 1416 } else if (sp->request_bufflen) { 1417 sbus_unmap_single(esp->sdev, 1418 sp->SCp.have_data_in, 1419 sp->request_bufflen, 1420 sp->sc_data_direction); 1421 } 1422} 1423 1424static void esp_restore_pointers(struct esp *esp, struct scsi_cmnd *sp) 1425{ 1426 struct esp_pointers *ep = &esp->data_pointers[sp->device->id]; 1427 1428 sp->SCp.ptr = ep->saved_ptr; 1429 sp->SCp.buffer = ep->saved_buffer; 1430 sp->SCp.this_residual = ep->saved_this_residual; 1431 sp->SCp.buffers_residual = ep->saved_buffers_residual; 1432} 1433 1434static void esp_save_pointers(struct esp *esp, struct scsi_cmnd *sp) 1435{ 1436 struct esp_pointers *ep = &esp->data_pointers[sp->device->id]; 1437 1438 ep->saved_ptr = sp->SCp.ptr; 1439 ep->saved_buffer = sp->SCp.buffer; 1440 ep->saved_this_residual = sp->SCp.this_residual; 1441 ep->saved_buffers_residual = sp->SCp.buffers_residual; 1442} 1443 1444/* Some rules: 1445 * 1446 * 1) Never ever panic while something is live on the bus. 1447 * If there is to be any chance of syncing the disks this 1448 * rule is to be obeyed. 1449 * 1450 * 2) Any target that causes a foul condition will no longer 1451 * have synchronous transfers done to it, no questions 1452 * asked. 1453 * 1454 * 3) Keep register accesses to a minimum. Think about some 1455 * day when we have Xbus machines this is running on and 1456 * the ESP chip is on the other end of the machine on a 1457 * different board from the cpu where this is running. 1458 */ 1459 1460/* Fire off a command. We assume the bus is free and that the only 1461 * case where we could see an interrupt is where we have disconnected 1462 * commands active and they are trying to reselect us. 1463 */ 1464static inline void esp_check_cmd(struct esp *esp, struct scsi_cmnd *sp) 1465{ 1466 switch (sp->cmd_len) { 1467 case 6: 1468 case 10: 1469 case 12: 1470 esp->esp_slowcmd = 0; 1471 break; 1472 1473 default: 1474 esp->esp_slowcmd = 1; 1475 esp->esp_scmdleft = sp->cmd_len; 1476 esp->esp_scmdp = &sp->cmnd[0]; 1477 break; 1478 }; 1479} 1480 1481static inline void build_sync_nego_msg(struct esp *esp, int period, int offset) 1482{ 1483 esp->cur_msgout[0] = EXTENDED_MESSAGE; 1484 esp->cur_msgout[1] = 3; 1485 esp->cur_msgout[2] = EXTENDED_SDTR; 1486 esp->cur_msgout[3] = period; 1487 esp->cur_msgout[4] = offset; 1488 esp->msgout_len = 5; 1489} 1490 1491/* SIZE is in bits, currently HME only supports 16 bit wide transfers. */ 1492static inline void build_wide_nego_msg(struct esp *esp, int size) 1493{ 1494 esp->cur_msgout[0] = EXTENDED_MESSAGE; 1495 esp->cur_msgout[1] = 2; 1496 esp->cur_msgout[2] = EXTENDED_WDTR; 1497 switch (size) { 1498 case 32: 1499 esp->cur_msgout[3] = 2; 1500 break; 1501 case 16: 1502 esp->cur_msgout[3] = 1; 1503 break; 1504 case 8: 1505 default: 1506 esp->cur_msgout[3] = 0; 1507 break; 1508 }; 1509 1510 esp->msgout_len = 4; 1511} 1512 1513static void esp_exec_cmd(struct esp *esp) 1514{ 1515 struct scsi_cmnd *SCptr; 1516 struct scsi_device *SDptr; 1517 struct esp_device *esp_dev; 1518 volatile u8 *cmdp = esp->esp_command; 1519 u8 the_esp_command; 1520 int lun, target; 1521 int i; 1522 1523 /* Hold off if we have disconnected commands and 1524 * an IRQ is showing... 1525 */ 1526 if (esp->disconnected_SC && ESP_IRQ_P(esp->dregs)) 1527 return; 1528 1529 /* Grab first member of the issue queue. */ 1530 SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC); 1531 1532 /* Safe to panic here because current_SC is null. */ 1533 if (!SCptr) 1534 panic("esp: esp_exec_cmd and issue queue is NULL"); 1535 1536 SDptr = SCptr->device; 1537 esp_dev = SDptr->hostdata; 1538 lun = SCptr->device->lun; 1539 target = SCptr->device->id; 1540 1541 esp->snip = 0; 1542 esp->msgout_len = 0; 1543 1544 /* Send it out whole, or piece by piece? The ESP 1545 * only knows how to automatically send out 6, 10, 1546 * and 12 byte commands. I used to think that the 1547 * Linux SCSI code would never throw anything other 1548 * than that to us, but then again there is the 1549 * SCSI generic driver which can send us anything. 1550 */ 1551 esp_check_cmd(esp, SCptr); 1552 1553 /* If arbitration/selection is successful, the ESP will leave 1554 * ATN asserted, causing the target to go into message out 1555 * phase. The ESP will feed the target the identify and then 1556 * the target can only legally go to one of command, 1557 * datain/out, status, or message in phase, or stay in message 1558 * out phase (should we be trying to send a sync negotiation 1559 * message after the identify). It is not allowed to drop 1560 * BSY, but some buggy targets do and we check for this 1561 * condition in the selection complete code. Most of the time 1562 * we'll make the command bytes available to the ESP and it 1563 * will not interrupt us until it finishes command phase, we 1564 * cannot do this for command sizes the ESP does not 1565 * understand and in this case we'll get interrupted right 1566 * when the target goes into command phase. 1567 * 1568 * It is absolutely _illegal_ in the presence of SCSI-2 devices 1569 * to use the ESP select w/o ATN command. When SCSI-2 devices are 1570 * present on the bus we _must_ always go straight to message out 1571 * phase with an identify message for the target. Being that 1572 * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2 1573 * selections should not confuse SCSI-1 we hope. 1574 */ 1575 1576 if (esp_dev->sync) { 1577 /* this targets sync is known */ 1578#ifndef __sparc_v9__ 1579do_sync_known: 1580#endif 1581 if (esp_dev->disconnect) 1582 *cmdp++ = IDENTIFY(1, lun); 1583 else 1584 *cmdp++ = IDENTIFY(0, lun); 1585 1586 if (esp->esp_slowcmd) { 1587 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA); 1588 esp_advance_phase(SCptr, in_slct_stop); 1589 } else { 1590 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA); 1591 esp_advance_phase(SCptr, in_slct_norm); 1592 } 1593 } else if (!(esp->targets_present & (1<<target)) || !(esp_dev->disconnect)) { 1594 /* After the bootup SCSI code sends both the 1595 * TEST_UNIT_READY and INQUIRY commands we want 1596 * to at least attempt allowing the device to 1597 * disconnect. 1598 */ 1599 ESPMISC(("esp: Selecting device for first time. target=%d " 1600 "lun=%d\n", target, SCptr->device->lun)); 1601 if (!SDptr->borken && !esp_dev->disconnect) 1602 esp_dev->disconnect = 1; 1603 1604 *cmdp++ = IDENTIFY(0, lun); 1605 esp->prevmsgout = NOP; 1606 esp_advance_phase(SCptr, in_slct_norm); 1607 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA); 1608 1609 /* Take no chances... */ 1610 esp_dev->sync_max_offset = 0; 1611 esp_dev->sync_min_period = 0; 1612 } else { 1613 /* Sorry, I have had way too many problems with 1614 * various CDROM devices on ESP. -DaveM 1615 */ 1616 int cdrom_hwbug_wkaround = 0; 1617 1618#ifndef __sparc_v9__ 1619 /* Never allow disconnects or synchronous transfers on 1620 * SparcStation1 and SparcStation1+. Allowing those 1621 * to be enabled seems to lockup the machine completely. 1622 */ 1623 if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) || 1624 (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) { 1625 /* But we are nice and allow tapes and removable 1626 * disks (but not CDROMs) to disconnect. 1627 */ 1628 if(SDptr->type == TYPE_TAPE || 1629 (SDptr->type != TYPE_ROM && SDptr->removable)) 1630 esp_dev->disconnect = 1; 1631 else 1632 esp_dev->disconnect = 0; 1633 esp_dev->sync_max_offset = 0; 1634 esp_dev->sync_min_period = 0; 1635 esp_dev->sync = 1; 1636 esp->snip = 0; 1637 goto do_sync_known; 1638 } 1639#endif /* !(__sparc_v9__) */ 1640 1641 /* We've talked to this guy before, 1642 * but never negotiated. Let's try, 1643 * need to attempt WIDE first, before 1644 * sync nego, as per SCSI 2 standard. 1645 */ 1646 if (esp->erev == fashme && !esp_dev->wide) { 1647 if (!SDptr->borken && 1648 SDptr->type != TYPE_ROM && 1649 SDptr->removable == 0) { 1650 build_wide_nego_msg(esp, 16); 1651 esp_dev->wide = 1; 1652 esp->wnip = 1; 1653 goto after_nego_msg_built; 1654 } else { 1655 esp_dev->wide = 1; 1656 /* Fall through and try sync. */ 1657 } 1658 } 1659 1660 if (!SDptr->borken) { 1661 if ((SDptr->type == TYPE_ROM)) { 1662 /* Nice try sucker... */ 1663 ESPMISC(("esp%d: Disabling sync for buggy " 1664 "CDROM.\n", esp->esp_id)); 1665 cdrom_hwbug_wkaround = 1; 1666 build_sync_nego_msg(esp, 0, 0); 1667 } else if (SDptr->removable != 0) { 1668 ESPMISC(("esp%d: Not negotiating sync/wide but " 1669 "allowing disconnect for removable media.\n", 1670 esp->esp_id)); 1671 build_sync_nego_msg(esp, 0, 0); 1672 } else { 1673 build_sync_nego_msg(esp, esp->sync_defp, 15); 1674 } 1675 } else { 1676 build_sync_nego_msg(esp, 0, 0); 1677 } 1678 esp_dev->sync = 1; 1679 esp->snip = 1; 1680 1681after_nego_msg_built: 1682 /* A fix for broken SCSI1 targets, when they disconnect 1683 * they lock up the bus and confuse ESP. So disallow 1684 * disconnects for SCSI1 targets for now until we 1685 * find a better fix. 1686 * 1687 * Addendum: This is funny, I figured out what was going 1688 * on. The blotzed SCSI1 target would disconnect, 1689 * one of the other SCSI2 targets or both would be 1690 * disconnected as well. The SCSI1 target would 1691 * stay disconnected long enough that we start 1692 * up a command on one of the SCSI2 targets. As 1693 * the ESP is arbitrating for the bus the SCSI1 1694 * target begins to arbitrate as well to reselect 1695 * the ESP. The SCSI1 target refuses to drop it's 1696 * ID bit on the data bus even though the ESP is 1697 * at ID 7 and is the obvious winner for any 1698 * arbitration. The ESP is a poor sport and refuses 1699 * to lose arbitration, it will continue indefinitely 1700 * trying to arbitrate for the bus and can only be 1701 * stopped via a chip reset or SCSI bus reset. 1702 * Therefore _no_ disconnects for SCSI1 targets 1703 * thank you very much. ;-) 1704 */ 1705 if(((SDptr->scsi_level < 3) && 1706 (SDptr->type != TYPE_TAPE) && 1707 SDptr->removable == 0) || 1708 cdrom_hwbug_wkaround || SDptr->borken) { 1709 ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d " 1710 "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun)); 1711 esp_dev->disconnect = 0; 1712 *cmdp++ = IDENTIFY(0, lun); 1713 } else { 1714 *cmdp++ = IDENTIFY(1, lun); 1715 } 1716 1717 /* ESP fifo is only so big... 1718 * Make this look like a slow command. 1719 */ 1720 esp->esp_slowcmd = 1; 1721 esp->esp_scmdleft = SCptr->cmd_len; 1722 esp->esp_scmdp = &SCptr->cmnd[0]; 1723 1724 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA); 1725 esp_advance_phase(SCptr, in_slct_msg); 1726 } 1727 1728 if (!esp->esp_slowcmd) 1729 for (i = 0; i < SCptr->cmd_len; i++) 1730 *cmdp++ = SCptr->cmnd[i]; 1731 1732 /* HME sucks... */ 1733 if (esp->erev == fashme) 1734 sbus_writeb((target & 0xf) | (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT), 1735 esp->eregs + ESP_BUSID); 1736 else 1737 sbus_writeb(target & 7, esp->eregs + ESP_BUSID); 1738 if (esp->prev_soff != esp_dev->sync_max_offset || 1739 esp->prev_stp != esp_dev->sync_min_period || 1740 (esp->erev > esp100a && 1741 esp->prev_cfg3 != esp->config3[target])) { 1742 esp->prev_soff = esp_dev->sync_max_offset; 1743 esp->prev_stp = esp_dev->sync_min_period; 1744 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 1745 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 1746 if (esp->erev > esp100a) { 1747 esp->prev_cfg3 = esp->config3[target]; 1748 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 1749 } 1750 } 1751 i = (cmdp - esp->esp_command); 1752 1753 if (esp->erev == fashme) { 1754 esp_cmd(esp, ESP_CMD_FLUSH); /* Grrr! */ 1755 1756 /* Set up the DMA and HME counters */ 1757 sbus_writeb(i, esp->eregs + ESP_TCLOW); 1758 sbus_writeb(0, esp->eregs + ESP_TCMED); 1759 sbus_writeb(0, esp->eregs + FAS_RLO); 1760 sbus_writeb(0, esp->eregs + FAS_RHI); 1761 esp_cmd(esp, the_esp_command); 1762 1763 /* Talk about touchy hardware... */ 1764 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr | 1765 (DMA_SCSI_DISAB | DMA_ENABLE)) & 1766 ~(DMA_ST_WRITE)); 1767 sbus_writel(16, esp->dregs + DMA_COUNT); 1768 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR); 1769 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR); 1770 } else { 1771 u32 tmp; 1772 1773 /* Set up the DMA and ESP counters */ 1774 sbus_writeb(i, esp->eregs + ESP_TCLOW); 1775 sbus_writeb(0, esp->eregs + ESP_TCMED); 1776 tmp = sbus_readl(esp->dregs + DMA_CSR); 1777 tmp &= ~DMA_ST_WRITE; 1778 tmp |= DMA_ENABLE; 1779 sbus_writel(tmp, esp->dregs + DMA_CSR); 1780 if (esp->dma->revision == dvmaesc1) { 1781 if (i) /* Workaround ESC gate array SBUS rerun bug. */ 1782 sbus_writel(PAGE_SIZE, esp->dregs + DMA_COUNT); 1783 } 1784 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR); 1785 1786 /* Tell ESP to "go". */ 1787 esp_cmd(esp, the_esp_command); 1788 } 1789} 1790 1791/* Queue a SCSI command delivered from the mid-level Linux SCSI code. */ 1792static int esp_queue(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) 1793{ 1794 struct esp *esp; 1795 1796 /* Set up func ptr and initial driver cmd-phase. */ 1797 SCpnt->scsi_done = done; 1798 SCpnt->SCp.phase = not_issued; 1799 1800 /* We use the scratch area. */ 1801 ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->device->id, SCpnt->device->lun)); 1802 ESPDISC(("N<%02x,%02x>", SCpnt->device->id, SCpnt->device->lun)); 1803 1804 esp = (struct esp *) SCpnt->device->host->hostdata; 1805 esp_get_dmabufs(esp, SCpnt); 1806 esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */ 1807 1808 SCpnt->SCp.Status = CHECK_CONDITION; 1809 SCpnt->SCp.Message = 0xff; 1810 SCpnt->SCp.sent_command = 0; 1811 1812 /* Place into our queue. */ 1813 if (SCpnt->cmnd[0] == REQUEST_SENSE) { 1814 ESPQUEUE(("RQSENSE\n")); 1815 prepend_SC(&esp->issue_SC, SCpnt); 1816 } else { 1817 ESPQUEUE(("\n")); 1818 append_SC(&esp->issue_SC, SCpnt); 1819 } 1820 1821 /* Run it now if we can. */ 1822 if (!esp->current_SC && !esp->resetting_bus) 1823 esp_exec_cmd(esp); 1824 1825 return 0; 1826} 1827 1828/* Dump driver state. */ 1829static void esp_dump_cmd(struct scsi_cmnd *SCptr) 1830{ 1831 ESPLOG(("[tgt<%02x> lun<%02x> " 1832 "pphase<%s> cphase<%s>]", 1833 SCptr->device->id, SCptr->device->lun, 1834 phase_string(SCptr->SCp.sent_command), 1835 phase_string(SCptr->SCp.phase))); 1836} 1837 1838static void esp_dump_state(struct esp *esp) 1839{ 1840 struct scsi_cmnd *SCptr = esp->current_SC; 1841#ifdef DEBUG_ESP_CMDS 1842 int i; 1843#endif 1844 1845 ESPLOG(("esp%d: dumping state\n", esp->esp_id)); 1846 ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n", 1847 esp->esp_id, 1848 sbus_readl(esp->dregs + DMA_CSR), 1849 sbus_readl(esp->dregs + DMA_ADDR))); 1850 ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n", 1851 esp->esp_id, esp->sreg, esp->seqreg, esp->ireg)); 1852 ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n", 1853 esp->esp_id, 1854 sbus_readb(esp->eregs + ESP_STATUS), 1855 sbus_readb(esp->eregs + ESP_SSTEP), 1856 sbus_readb(esp->eregs + ESP_INTRPT))); 1857#ifdef DEBUG_ESP_CMDS 1858 printk("esp%d: last ESP cmds [", esp->esp_id); 1859 i = (esp->espcmdent - 1) & 31; 1860 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">"); 1861 i = (i - 1) & 31; 1862 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">"); 1863 i = (i - 1) & 31; 1864 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">"); 1865 i = (i - 1) & 31; 1866 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">"); 1867 printk("]\n"); 1868#endif /* (DEBUG_ESP_CMDS) */ 1869 1870 if (SCptr) { 1871 ESPLOG(("esp%d: current command ", esp->esp_id)); 1872 esp_dump_cmd(SCptr); 1873 } 1874 ESPLOG(("\n")); 1875 SCptr = esp->disconnected_SC; 1876 ESPLOG(("esp%d: disconnected ", esp->esp_id)); 1877 while (SCptr) { 1878 esp_dump_cmd(SCptr); 1879 SCptr = (struct scsi_cmnd *) SCptr->host_scribble; 1880 } 1881 ESPLOG(("\n")); 1882} 1883 1884/* Abort a command. The host_lock is acquired by caller. */ 1885static int esp_abort(struct scsi_cmnd *SCptr) 1886{ 1887 struct esp *esp = (struct esp *) SCptr->device->host->hostdata; 1888 int don; 1889 1890 ESPLOG(("esp%d: Aborting command\n", esp->esp_id)); 1891 esp_dump_state(esp); 1892 1893 /* Wheee, if this is the current command on the bus, the 1894 * best we can do is assert ATN and wait for msgout phase. 1895 * This should even fix a hung SCSI bus when we lose state 1896 * in the driver and timeout because the eventual phase change 1897 * will cause the ESP to (eventually) give an interrupt. 1898 */ 1899 if (esp->current_SC == SCptr) { 1900 esp->cur_msgout[0] = ABORT; 1901 esp->msgout_len = 1; 1902 esp->msgout_ctr = 0; 1903 esp_cmd(esp, ESP_CMD_SATN); 1904 return SUCCESS; 1905 } 1906 1907 /* If it is still in the issue queue then we can safely 1908 * call the completion routine and report abort success. 1909 */ 1910 don = (sbus_readl(esp->dregs + DMA_CSR) & DMA_INT_ENAB); 1911 if (don) { 1912 ESP_INTSOFF(esp->dregs); 1913 } 1914 if (esp->issue_SC) { 1915 struct scsi_cmnd **prev, *this; 1916 for (prev = (&esp->issue_SC), this = esp->issue_SC; 1917 this != NULL; 1918 prev = (struct scsi_cmnd **) &(this->host_scribble), 1919 this = (struct scsi_cmnd *) this->host_scribble) { 1920 1921 if (this == SCptr) { 1922 *prev = (struct scsi_cmnd *) this->host_scribble; 1923 this->host_scribble = NULL; 1924 1925 esp_release_dmabufs(esp, this); 1926 this->result = DID_ABORT << 16; 1927 this->scsi_done(this); 1928 1929 if (don) 1930 ESP_INTSON(esp->dregs); 1931 1932 return SUCCESS; 1933 } 1934 } 1935 } 1936 1937 /* Yuck, the command to abort is disconnected, it is not 1938 * worth trying to abort it now if something else is live 1939 * on the bus at this time. So, we let the SCSI code wait 1940 * a little bit and try again later. 1941 */ 1942 if (esp->current_SC) { 1943 if (don) 1944 ESP_INTSON(esp->dregs); 1945 return FAILED; 1946 } 1947 1948 /* It's disconnected, we have to reconnect to re-establish 1949 * the nexus and tell the device to abort. However, we really 1950 * cannot 'reconnect' per se. Don't try to be fancy, just 1951 * indicate failure, which causes our caller to reset the whole 1952 * bus. 1953 */ 1954 1955 if (don) 1956 ESP_INTSON(esp->dregs); 1957 1958 return FAILED; 1959} 1960 1961/* We've sent ESP_CMD_RS to the ESP, the interrupt had just 1962 * arrived indicating the end of the SCSI bus reset. Our job 1963 * is to clean out the command queues and begin re-execution 1964 * of SCSI commands once more. 1965 */ 1966static int esp_finish_reset(struct esp *esp) 1967{ 1968 struct scsi_cmnd *sp = esp->current_SC; 1969 1970 /* Clean up currently executing command, if any. */ 1971 if (sp != NULL) { 1972 esp->current_SC = NULL; 1973 1974 esp_release_dmabufs(esp, sp); 1975 sp->result = (DID_RESET << 16); 1976 1977 sp->scsi_done(sp); 1978 } 1979 1980 /* Clean up disconnected queue, they have been invalidated 1981 * by the bus reset. 1982 */ 1983 if (esp->disconnected_SC) { 1984 while ((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) { 1985 esp_release_dmabufs(esp, sp); 1986 sp->result = (DID_RESET << 16); 1987 1988 sp->scsi_done(sp); 1989 } 1990 } 1991 1992 /* SCSI bus reset is complete. */ 1993 esp->resetting_bus = 0; 1994 wake_up(&esp->reset_queue); 1995 1996 /* Ok, now it is safe to get commands going once more. */ 1997 if (esp->issue_SC) 1998 esp_exec_cmd(esp); 1999 2000 return do_intr_end; 2001} 2002 2003static int esp_do_resetbus(struct esp *esp) 2004{ 2005 ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id)); 2006 esp->resetting_bus = 1; 2007 esp_cmd(esp, ESP_CMD_RS); 2008 2009 return do_intr_end; 2010} 2011 2012/* Reset ESP chip, reset hanging bus, then kill active and 2013 * disconnected commands for targets without soft reset. 2014 * 2015 * The host_lock is acquired by caller. 2016 */ 2017static int esp_reset(struct scsi_cmnd *SCptr) 2018{ 2019 struct esp *esp = (struct esp *) SCptr->device->host->hostdata; 2020 2021 spin_lock_irq(esp->ehost->host_lock); 2022 (void) esp_do_resetbus(esp); 2023 spin_unlock_irq(esp->ehost->host_lock); 2024 2025 wait_event(esp->reset_queue, (esp->resetting_bus == 0)); 2026 2027 return SUCCESS; 2028} 2029 2030/* Internal ESP done function. */ 2031static void esp_done(struct esp *esp, int error) 2032{ 2033 struct scsi_cmnd *done_SC = esp->current_SC; 2034 2035 esp->current_SC = NULL; 2036 2037 esp_release_dmabufs(esp, done_SC); 2038 done_SC->result = error; 2039 2040 done_SC->scsi_done(done_SC); 2041 2042 /* Bus is free, issue any commands in the queue. */ 2043 if (esp->issue_SC && !esp->current_SC) 2044 esp_exec_cmd(esp); 2045 2046} 2047 2048/* Wheee, ESP interrupt engine. */ 2049 2050/* Forward declarations. */ 2051static int esp_do_phase_determine(struct esp *esp); 2052static int esp_do_data_finale(struct esp *esp); 2053static int esp_select_complete(struct esp *esp); 2054static int esp_do_status(struct esp *esp); 2055static int esp_do_msgin(struct esp *esp); 2056static int esp_do_msgindone(struct esp *esp); 2057static int esp_do_msgout(struct esp *esp); 2058static int esp_do_cmdbegin(struct esp *esp); 2059 2060#define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP) 2061#define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP) 2062 2063/* Read any bytes found in the FAS366 fifo, storing them into 2064 * the ESP driver software state structure. 2065 */ 2066static void hme_fifo_read(struct esp *esp) 2067{ 2068 u8 count = 0; 2069 u8 status = esp->sreg; 2070 2071 /* Cannot safely frob the fifo for these following cases, but 2072 * we must always read the fifo when the reselect interrupt 2073 * is pending. 2074 */ 2075 if (((esp->ireg & ESP_INTR_RSEL) == 0) && 2076 (sreg_datainp(status) || 2077 sreg_dataoutp(status) || 2078 (esp->current_SC && 2079 esp->current_SC->SCp.phase == in_data_done))) { 2080 ESPHME(("<wkaround_skipped>")); 2081 } else { 2082 unsigned long fcnt = sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES; 2083 2084 /* The HME stores bytes in multiples of 2 in the fifo. */ 2085 ESPHME(("hme_fifo[fcnt=%d", (int)fcnt)); 2086 while (fcnt) { 2087 esp->hme_fifo_workaround_buffer[count++] = 2088 sbus_readb(esp->eregs + ESP_FDATA); 2089 esp->hme_fifo_workaround_buffer[count++] = 2090 sbus_readb(esp->eregs + ESP_FDATA); 2091 ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1])); 2092 fcnt--; 2093 } 2094 if (sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_F1BYTE) { 2095 ESPHME(("<poke_byte>")); 2096 sbus_writeb(0, esp->eregs + ESP_FDATA); 2097 esp->hme_fifo_workaround_buffer[count++] = 2098 sbus_readb(esp->eregs + ESP_FDATA); 2099 ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1])); 2100 ESPHME(("CMD_FLUSH")); 2101 esp_cmd(esp, ESP_CMD_FLUSH); 2102 } else { 2103 ESPHME(("no_xtra_byte")); 2104 } 2105 } 2106 ESPHME(("wkarnd_cnt=%d]", (int)count)); 2107 esp->hme_fifo_workaround_count = count; 2108} 2109 2110static inline void hme_fifo_push(struct esp *esp, u8 *bytes, u8 count) 2111{ 2112 esp_cmd(esp, ESP_CMD_FLUSH); 2113 while (count) { 2114 u8 tmp = *bytes++; 2115 sbus_writeb(tmp, esp->eregs + ESP_FDATA); 2116 sbus_writeb(0, esp->eregs + ESP_FDATA); 2117 count--; 2118 } 2119} 2120 2121/* We try to avoid some interrupts by jumping ahead and see if the ESP 2122 * has gotten far enough yet. Hence the following. 2123 */ 2124static inline int skipahead1(struct esp *esp, struct scsi_cmnd *scp, 2125 int prev_phase, int new_phase) 2126{ 2127 if (scp->SCp.sent_command != prev_phase) 2128 return 0; 2129 if (ESP_IRQ_P(esp->dregs)) { 2130 /* Yes, we are able to save an interrupt. */ 2131 if (esp->erev == fashme) 2132 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2); 2133 esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR)); 2134 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); 2135 if (esp->erev == fashme) { 2136 /* This chip is really losing. */ 2137 ESPHME(("HME[")); 2138 /* Must latch fifo before reading the interrupt 2139 * register else garbage ends up in the FIFO 2140 * which confuses the driver utterly. 2141 * Happy Meal indeed.... 2142 */ 2143 ESPHME(("fifo_workaround]")); 2144 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) || 2145 (esp->sreg2 & ESP_STAT2_F1BYTE)) 2146 hme_fifo_read(esp); 2147 } 2148 if (!(esp->ireg & ESP_INTR_SR)) 2149 return 0; 2150 else 2151 return do_reset_complete; 2152 } 2153 /* Ho hum, target is taking forever... */ 2154 scp->SCp.sent_command = new_phase; /* so we don't recurse... */ 2155 return do_intr_end; 2156} 2157 2158static inline int skipahead2(struct esp *esp, struct scsi_cmnd *scp, 2159 int prev_phase1, int prev_phase2, int new_phase) 2160{ 2161 if (scp->SCp.sent_command != prev_phase1 && 2162 scp->SCp.sent_command != prev_phase2) 2163 return 0; 2164 if (ESP_IRQ_P(esp->dregs)) { 2165 /* Yes, we are able to save an interrupt. */ 2166 if (esp->erev == fashme) 2167 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2); 2168 esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR)); 2169 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); 2170 if (esp->erev == fashme) { 2171 /* This chip is really losing. */ 2172 ESPHME(("HME[")); 2173 2174 /* Must latch fifo before reading the interrupt 2175 * register else garbage ends up in the FIFO 2176 * which confuses the driver utterly. 2177 * Happy Meal indeed.... 2178 */ 2179 ESPHME(("fifo_workaround]")); 2180 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) || 2181 (esp->sreg2 & ESP_STAT2_F1BYTE)) 2182 hme_fifo_read(esp); 2183 } 2184 if (!(esp->ireg & ESP_INTR_SR)) 2185 return 0; 2186 else 2187 return do_reset_complete; 2188 } 2189 /* Ho hum, target is taking forever... */ 2190 scp->SCp.sent_command = new_phase; /* so we don't recurse... */ 2191 return do_intr_end; 2192} 2193 2194/* Now some dma helpers. */ 2195static void dma_setup(struct esp *esp, __u32 addr, int count, int write) 2196{ 2197 u32 nreg = sbus_readl(esp->dregs + DMA_CSR); 2198 2199 if (write) 2200 nreg |= DMA_ST_WRITE; 2201 else 2202 nreg &= ~(DMA_ST_WRITE); 2203 nreg |= DMA_ENABLE; 2204 sbus_writel(nreg, esp->dregs + DMA_CSR); 2205 if (esp->dma->revision == dvmaesc1) { 2206 /* This ESC gate array sucks! */ 2207 __u32 src = addr; 2208 __u32 dest = src + count; 2209 2210 if (dest & (PAGE_SIZE - 1)) 2211 count = PAGE_ALIGN(count); 2212 sbus_writel(count, esp->dregs + DMA_COUNT); 2213 } 2214 sbus_writel(addr, esp->dregs + DMA_ADDR); 2215} 2216 2217static void dma_drain(struct esp *esp) 2218{ 2219 u32 tmp; 2220 2221 if (esp->dma->revision == dvmahme) 2222 return; 2223 if ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_FIFO_ISDRAIN) { 2224 switch (esp->dma->revision) { 2225 default: 2226 tmp |= DMA_FIFO_STDRAIN; 2227 sbus_writel(tmp, esp->dregs + DMA_CSR); 2228 2229 case dvmarev3: 2230 case dvmaesc1: 2231 while (sbus_readl(esp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) 2232 udelay(1); 2233 }; 2234 } 2235} 2236 2237static void dma_invalidate(struct esp *esp) 2238{ 2239 u32 tmp; 2240 2241 if (esp->dma->revision == dvmahme) { 2242 sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR); 2243 2244 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr | 2245 (DMA_PARITY_OFF | DMA_2CLKS | 2246 DMA_SCSI_DISAB | DMA_INT_ENAB)) & 2247 ~(DMA_ST_WRITE | DMA_ENABLE)); 2248 2249 sbus_writel(0, esp->dregs + DMA_CSR); 2250 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR); 2251 2252 /* This is necessary to avoid having the SCSI channel 2253 * engine lock up on us. 2254 */ 2255 sbus_writel(0, esp->dregs + DMA_ADDR); 2256 } else { 2257 while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ) 2258 udelay(1); 2259 2260 tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB); 2261 tmp |= DMA_FIFO_INV; 2262 sbus_writel(tmp, esp->dregs + DMA_CSR); 2263 tmp &= ~DMA_FIFO_INV; 2264 sbus_writel(tmp, esp->dregs + DMA_CSR); 2265 } 2266} 2267 2268static inline void dma_flashclear(struct esp *esp) 2269{ 2270 dma_drain(esp); 2271 dma_invalidate(esp); 2272} 2273 2274static int dma_can_transfer(struct esp *esp, struct scsi_cmnd *sp) 2275{ 2276 __u32 base, end, sz; 2277 2278 if (esp->dma->revision == dvmarev3) { 2279 sz = sp->SCp.this_residual; 2280 if (sz > 0x1000000) 2281 sz = 0x1000000; 2282 } else { 2283 base = ((__u32)((unsigned long)sp->SCp.ptr)); 2284 base &= (0x1000000 - 1); 2285 end = (base + sp->SCp.this_residual); 2286 if (end > 0x1000000) 2287 end = 0x1000000; 2288 sz = (end - base); 2289 } 2290 return sz; 2291} 2292 2293/* Misc. esp helper macros. */ 2294#define esp_setcount(__eregs, __cnt, __hme) \ 2295 sbus_writeb(((__cnt)&0xff), (__eregs) + ESP_TCLOW); \ 2296 sbus_writeb((((__cnt)>>8)&0xff), (__eregs) + ESP_TCMED); \ 2297 if (__hme) { \ 2298 sbus_writeb((((__cnt)>>16)&0xff), (__eregs) + FAS_RLO); \ 2299 sbus_writeb(0, (__eregs) + FAS_RHI); \ 2300 } 2301 2302#define esp_getcount(__eregs, __hme) \ 2303 ((sbus_readb((__eregs) + ESP_TCLOW)&0xff) | \ 2304 ((sbus_readb((__eregs) + ESP_TCMED)&0xff) << 8) | \ 2305 ((__hme) ? sbus_readb((__eregs) + FAS_RLO) << 16 : 0)) 2306 2307#define fcount(__esp) \ 2308 (((__esp)->erev == fashme) ? \ 2309 (__esp)->hme_fifo_workaround_count : \ 2310 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_FBYTES) 2311 2312#define fnzero(__esp) \ 2313 (((__esp)->erev == fashme) ? 0 : \ 2314 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_ONOTZERO) 2315 2316/* XXX speculative nops unnecessary when continuing amidst a data phase 2317 * XXX even on esp100!!! another case of flooding the bus with I/O reg 2318 * XXX writes... 2319 */ 2320#define esp_maybe_nop(__esp) \ 2321 if ((__esp)->erev == esp100) \ 2322 esp_cmd((__esp), ESP_CMD_NULL) 2323 2324#define sreg_to_dataphase(__sreg) \ 2325 ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain) 2326 2327/* The ESP100 when in synchronous data phase, can mistake a long final 2328 * REQ pulse from the target as an extra byte, it places whatever is on 2329 * the data lines into the fifo. For now, we will assume when this 2330 * happens that the target is a bit quirky and we don't want to 2331 * be talking synchronously to it anyways. Regardless, we need to 2332 * tell the ESP to eat the extraneous byte so that we can proceed 2333 * to the next phase. 2334 */ 2335static int esp100_sync_hwbug(struct esp *esp, struct scsi_cmnd *sp, int fifocnt) 2336{ 2337 /* Do not touch this piece of code. */ 2338 if ((!(esp->erev == esp100)) || 2339 (!(sreg_datainp((esp->sreg = sbus_readb(esp->eregs + ESP_STATUS))) && 2340 !fifocnt) && 2341 !(sreg_dataoutp(esp->sreg) && !fnzero(esp)))) { 2342 if (sp->SCp.phase == in_dataout) 2343 esp_cmd(esp, ESP_CMD_FLUSH); 2344 return 0; 2345 } else { 2346 /* Async mode for this guy. */ 2347 build_sync_nego_msg(esp, 0, 0); 2348 2349 /* Ack the bogus byte, but set ATN first. */ 2350 esp_cmd(esp, ESP_CMD_SATN); 2351 esp_cmd(esp, ESP_CMD_MOK); 2352 return 1; 2353 } 2354} 2355 2356/* This closes the window during a selection with a reselect pending, because 2357 * we use DMA for the selection process the FIFO should hold the correct 2358 * contents if we get reselected during this process. So we just need to 2359 * ack the possible illegal cmd interrupt pending on the esp100. 2360 */ 2361static inline int esp100_reconnect_hwbug(struct esp *esp) 2362{ 2363 u8 tmp; 2364 2365 if (esp->erev != esp100) 2366 return 0; 2367 tmp = sbus_readb(esp->eregs + ESP_INTRPT); 2368 if (tmp & ESP_INTR_SR) 2369 return 1; 2370 return 0; 2371} 2372 2373/* This verifies the BUSID bits during a reselection so that we know which 2374 * target is talking to us. 2375 */ 2376static inline int reconnect_target(struct esp *esp) 2377{ 2378 int it, me = esp->scsi_id_mask, targ = 0; 2379 2380 if (2 != fcount(esp)) 2381 return -1; 2382 if (esp->erev == fashme) { 2383 /* HME does not latch it's own BUS ID bits during 2384 * a reselection. Also the target number is given 2385 * as an unsigned char, not as a sole bit number 2386 * like the other ESP's do. 2387 * Happy Meal indeed.... 2388 */ 2389 targ = esp->hme_fifo_workaround_buffer[0]; 2390 } else { 2391 it = sbus_readb(esp->eregs + ESP_FDATA); 2392 if (!(it & me)) 2393 return -1; 2394 it &= ~me; 2395 if (it & (it - 1)) 2396 return -1; 2397 while (!(it & 1)) 2398 targ++, it >>= 1; 2399 } 2400 return targ; 2401} 2402 2403/* This verifies the identify from the target so that we know which lun is 2404 * being reconnected. 2405 */ 2406static inline int reconnect_lun(struct esp *esp) 2407{ 2408 int lun; 2409 2410 if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) 2411 return -1; 2412 if (esp->erev == fashme) 2413 lun = esp->hme_fifo_workaround_buffer[1]; 2414 else 2415 lun = sbus_readb(esp->eregs + ESP_FDATA); 2416 2417 /* Yes, you read this correctly. We report lun of zero 2418 * if we see parity error. ESP reports parity error for 2419 * the lun byte, and this is the only way to hope to recover 2420 * because the target is connected. 2421 */ 2422 if (esp->sreg & ESP_STAT_PERR) 2423 return 0; 2424 2425 /* Check for illegal bits being set in the lun. */ 2426 if ((lun & 0x40) || !(lun & 0x80)) 2427 return -1; 2428 2429 return lun & 7; 2430} 2431 2432/* This puts the driver in a state where it can revitalize a command that 2433 * is being continued due to reselection. 2434 */ 2435static inline void esp_connect(struct esp *esp, struct scsi_cmnd *sp) 2436{ 2437 struct esp_device *esp_dev = sp->device->hostdata; 2438 2439 if (esp->prev_soff != esp_dev->sync_max_offset || 2440 esp->prev_stp != esp_dev->sync_min_period || 2441 (esp->erev > esp100a && 2442 esp->prev_cfg3 != esp->config3[sp->device->id])) { 2443 esp->prev_soff = esp_dev->sync_max_offset; 2444 esp->prev_stp = esp_dev->sync_min_period; 2445 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 2446 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 2447 if (esp->erev > esp100a) { 2448 esp->prev_cfg3 = esp->config3[sp->device->id]; 2449 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 2450 } 2451 } 2452 esp->current_SC = sp; 2453} 2454 2455/* This will place the current working command back into the issue queue 2456 * if we are to receive a reselection amidst a selection attempt. 2457 */ 2458static inline void esp_reconnect(struct esp *esp, struct scsi_cmnd *sp) 2459{ 2460 if (!esp->disconnected_SC) 2461 ESPLOG(("esp%d: Weird, being reselected but disconnected " 2462 "command queue is empty.\n", esp->esp_id)); 2463 esp->snip = 0; 2464 esp->current_SC = NULL; 2465 sp->SCp.phase = not_issued; 2466 append_SC(&esp->issue_SC, sp); 2467} 2468 2469/* Begin message in phase. */ 2470static int esp_do_msgin(struct esp *esp) 2471{ 2472 /* Must be very careful with the fifo on the HME */ 2473 if ((esp->erev != fashme) || 2474 !(sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_FEMPTY)) 2475 esp_cmd(esp, ESP_CMD_FLUSH); 2476 esp_maybe_nop(esp); 2477 esp_cmd(esp, ESP_CMD_TI); 2478 esp->msgin_len = 1; 2479 esp->msgin_ctr = 0; 2480 esp_advance_phase(esp->current_SC, in_msgindone); 2481 return do_work_bus; 2482} 2483 2484/* This uses various DMA csr fields and the fifo flags count value to 2485 * determine how many bytes were successfully sent/received by the ESP. 2486 */ 2487static inline int esp_bytes_sent(struct esp *esp, int fifo_count) 2488{ 2489 int rval = sbus_readl(esp->dregs + DMA_ADDR) - esp->esp_command_dvma; 2490 2491 if (esp->dma->revision == dvmarev1) 2492 rval -= (4 - ((sbus_readl(esp->dregs + DMA_CSR) & DMA_READ_AHEAD)>>11)); 2493 return rval - fifo_count; 2494} 2495 2496static inline void advance_sg(struct scsi_cmnd *sp) 2497{ 2498 ++sp->SCp.buffer; 2499 --sp->SCp.buffers_residual; 2500 sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer); 2501 sp->SCp.ptr = (char *)((unsigned long)sg_dma_address(sp->SCp.buffer)); 2502} 2503 2504/* Please note that the way I've coded these routines is that I _always_ 2505 * check for a disconnect during any and all information transfer 2506 * phases. The SCSI standard states that the target _can_ cause a BUS 2507 * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note 2508 * that during information transfer phases the target controls every 2509 * change in phase, the only thing the initiator can do is "ask" for 2510 * a message out phase by driving ATN true. The target can, and sometimes 2511 * will, completely ignore this request so we cannot assume anything when 2512 * we try to force a message out phase to abort/reset a target. Most of 2513 * the time the target will eventually be nice and go to message out, so 2514 * we may have to hold on to our state about what we want to tell the target 2515 * for some period of time. 2516 */ 2517 2518/* I think I have things working here correctly. Even partial transfers 2519 * within a buffer or sub-buffer should not upset us at all no matter 2520 * how bad the target and/or ESP fucks things up. 2521 */ 2522static int esp_do_data(struct esp *esp) 2523{ 2524 struct scsi_cmnd *SCptr = esp->current_SC; 2525 int thisphase, hmuch; 2526 2527 ESPDATA(("esp_do_data: ")); 2528 esp_maybe_nop(esp); 2529 thisphase = sreg_to_dataphase(esp->sreg); 2530 esp_advance_phase(SCptr, thisphase); 2531 ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT")); 2532 hmuch = dma_can_transfer(esp, SCptr); 2533 if (hmuch > (64 * 1024) && (esp->erev != fashme)) 2534 hmuch = (64 * 1024); 2535 ESPDATA(("hmuch<%d> ", hmuch)); 2536 esp->current_transfer_size = hmuch; 2537 2538 if (esp->erev == fashme) { 2539 u32 tmp = esp->prev_hme_dmacsr; 2540 2541 /* Always set the ESP count registers first. */ 2542 esp_setcount(esp->eregs, hmuch, 1); 2543 2544 /* Get the DMA csr computed. */ 2545 tmp |= (DMA_SCSI_DISAB | DMA_ENABLE); 2546 if (thisphase == in_datain) 2547 tmp |= DMA_ST_WRITE; 2548 else 2549 tmp &= ~(DMA_ST_WRITE); 2550 esp->prev_hme_dmacsr = tmp; 2551 2552 ESPDATA(("DMA|TI --> do_intr_end\n")); 2553 if (thisphase == in_datain) { 2554 sbus_writel(hmuch, esp->dregs + DMA_COUNT); 2555 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 2556 } else { 2557 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 2558 sbus_writel(hmuch, esp->dregs + DMA_COUNT); 2559 } 2560 sbus_writel((__u32)((unsigned long)SCptr->SCp.ptr), esp->dregs+DMA_ADDR); 2561 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR); 2562 } else { 2563 esp_setcount(esp->eregs, hmuch, 0); 2564 dma_setup(esp, ((__u32)((unsigned long)SCptr->SCp.ptr)), 2565 hmuch, (thisphase == in_datain)); 2566 ESPDATA(("DMA|TI --> do_intr_end\n")); 2567 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 2568 } 2569 return do_intr_end; 2570} 2571 2572/* See how successful the data transfer was. */ 2573static int esp_do_data_finale(struct esp *esp) 2574{ 2575 struct scsi_cmnd *SCptr = esp->current_SC; 2576 struct esp_device *esp_dev = SCptr->device->hostdata; 2577 int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0; 2578 2579 ESPDATA(("esp_do_data_finale: ")); 2580 2581 if (SCptr->SCp.phase == in_datain) { 2582 if (esp->sreg & ESP_STAT_PERR) { 2583 /* Yuck, parity error. The ESP asserts ATN 2584 * so that we can go to message out phase 2585 * immediately and inform the target that 2586 * something bad happened. 2587 */ 2588 ESPLOG(("esp%d: data bad parity detected.\n", 2589 esp->esp_id)); 2590 esp->cur_msgout[0] = INITIATOR_ERROR; 2591 esp->msgout_len = 1; 2592 } 2593 dma_drain(esp); 2594 } 2595 dma_invalidate(esp); 2596 2597 /* This could happen for the above parity error case. */ 2598 if (esp->ireg != ESP_INTR_BSERV) { 2599 /* Please go to msgout phase, please please please... */ 2600 ESPLOG(("esp%d: !BSERV after data, probably to msgout\n", 2601 esp->esp_id)); 2602 return esp_do_phase_determine(esp); 2603 } 2604 2605 /* Check for partial transfers and other horrible events. 2606 * Note, here we read the real fifo flags register even 2607 * on HME broken adapters because we skip the HME fifo 2608 * workaround code in esp_handle() if we are doing data 2609 * phase things. We don't want to fuck directly with 2610 * the fifo like that, especially if doing synchronous 2611 * transfers! Also, will need to double the count on 2612 * HME if we are doing wide transfers, as the HME fifo 2613 * will move and count 16-bit quantities during wide data. 2614 * SMCC _and_ Qlogic can both bite me. 2615 */ 2616 fifocnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES); 2617 if (esp->erev != fashme) 2618 ecount = esp_getcount(esp->eregs, 0); 2619 bytes_sent = esp->current_transfer_size; 2620 2621 ESPDATA(("trans_sz(%d), ", bytes_sent)); 2622 if (esp->erev == fashme) { 2623 if (!(esp->sreg & ESP_STAT_TCNT)) { 2624 ecount = esp_getcount(esp->eregs, 1); 2625 bytes_sent -= ecount; 2626 } 2627 2628 /* Always subtract any cruft remaining in the FIFO. */ 2629 if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE) 2630 fifocnt <<= 1; 2631 if (SCptr->SCp.phase == in_dataout) 2632 bytes_sent -= fifocnt; 2633 2634 /* I have an IBM disk which exhibits the following 2635 * behavior during writes to it. It disconnects in 2636 * the middle of a partial transfer, the current sglist 2637 * buffer is 1024 bytes, the disk stops data transfer 2638 * at 512 bytes. 2639 * 2640 * However the FAS366 reports that 32 more bytes were 2641 * transferred than really were. This is precisely 2642 * the size of a fully loaded FIFO in wide scsi mode. 2643 * The FIFO state recorded indicates that it is empty. 2644 * 2645 * I have no idea if this is a bug in the FAS366 chip 2646 * or a bug in the firmware on this IBM disk. In any 2647 * event the following seems to be a good workaround. -DaveM 2648 */ 2649 if (bytes_sent != esp->current_transfer_size && 2650 SCptr->SCp.phase == in_dataout) { 2651 int mask = (64 - 1); 2652 2653 if ((esp->prev_cfg3 & ESP_CONFIG3_EWIDE) == 0) 2654 mask >>= 1; 2655 2656 if (bytes_sent & mask) 2657 bytes_sent -= (bytes_sent & mask); 2658 } 2659 } else { 2660 if (!(esp->sreg & ESP_STAT_TCNT)) 2661 bytes_sent -= ecount; 2662 if (SCptr->SCp.phase == in_dataout) 2663 bytes_sent -= fifocnt; 2664 } 2665 2666 ESPDATA(("bytes_sent(%d), ", bytes_sent)); 2667 2668 /* If we were in synchronous mode, check for peculiarities. */ 2669 if (esp->erev == fashme) { 2670 if (esp_dev->sync_max_offset) { 2671 if (SCptr->SCp.phase == in_dataout) 2672 esp_cmd(esp, ESP_CMD_FLUSH); 2673 } else { 2674 esp_cmd(esp, ESP_CMD_FLUSH); 2675 } 2676 } else { 2677 if (esp_dev->sync_max_offset) 2678 bogus_data = esp100_sync_hwbug(esp, SCptr, fifocnt); 2679 else 2680 esp_cmd(esp, ESP_CMD_FLUSH); 2681 } 2682 2683 /* Until we are sure of what has happened, we are certainly 2684 * in the dark. 2685 */ 2686 esp_advance_phase(SCptr, in_the_dark); 2687 2688 if (bytes_sent < 0) { 2689 /* I've seen this happen due to lost state in this 2690 * driver. No idea why it happened, but allowing 2691 * this value to be negative caused things to 2692 * lock up. This allows greater chance of recovery. 2693 * In fact every time I've seen this, it has been 2694 * a driver bug without question. 2695 */ 2696 ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id)); 2697 ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n", 2698 esp->esp_id, 2699 esp->current_transfer_size, fifocnt, ecount)); 2700 ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n", 2701 esp->esp_id, 2702 SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual)); 2703 ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id, 2704 SCptr->device->id)); 2705 SCptr->device->borken = 1; 2706 esp_dev->sync = 0; 2707 bytes_sent = 0; 2708 } 2709 2710 /* Update the state of our transfer. */ 2711 SCptr->SCp.ptr += bytes_sent; 2712 SCptr->SCp.this_residual -= bytes_sent; 2713 if (SCptr->SCp.this_residual < 0) { 2714 /* shit */ 2715 ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id)); 2716 SCptr->SCp.this_residual = 0; 2717 } 2718 2719 /* Maybe continue. */ 2720 if (!bogus_data) { 2721 ESPDATA(("!bogus_data, ")); 2722 2723 /* NO MATTER WHAT, we advance the scatterlist, 2724 * if the target should decide to disconnect 2725 * in between scatter chunks (which is common) 2726 * we could die horribly! I used to have the sg 2727 * advance occur only if we are going back into 2728 * (or are staying in) a data phase, you can 2729 * imagine the hell I went through trying to 2730 * figure this out. 2731 */ 2732 if (SCptr->use_sg && !SCptr->SCp.this_residual) 2733 advance_sg(SCptr); 2734 if (sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) { 2735 ESPDATA(("to more data\n")); 2736 return esp_do_data(esp); 2737 } 2738 ESPDATA(("to new phase\n")); 2739 return esp_do_phase_determine(esp); 2740 } 2741 /* Bogus data, just wait for next interrupt. */ 2742 ESPLOG(("esp%d: bogus_data during end of data phase\n", 2743 esp->esp_id)); 2744 return do_intr_end; 2745} 2746 2747/* We received a non-good status return at the end of 2748 * running a SCSI command. This is used to decide if 2749 * we should clear our synchronous transfer state for 2750 * such a device when that happens. 2751 * 2752 * The idea is that when spinning up a disk or rewinding 2753 * a tape, we don't want to go into a loop re-negotiating 2754 * synchronous capabilities over and over. 2755 */ 2756static int esp_should_clear_sync(struct scsi_cmnd *sp) 2757{ 2758 u8 cmd = sp->cmnd[0]; 2759 2760 /* These cases are for spinning up a disk and 2761 * waiting for that spinup to complete. 2762 */ 2763 if (cmd == START_STOP) 2764 return 0; 2765 2766 if (cmd == TEST_UNIT_READY) 2767 return 0; 2768 2769 /* One more special case for SCSI tape drives, 2770 * this is what is used to probe the device for 2771 * completion of a rewind or tape load operation. 2772 */ 2773 if (sp->device->type == TYPE_TAPE) { 2774 if (cmd == MODE_SENSE) 2775 return 0; 2776 } 2777 2778 return 1; 2779} 2780 2781/* Either a command is completing or a target is dropping off the bus 2782 * to continue the command in the background so we can do other work. 2783 */ 2784static int esp_do_freebus(struct esp *esp) 2785{ 2786 struct scsi_cmnd *SCptr = esp->current_SC; 2787 struct esp_device *esp_dev = SCptr->device->hostdata; 2788 int rval; 2789 2790 rval = skipahead2(esp, SCptr, in_status, in_msgindone, in_freeing); 2791 if (rval) 2792 return rval; 2793 if (esp->ireg != ESP_INTR_DC) { 2794 ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id)); 2795 return do_reset_bus; /* target will not drop BSY... */ 2796 } 2797 esp->msgout_len = 0; 2798 esp->prevmsgout = NOP; 2799 if (esp->prevmsgin == COMMAND_COMPLETE) { 2800 /* Normal end of nexus. */ 2801 if (esp->disconnected_SC || (esp->erev == fashme)) 2802 esp_cmd(esp, ESP_CMD_ESEL); 2803 2804 if (SCptr->SCp.Status != GOOD && 2805 SCptr->SCp.Status != CONDITION_GOOD && 2806 ((1<<SCptr->device->id) & esp->targets_present) && 2807 esp_dev->sync && 2808 esp_dev->sync_max_offset) { 2809 /* SCSI standard says that the synchronous capabilities 2810 * should be renegotiated at this point. Most likely 2811 * we are about to request sense from this target 2812 * in which case we want to avoid using sync 2813 * transfers until we are sure of the current target 2814 * state. 2815 */ 2816 ESPMISC(("esp: Status <%d> for target %d lun %d\n", 2817 SCptr->SCp.Status, SCptr->device->id, SCptr->device->lun)); 2818 2819 /* But don't do this when spinning up a disk at 2820 * boot time while we poll for completion as it 2821 * fills up the console with messages. Also, tapes 2822 * can report not ready many times right after 2823 * loading up a tape. 2824 */ 2825 if (esp_should_clear_sync(SCptr) != 0) 2826 esp_dev->sync = 0; 2827 } 2828 ESPDISC(("F<%02x,%02x>", SCptr->device->id, SCptr->device->lun)); 2829 esp_done(esp, ((SCptr->SCp.Status & 0xff) | 2830 ((SCptr->SCp.Message & 0xff)<<8) | 2831 (DID_OK << 16))); 2832 } else if (esp->prevmsgin == DISCONNECT) { 2833 /* Normal disconnect. */ 2834 esp_cmd(esp, ESP_CMD_ESEL); 2835 ESPDISC(("D<%02x,%02x>", SCptr->device->id, SCptr->device->lun)); 2836 append_SC(&esp->disconnected_SC, SCptr); 2837 esp->current_SC = NULL; 2838 if (esp->issue_SC) 2839 esp_exec_cmd(esp); 2840 } else { 2841 /* Driver bug, we do not expect a disconnect here 2842 * and should not have advanced the state engine 2843 * to in_freeing. 2844 */ 2845 ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n", 2846 esp->esp_id)); 2847 return do_reset_bus; 2848 } 2849 return do_intr_end; 2850} 2851 2852/* When a reselect occurs, and we cannot find the command to 2853 * reconnect to in our queues, we do this. 2854 */ 2855static int esp_bad_reconnect(struct esp *esp) 2856{ 2857 struct scsi_cmnd *sp; 2858 2859 ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n", 2860 esp->esp_id)); 2861 ESPLOG(("QUEUE DUMP\n")); 2862 sp = esp->issue_SC; 2863 ESPLOG(("esp%d: issue_SC[", esp->esp_id)); 2864 while (sp) { 2865 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun)); 2866 sp = (struct scsi_cmnd *) sp->host_scribble; 2867 } 2868 ESPLOG(("]\n")); 2869 sp = esp->current_SC; 2870 ESPLOG(("esp%d: current_SC[", esp->esp_id)); 2871 if (sp) 2872 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun)); 2873 else 2874 ESPLOG(("<NULL>")); 2875 ESPLOG(("]\n")); 2876 sp = esp->disconnected_SC; 2877 ESPLOG(("esp%d: disconnected_SC[", esp->esp_id)); 2878 while (sp) { 2879 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun)); 2880 sp = (struct scsi_cmnd *) sp->host_scribble; 2881 } 2882 ESPLOG(("]\n")); 2883 return do_reset_bus; 2884} 2885 2886/* Do the needy when a target tries to reconnect to us. */ 2887static int esp_do_reconnect(struct esp *esp) 2888{ 2889 int lun, target; 2890 struct scsi_cmnd *SCptr; 2891 2892 /* Check for all bogus conditions first. */ 2893 target = reconnect_target(esp); 2894 if (target < 0) { 2895 ESPDISC(("bad bus bits\n")); 2896 return do_reset_bus; 2897 } 2898 lun = reconnect_lun(esp); 2899 if (lun < 0) { 2900 ESPDISC(("target=%2x, bad identify msg\n", target)); 2901 return do_reset_bus; 2902 } 2903 2904 /* Things look ok... */ 2905 ESPDISC(("R<%02x,%02x>", target, lun)); 2906 2907 /* Must not flush FIFO or DVMA on HME. */ 2908 if (esp->erev != fashme) { 2909 esp_cmd(esp, ESP_CMD_FLUSH); 2910 if (esp100_reconnect_hwbug(esp)) 2911 return do_reset_bus; 2912 esp_cmd(esp, ESP_CMD_NULL); 2913 } 2914 2915 SCptr = remove_SC(&esp->disconnected_SC, (u8) target, (u8) lun); 2916 if (!SCptr) 2917 return esp_bad_reconnect(esp); 2918 2919 esp_connect(esp, SCptr); 2920 esp_cmd(esp, ESP_CMD_MOK); 2921 2922 if (esp->erev == fashme) 2923 sbus_writeb(((SCptr->device->id & 0xf) | 2924 (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT)), 2925 esp->eregs + ESP_BUSID); 2926 2927 /* Reconnect implies a restore pointers operation. */ 2928 esp_restore_pointers(esp, SCptr); 2929 2930 esp->snip = 0; 2931 esp_advance_phase(SCptr, in_the_dark); 2932 return do_intr_end; 2933} 2934 2935/* End of NEXUS (hopefully), pick up status + message byte then leave if 2936 * all goes well. 2937 */ 2938static int esp_do_status(struct esp *esp) 2939{ 2940 struct scsi_cmnd *SCptr = esp->current_SC; 2941 int intr, rval; 2942 2943 rval = skipahead1(esp, SCptr, in_the_dark, in_status); 2944 if (rval) 2945 return rval; 2946 intr = esp->ireg; 2947 ESPSTAT(("esp_do_status: ")); 2948 if (intr != ESP_INTR_DC) { 2949 int message_out = 0; /* for parity problems */ 2950 2951 /* Ack the message. */ 2952 ESPSTAT(("ack msg, ")); 2953 esp_cmd(esp, ESP_CMD_MOK); 2954 2955 if (esp->erev != fashme) { 2956 dma_flashclear(esp); 2957 2958 /* Wait till the first bits settle. */ 2959 while (esp->esp_command[0] == 0xff) 2960 udelay(1); 2961 } else { 2962 esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0]; 2963 esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1]; 2964 } 2965 2966 ESPSTAT(("got something, ")); 2967 /* ESP chimes in with one of 2968 * 2969 * 1) function done interrupt: 2970 * both status and message in bytes 2971 * are available 2972 * 2973 * 2) bus service interrupt: 2974 * only status byte was acquired 2975 * 2976 * 3) Anything else: 2977 * can't happen, but we test for it 2978 * anyways 2979 * 2980 * ALSO: If bad parity was detected on either 2981 * the status _or_ the message byte then 2982 * the ESP has asserted ATN on the bus 2983 * and we must therefore wait for the 2984 * next phase change. 2985 */ 2986 if (intr & ESP_INTR_FDONE) { 2987 /* We got it all, hallejulia. */ 2988 ESPSTAT(("got both, ")); 2989 SCptr->SCp.Status = esp->esp_command[0]; 2990 SCptr->SCp.Message = esp->esp_command[1]; 2991 esp->prevmsgin = SCptr->SCp.Message; 2992 esp->cur_msgin[0] = SCptr->SCp.Message; 2993 if (esp->sreg & ESP_STAT_PERR) { 2994 /* There was bad parity for the 2995 * message byte, the status byte 2996 * was ok. 2997 */ 2998 message_out = MSG_PARITY_ERROR; 2999 } 3000 } else if (intr == ESP_INTR_BSERV) { 3001 /* Only got status byte. */ 3002 ESPLOG(("esp%d: got status only, ", esp->esp_id)); 3003 if (!(esp->sreg & ESP_STAT_PERR)) { 3004 SCptr->SCp.Status = esp->esp_command[0]; 3005 SCptr->SCp.Message = 0xff; 3006 } else { 3007 /* The status byte had bad parity. 3008 * we leave the scsi_pointer Status 3009 * field alone as we set it to a default 3010 * of CHECK_CONDITION in esp_queue. 3011 */ 3012 message_out = INITIATOR_ERROR; 3013 } 3014 } else { 3015 /* This shouldn't happen ever. */ 3016 ESPSTAT(("got bolixed\n")); 3017 esp_advance_phase(SCptr, in_the_dark); 3018 return esp_do_phase_determine(esp); 3019 } 3020 3021 if (!message_out) { 3022 ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status, 3023 SCptr->SCp.Message)); 3024 if (SCptr->SCp.Message == COMMAND_COMPLETE) { 3025 ESPSTAT(("and was COMMAND_COMPLETE\n")); 3026 esp_advance_phase(SCptr, in_freeing); 3027 return esp_do_freebus(esp); 3028 } else { 3029 ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n", 3030 esp->esp_id)); 3031 esp->msgin_len = esp->msgin_ctr = 1; 3032 esp_advance_phase(SCptr, in_msgindone); 3033 return esp_do_msgindone(esp); 3034 } 3035 } else { 3036 /* With luck we'll be able to let the target 3037 * know that bad parity happened, it will know 3038 * which byte caused the problems and send it 3039 * again. For the case where the status byte 3040 * receives bad parity, I do not believe most 3041 * targets recover very well. We'll see. 3042 */ 3043 ESPLOG(("esp%d: bad parity somewhere mout=%2x\n", 3044 esp->esp_id, message_out)); 3045 esp->cur_msgout[0] = message_out; 3046 esp->msgout_len = esp->msgout_ctr = 1; 3047 esp_advance_phase(SCptr, in_the_dark); 3048 return esp_do_phase_determine(esp); 3049 } 3050 } else { 3051 /* If we disconnect now, all hell breaks loose. */ 3052 ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id)); 3053 esp_advance_phase(SCptr, in_the_dark); 3054 return esp_do_phase_determine(esp); 3055 } 3056} 3057 3058static int esp_enter_status(struct esp *esp) 3059{ 3060 u8 thecmd = ESP_CMD_ICCSEQ; 3061 3062 esp_cmd(esp, ESP_CMD_FLUSH); 3063 if (esp->erev != fashme) { 3064 u32 tmp; 3065 3066 esp->esp_command[0] = esp->esp_command[1] = 0xff; 3067 sbus_writeb(2, esp->eregs + ESP_TCLOW); 3068 sbus_writeb(0, esp->eregs + ESP_TCMED); 3069 tmp = sbus_readl(esp->dregs + DMA_CSR); 3070 tmp |= (DMA_ST_WRITE | DMA_ENABLE); 3071 sbus_writel(tmp, esp->dregs + DMA_CSR); 3072 if (esp->dma->revision == dvmaesc1) 3073 sbus_writel(0x100, esp->dregs + DMA_COUNT); 3074 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR); 3075 thecmd |= ESP_CMD_DMA; 3076 } 3077 esp_cmd(esp, thecmd); 3078 esp_advance_phase(esp->current_SC, in_status); 3079 3080 return esp_do_status(esp); 3081} 3082 3083static int esp_disconnect_amidst_phases(struct esp *esp) 3084{ 3085 struct scsi_cmnd *sp = esp->current_SC; 3086 struct esp_device *esp_dev = sp->device->hostdata; 3087 3088 /* This means real problems if we see this 3089 * here. Unless we were actually trying 3090 * to force the device to abort/reset. 3091 */ 3092 ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id)); 3093 ESPLOG(("pphase<%s> cphase<%s>, ", 3094 phase_string(sp->SCp.phase), 3095 phase_string(sp->SCp.sent_command))); 3096 3097 if (esp->disconnected_SC != NULL || (esp->erev == fashme)) 3098 esp_cmd(esp, ESP_CMD_ESEL); 3099 3100 switch (esp->cur_msgout[0]) { 3101 default: 3102 /* We didn't expect this to happen at all. */ 3103 ESPLOG(("device is bolixed\n")); 3104 esp_advance_phase(sp, in_tgterror); 3105 esp_done(esp, (DID_ERROR << 16)); 3106 break; 3107 3108 case BUS_DEVICE_RESET: 3109 ESPLOG(("device reset successful\n")); 3110 esp_dev->sync_max_offset = 0; 3111 esp_dev->sync_min_period = 0; 3112 esp_dev->sync = 0; 3113 esp_advance_phase(sp, in_resetdev); 3114 esp_done(esp, (DID_RESET << 16)); 3115 break; 3116 3117 case ABORT: 3118 ESPLOG(("device abort successful\n")); 3119 esp_advance_phase(sp, in_abortone); 3120 esp_done(esp, (DID_ABORT << 16)); 3121 break; 3122 3123 }; 3124 return do_intr_end; 3125} 3126 3127static int esp_enter_msgout(struct esp *esp) 3128{ 3129 esp_advance_phase(esp->current_SC, in_msgout); 3130 return esp_do_msgout(esp); 3131} 3132 3133static int esp_enter_msgin(struct esp *esp) 3134{ 3135 esp_advance_phase(esp->current_SC, in_msgin); 3136 return esp_do_msgin(esp); 3137} 3138 3139static int esp_enter_cmd(struct esp *esp) 3140{ 3141 esp_advance_phase(esp->current_SC, in_cmdbegin); 3142 return esp_do_cmdbegin(esp); 3143} 3144 3145static int esp_enter_badphase(struct esp *esp) 3146{ 3147 ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id, 3148 esp->sreg & ESP_STAT_PMASK)); 3149 return do_reset_bus; 3150} 3151 3152typedef int (*espfunc_t)(struct esp *); 3153 3154static espfunc_t phase_vector[] = { 3155 esp_do_data, /* ESP_DOP */ 3156 esp_do_data, /* ESP_DIP */ 3157 esp_enter_cmd, /* ESP_CMDP */ 3158 esp_enter_status, /* ESP_STATP */ 3159 esp_enter_badphase, /* ESP_STAT_PMSG */ 3160 esp_enter_badphase, /* ESP_STAT_PMSG | ESP_STAT_PIO */ 3161 esp_enter_msgout, /* ESP_MOP */ 3162 esp_enter_msgin, /* ESP_MIP */ 3163}; 3164 3165/* The target has control of the bus and we have to see where it has 3166 * taken us. 3167 */ 3168static int esp_do_phase_determine(struct esp *esp) 3169{ 3170 if ((esp->ireg & ESP_INTR_DC) != 0) 3171 return esp_disconnect_amidst_phases(esp); 3172 return phase_vector[esp->sreg & ESP_STAT_PMASK](esp); 3173} 3174 3175/* First interrupt after exec'ing a cmd comes here. */ 3176static int esp_select_complete(struct esp *esp) 3177{ 3178 struct scsi_cmnd *SCptr = esp->current_SC; 3179 struct esp_device *esp_dev = SCptr->device->hostdata; 3180 int cmd_bytes_sent, fcnt; 3181 3182 if (esp->erev != fashme) 3183 esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS); 3184 3185 if (esp->erev == fashme) 3186 fcnt = esp->hme_fifo_workaround_count; 3187 else 3188 fcnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES); 3189 3190 cmd_bytes_sent = esp_bytes_sent(esp, fcnt); 3191 dma_invalidate(esp); 3192 3193 /* Let's check to see if a reselect happened 3194 * while we we're trying to select. This must 3195 * be checked first. 3196 */ 3197 if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) { 3198 esp_reconnect(esp, SCptr); 3199 return esp_do_reconnect(esp); 3200 } 3201 3202 /* Looks like things worked, we should see a bus service & 3203 * a function complete interrupt at this point. Note we 3204 * are doing a direct comparison because we don't want to 3205 * be fooled into thinking selection was successful if 3206 * ESP_INTR_DC is set, see below. 3207 */ 3208 if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) { 3209 /* target speaks... */ 3210 esp->targets_present |= (1<<SCptr->device->id); 3211 3212 /* What if the target ignores the sdtr? */ 3213 if (esp->snip) 3214 esp_dev->sync = 1; 3215 3216 /* See how far, if at all, we got in getting 3217 * the information out to the target. 3218 */ 3219 switch (esp->seqreg) { 3220 default: 3221 3222 case ESP_STEP_ASEL: 3223 /* Arbitration won, target selected, but 3224 * we are in some phase which is not command 3225 * phase nor is it message out phase. 3226 * 3227 * XXX We've confused the target, obviously. 3228 * XXX So clear it's state, but we also end 3229 * XXX up clearing everyone elses. That isn't 3230 * XXX so nice. I'd like to just reset this 3231 * XXX target, but if I cannot even get it's 3232 * XXX attention and finish selection to talk 3233 * XXX to it, there is not much more I can do. 3234 * XXX If we have a loaded bus we're going to 3235 * XXX spend the next second or so renegotiating 3236 * XXX for synchronous transfers. 3237 */ 3238 ESPLOG(("esp%d: STEP_ASEL for tgt %d\n", 3239 esp->esp_id, SCptr->device->id)); 3240 3241 case ESP_STEP_SID: 3242 /* Arbitration won, target selected, went 3243 * to message out phase, sent one message 3244 * byte, then we stopped. ATN is asserted 3245 * on the SCSI bus and the target is still 3246 * there hanging on. This is a legal 3247 * sequence step if we gave the ESP a select 3248 * and stop command. 3249 * 3250 * XXX See above, I could set the borken flag 3251 * XXX in the device struct and retry the 3252 * XXX command. But would that help for 3253 * XXX tagged capable targets? 3254 */ 3255 3256 case ESP_STEP_NCMD: 3257 /* Arbitration won, target selected, maybe 3258 * sent the one message byte in message out 3259 * phase, but we did not go to command phase 3260 * in the end. Actually, we could have sent 3261 * only some of the message bytes if we tried 3262 * to send out the entire identify and tag 3263 * message using ESP_CMD_SA3. 3264 */ 3265 cmd_bytes_sent = 0; 3266 break; 3267 3268 case ESP_STEP_PPC: 3269 /* No, not the powerPC pinhead. Arbitration 3270 * won, all message bytes sent if we went to 3271 * message out phase, went to command phase 3272 * but only part of the command was sent. 3273 * 3274 * XXX I've seen this, but usually in conjunction 3275 * XXX with a gross error which appears to have 3276 * XXX occurred between the time I told the 3277 * XXX ESP to arbitrate and when I got the 3278 * XXX interrupt. Could I have misloaded the 3279 * XXX command bytes into the fifo? Actually, 3280 * XXX I most likely missed a phase, and therefore 3281 * XXX went into never never land and didn't even 3282 * XXX know it. That was the old driver though. 3283 * XXX What is even more peculiar is that the ESP 3284 * XXX showed the proper function complete and 3285 * XXX bus service bits in the interrupt register. 3286 */ 3287 3288 case ESP_STEP_FINI4: 3289 case ESP_STEP_FINI5: 3290 case ESP_STEP_FINI6: 3291 case ESP_STEP_FINI7: 3292 /* Account for the identify message */ 3293 if (SCptr->SCp.phase == in_slct_norm) 3294 cmd_bytes_sent -= 1; 3295 }; 3296 3297 if (esp->erev != fashme) 3298 esp_cmd(esp, ESP_CMD_NULL); 3299 3300 /* Be careful, we could really get fucked during synchronous 3301 * data transfers if we try to flush the fifo now. 3302 */ 3303 if ((esp->erev != fashme) && /* not a Happy Meal and... */ 3304 !fcnt && /* Fifo is empty and... */ 3305 /* either we are not doing synchronous transfers or... */ 3306 (!esp_dev->sync_max_offset || 3307 /* We are not going into data in phase. */ 3308 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP))) 3309 esp_cmd(esp, ESP_CMD_FLUSH); /* flush is safe */ 3310 3311 /* See how far we got if this is not a slow command. */ 3312 if (!esp->esp_slowcmd) { 3313 if (cmd_bytes_sent < 0) 3314 cmd_bytes_sent = 0; 3315 if (cmd_bytes_sent != SCptr->cmd_len) { 3316 /* Crapola, mark it as a slowcmd 3317 * so that we have some chance of 3318 * keeping the command alive with 3319 * good luck. 3320 * 3321 * XXX Actually, if we didn't send it all 3322 * XXX this means either we didn't set things 3323 * XXX up properly (driver bug) or the target 3324 * XXX or the ESP detected parity on one of 3325 * XXX the command bytes. This makes much 3326 * XXX more sense, and therefore this code 3327 * XXX should be changed to send out a 3328 * XXX parity error message or if the status 3329 * XXX register shows no parity error then 3330 * XXX just expect the target to bring the 3331 * XXX bus into message in phase so that it 3332 * XXX can send us the parity error message. 3333 * XXX SCSI sucks... 3334 */ 3335 esp->esp_slowcmd = 1; 3336 esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]); 3337 esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent); 3338 } 3339 } 3340 3341 /* Now figure out where we went. */ 3342 esp_advance_phase(SCptr, in_the_dark); 3343 return esp_do_phase_determine(esp); 3344 } 3345 3346 /* Did the target even make it? */ 3347 if (esp->ireg == ESP_INTR_DC) { 3348 /* wheee... nobody there or they didn't like 3349 * what we told it to do, clean up. 3350 */ 3351 3352 /* If anyone is off the bus, but working on 3353 * a command in the background for us, tell 3354 * the ESP to listen for them. 3355 */ 3356 if (esp->disconnected_SC) 3357 esp_cmd(esp, ESP_CMD_ESEL); 3358 3359 if (((1<<SCptr->device->id) & esp->targets_present) && 3360 esp->seqreg != 0 && 3361 (esp->cur_msgout[0] == EXTENDED_MESSAGE) && 3362 (SCptr->SCp.phase == in_slct_msg || 3363 SCptr->SCp.phase == in_slct_stop)) { 3364 /* shit */ 3365 esp->snip = 0; 3366 ESPLOG(("esp%d: Failed synchronous negotiation for target %d " 3367 "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun)); 3368 esp_dev->sync_max_offset = 0; 3369 esp_dev->sync_min_period = 0; 3370 esp_dev->sync = 1; /* so we don't negotiate again */ 3371 3372 /* Run the command again, this time though we 3373 * won't try to negotiate for synchronous transfers. 3374 * 3375 * XXX I'd like to do something like send an 3376 * XXX INITIATOR_ERROR or ABORT message to the 3377 * XXX target to tell it, "Sorry I confused you, 3378 * XXX please come back and I will be nicer next 3379 * XXX time". But that requires having the target 3380 * XXX on the bus, and it has dropped BSY on us. 3381 */ 3382 esp->current_SC = NULL; 3383 esp_advance_phase(SCptr, not_issued); 3384 prepend_SC(&esp->issue_SC, SCptr); 3385 esp_exec_cmd(esp); 3386 return do_intr_end; 3387 } 3388 3389 /* Ok, this is normal, this is what we see during boot 3390 * or whenever when we are scanning the bus for targets. 3391 * But first make sure that is really what is happening. 3392 */ 3393 if (((1<<SCptr->device->id) & esp->targets_present)) { 3394 ESPLOG(("esp%d: Warning, live target %d not responding to " 3395 "selection.\n", esp->esp_id, SCptr->device->id)); 3396 3397 /* This _CAN_ happen. The SCSI standard states that 3398 * the target is to _not_ respond to selection if 3399 * _it_ detects bad parity on the bus for any reason. 3400 * Therefore, we assume that if we've talked successfully 3401 * to this target before, bad parity is the problem. 3402 */ 3403 esp_done(esp, (DID_PARITY << 16)); 3404 } else { 3405 /* Else, there really isn't anyone there. */ 3406 ESPMISC(("esp: selection failure, maybe nobody there?\n")); 3407 ESPMISC(("esp: target %d lun %d\n", 3408 SCptr->device->id, SCptr->device->lun)); 3409 esp_done(esp, (DID_BAD_TARGET << 16)); 3410 } 3411 return do_intr_end; 3412 } 3413 3414 ESPLOG(("esp%d: Selection failure.\n", esp->esp_id)); 3415 printk("esp%d: Currently -- ", esp->esp_id); 3416 esp_print_ireg(esp->ireg); printk(" "); 3417 esp_print_statreg(esp->sreg); printk(" "); 3418 esp_print_seqreg(esp->seqreg); printk("\n"); 3419 printk("esp%d: New -- ", esp->esp_id); 3420 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS); 3421 esp->seqreg = sbus_readb(esp->eregs + ESP_SSTEP); 3422 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); 3423 esp_print_ireg(esp->ireg); printk(" "); 3424 esp_print_statreg(esp->sreg); printk(" "); 3425 esp_print_seqreg(esp->seqreg); printk("\n"); 3426 ESPLOG(("esp%d: resetting bus\n", esp->esp_id)); 3427 return do_reset_bus; /* ugh... */ 3428} 3429 3430/* Continue reading bytes for msgin phase. */ 3431static int esp_do_msgincont(struct esp *esp) 3432{ 3433 if (esp->ireg & ESP_INTR_BSERV) { 3434 /* in the right phase too? */ 3435 if ((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) { 3436 /* phew... */ 3437 esp_cmd(esp, ESP_CMD_TI); 3438 esp_advance_phase(esp->current_SC, in_msgindone); 3439 return do_intr_end; 3440 } 3441 3442 /* We changed phase but ESP shows bus service, 3443 * in this case it is most likely that we, the 3444 * hacker who has been up for 20hrs straight 3445 * staring at the screen, drowned in coffee 3446 * smelling like retched cigarette ashes 3447 * have miscoded something..... so, try to 3448 * recover as best we can. 3449 */ 3450 ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id)); 3451 } 3452 esp_advance_phase(esp->current_SC, in_the_dark); 3453 return do_phase_determine; 3454} 3455 3456static int check_singlebyte_msg(struct esp *esp) 3457{ 3458 esp->prevmsgin = esp->cur_msgin[0]; 3459 if (esp->cur_msgin[0] & 0x80) { 3460 /* wheee... */ 3461 ESPLOG(("esp%d: target sends identify amidst phases\n", 3462 esp->esp_id)); 3463 esp_advance_phase(esp->current_SC, in_the_dark); 3464 return 0; 3465 } else if (((esp->cur_msgin[0] & 0xf0) == 0x20) || 3466 (esp->cur_msgin[0] == EXTENDED_MESSAGE)) { 3467 esp->msgin_len = 2; 3468 esp_advance_phase(esp->current_SC, in_msgincont); 3469 return 0; 3470 } 3471 esp_advance_phase(esp->current_SC, in_the_dark); 3472 switch (esp->cur_msgin[0]) { 3473 default: 3474 /* We don't want to hear about it. */ 3475 ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id, 3476 esp->cur_msgin[0])); 3477 return MESSAGE_REJECT; 3478 3479 case NOP: 3480 ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id, 3481 esp->current_SC->device->id)); 3482 return 0; 3483 3484 case RESTORE_POINTERS: 3485 /* In this case we might also have to backup the 3486 * "slow command" pointer. It is rare to get such 3487 * a save/restore pointer sequence so early in the 3488 * bus transition sequences, but cover it. 3489 */ 3490 if (esp->esp_slowcmd) { 3491 esp->esp_scmdleft = esp->current_SC->cmd_len; 3492 esp->esp_scmdp = &esp->current_SC->cmnd[0]; 3493 } 3494 esp_restore_pointers(esp, esp->current_SC); 3495 return 0; 3496 3497 case SAVE_POINTERS: 3498 esp_save_pointers(esp, esp->current_SC); 3499 return 0; 3500 3501 case COMMAND_COMPLETE: 3502 case DISCONNECT: 3503 /* Freeing the bus, let it go. */ 3504 esp->current_SC->SCp.phase = in_freeing; 3505 return 0; 3506 3507 case MESSAGE_REJECT: 3508 ESPMISC(("msg reject, ")); 3509 if (esp->prevmsgout == EXTENDED_MESSAGE) { 3510 struct esp_device *esp_dev = esp->current_SC->device->hostdata; 3511 3512 /* Doesn't look like this target can 3513 * do synchronous or WIDE transfers. 3514 */ 3515 ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n")); 3516 esp_dev->sync = 1; 3517 esp_dev->wide = 1; 3518 esp_dev->sync_min_period = 0; 3519 esp_dev->sync_max_offset = 0; 3520 return 0; 3521 } else { 3522 ESPMISC(("not sync nego, sending ABORT\n")); 3523 return ABORT; 3524 } 3525 }; 3526} 3527 3528/* Target negotiates for synchronous transfers before we do, this 3529 * is legal although very strange. What is even funnier is that 3530 * the SCSI2 standard specifically recommends against targets doing 3531 * this because so many initiators cannot cope with this occurring. 3532 */ 3533static int target_with_ants_in_pants(struct esp *esp, 3534 struct scsi_cmnd *SCptr, 3535 struct esp_device *esp_dev) 3536{ 3537 if (esp_dev->sync || SCptr->device->borken) { 3538 /* sorry, no can do */ 3539 ESPSDTR(("forcing to async, ")); 3540 build_sync_nego_msg(esp, 0, 0); 3541 esp_dev->sync = 1; 3542 esp->snip = 1; 3543 ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id)); 3544 esp_advance_phase(SCptr, in_the_dark); 3545 return EXTENDED_MESSAGE; 3546 } 3547 3548 /* Ok, we'll check them out... */ 3549 return 0; 3550} 3551 3552static void sync_report(struct esp *esp) 3553{ 3554 int msg3, msg4; 3555 char *type; 3556 3557 msg3 = esp->cur_msgin[3]; 3558 msg4 = esp->cur_msgin[4]; 3559 if (msg4) { 3560 int hz = 1000000000 / (msg3 * 4); 3561 int integer = hz / 1000000; 3562 int fraction = (hz - (integer * 1000000)) / 10000; 3563 if ((esp->erev == fashme) && 3564 (esp->config3[esp->current_SC->device->id] & ESP_CONFIG3_EWIDE)) { 3565 type = "FAST-WIDE"; 3566 integer <<= 1; 3567 fraction <<= 1; 3568 } else if ((msg3 * 4) < 200) { 3569 type = "FAST"; 3570 } else { 3571 type = "synchronous"; 3572 } 3573 3574 /* Do not transform this back into one big printk 3575 * again, it triggers a bug in our sparc64-gcc272 3576 * sibling call optimization. -DaveM 3577 */ 3578 ESPLOG((KERN_INFO "esp%d: target %d ", 3579 esp->esp_id, esp->current_SC->device->id)); 3580 ESPLOG(("[period %dns offset %d %d.%02dMHz ", 3581 (int) msg3 * 4, (int) msg4, 3582 integer, fraction)); 3583 ESPLOG(("%s SCSI%s]\n", type, 3584 (((msg3 * 4) < 200) ? "-II" : ""))); 3585 } else { 3586 ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n", 3587 esp->esp_id, esp->current_SC->device->id)); 3588 } 3589} 3590 3591static int check_multibyte_msg(struct esp *esp) 3592{ 3593 struct scsi_cmnd *SCptr = esp->current_SC; 3594 struct esp_device *esp_dev = SCptr->device->hostdata; 3595 u8 regval = 0; 3596 int message_out = 0; 3597 3598 ESPSDTR(("chk multibyte msg: ")); 3599 if (esp->cur_msgin[2] == EXTENDED_SDTR) { 3600 int period = esp->cur_msgin[3]; 3601 int offset = esp->cur_msgin[4]; 3602 3603 ESPSDTR(("is sync nego response, ")); 3604 if (!esp->snip) { 3605 int rval; 3606 3607 /* Target negotiates first! */ 3608 ESPSDTR(("target jumps the gun, ")); 3609 message_out = EXTENDED_MESSAGE; /* we must respond */ 3610 rval = target_with_ants_in_pants(esp, SCptr, esp_dev); 3611 if (rval) 3612 return rval; 3613 } 3614 3615 ESPSDTR(("examining sdtr, ")); 3616 3617 /* Offset cannot be larger than ESP fifo size. */ 3618 if (offset > 15) { 3619 ESPSDTR(("offset too big %2x, ", offset)); 3620 offset = 15; 3621 ESPSDTR(("sending back new offset\n")); 3622 build_sync_nego_msg(esp, period, offset); 3623 return EXTENDED_MESSAGE; 3624 } 3625 3626 if (offset && period > esp->max_period) { 3627 /* Yeee, async for this slow device. */ 3628 ESPSDTR(("period too long %2x, ", period)); 3629 build_sync_nego_msg(esp, 0, 0); 3630 ESPSDTR(("hoping for msgout\n")); 3631 esp_advance_phase(esp->current_SC, in_the_dark); 3632 return EXTENDED_MESSAGE; 3633 } else if (offset && period < esp->min_period) { 3634 ESPSDTR(("period too short %2x, ", period)); 3635 period = esp->min_period; 3636 if (esp->erev > esp236) 3637 regval = 4; 3638 else 3639 regval = 5; 3640 } else if (offset) { 3641 int tmp; 3642 3643 ESPSDTR(("period is ok, ")); 3644 tmp = esp->ccycle / 1000; 3645 regval = (((period << 2) + tmp - 1) / tmp); 3646 if (regval && ((esp->erev == fas100a || 3647 esp->erev == fas236 || 3648 esp->erev == fashme))) { 3649 if (period >= 50) 3650 regval--; 3651 } 3652 } 3653 3654 if (offset) { 3655 u8 bit; 3656 3657 esp_dev->sync_min_period = (regval & 0x1f); 3658 esp_dev->sync_max_offset = (offset | esp->radelay); 3659 if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) { 3660 if ((esp->erev == fas100a) || (esp->erev == fashme)) 3661 bit = ESP_CONFIG3_FAST; 3662 else 3663 bit = ESP_CONFIG3_FSCSI; 3664 if (period < 50) { 3665 /* On FAS366, if using fast-20 synchronous transfers 3666 * we need to make sure the REQ/ACK assert/deassert 3667 * control bits are clear. 3668 */ 3669 if (esp->erev == fashme) 3670 esp_dev->sync_max_offset &= ~esp->radelay; 3671 esp->config3[SCptr->device->id] |= bit; 3672 } else { 3673 esp->config3[SCptr->device->id] &= ~bit; 3674 } 3675 esp->prev_cfg3 = esp->config3[SCptr->device->id]; 3676 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 3677 } 3678 esp->prev_soff = esp_dev->sync_max_offset; 3679 esp->prev_stp = esp_dev->sync_min_period; 3680 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 3681 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 3682 ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n", 3683 esp_dev->sync_max_offset, 3684 esp_dev->sync_min_period, 3685 esp->config3[SCptr->device->id])); 3686 3687 esp->snip = 0; 3688 } else if (esp_dev->sync_max_offset) { 3689 u8 bit; 3690 3691 /* back to async mode */ 3692 ESPSDTR(("unaccaptable sync nego, forcing async\n")); 3693 esp_dev->sync_max_offset = 0; 3694 esp_dev->sync_min_period = 0; 3695 esp->prev_soff = 0; 3696 esp->prev_stp = 0; 3697 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 3698 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 3699 if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) { 3700 if ((esp->erev == fas100a) || (esp->erev == fashme)) 3701 bit = ESP_CONFIG3_FAST; 3702 else 3703 bit = ESP_CONFIG3_FSCSI; 3704 esp->config3[SCptr->device->id] &= ~bit; 3705 esp->prev_cfg3 = esp->config3[SCptr->device->id]; 3706 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 3707 } 3708 } 3709 3710 sync_report(esp); 3711 3712 ESPSDTR(("chk multibyte msg: sync is known, ")); 3713 esp_dev->sync = 1; 3714 3715 if (message_out) { 3716 ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n", 3717 esp->esp_id)); 3718 build_sync_nego_msg(esp, period, offset); 3719 esp_advance_phase(SCptr, in_the_dark); 3720 return EXTENDED_MESSAGE; 3721 } 3722 3723 ESPSDTR(("returning zero\n")); 3724 esp_advance_phase(SCptr, in_the_dark); /* ...or else! */ 3725 return 0; 3726 } else if (esp->cur_msgin[2] == EXTENDED_WDTR) { 3727 int size = 8 << esp->cur_msgin[3]; 3728 3729 esp->wnip = 0; 3730 if (esp->erev != fashme) { 3731 ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n", 3732 esp->esp_id)); 3733 message_out = MESSAGE_REJECT; 3734 } else if (size > 16) { 3735 ESPLOG(("esp%d: AIEEE wide transfer for %d size " 3736 "not supported.\n", esp->esp_id, size)); 3737 message_out = MESSAGE_REJECT; 3738 } else { 3739 /* Things look good; let's see what we got. */ 3740 if (size == 16) { 3741 /* Set config 3 register for this target. */ 3742 esp->config3[SCptr->device->id] |= ESP_CONFIG3_EWIDE; 3743 } else { 3744 /* Just make sure it was one byte sized. */ 3745 if (size != 8) { 3746 ESPLOG(("esp%d: Aieee, wide nego of %d size.\n", 3747 esp->esp_id, size)); 3748 message_out = MESSAGE_REJECT; 3749 goto finish; 3750 } 3751 /* Pure paranoia. */ 3752 esp->config3[SCptr->device->id] &= ~(ESP_CONFIG3_EWIDE); 3753 } 3754 esp->prev_cfg3 = esp->config3[SCptr->device->id]; 3755 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 3756 3757 /* Regardless, next try for sync transfers. */ 3758 build_sync_nego_msg(esp, esp->sync_defp, 15); 3759 esp_dev->sync = 1; 3760 esp->snip = 1; 3761 message_out = EXTENDED_MESSAGE; 3762 } 3763 } else if (esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) { 3764 ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id)); 3765 message_out = MESSAGE_REJECT; 3766 } 3767finish: 3768 esp_advance_phase(SCptr, in_the_dark); 3769 return message_out; 3770} 3771 3772static int esp_do_msgindone(struct esp *esp) 3773{ 3774 struct scsi_cmnd *SCptr = esp->current_SC; 3775 int message_out = 0, it = 0, rval; 3776 3777 rval = skipahead1(esp, SCptr, in_msgin, in_msgindone); 3778 if (rval) 3779 return rval; 3780 if (SCptr->SCp.sent_command != in_status) { 3781 if (!(esp->ireg & ESP_INTR_DC)) { 3782 if (esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) { 3783 message_out = MSG_PARITY_ERROR; 3784 esp_cmd(esp, ESP_CMD_FLUSH); 3785 } else if (esp->erev != fashme && 3786 (it = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES)) != 1) { 3787 /* We certainly dropped the ball somewhere. */ 3788 message_out = INITIATOR_ERROR; 3789 esp_cmd(esp, ESP_CMD_FLUSH); 3790 } else if (!esp->msgin_len) { 3791 if (esp->erev == fashme) 3792 it = esp->hme_fifo_workaround_buffer[0]; 3793 else 3794 it = sbus_readb(esp->eregs + ESP_FDATA); 3795 esp_advance_phase(SCptr, in_msgincont); 3796 } else { 3797 /* it is ok and we want it */ 3798 if (esp->erev == fashme) 3799 it = esp->cur_msgin[esp->msgin_ctr] = 3800 esp->hme_fifo_workaround_buffer[0]; 3801 else 3802 it = esp->cur_msgin[esp->msgin_ctr] = 3803 sbus_readb(esp->eregs + ESP_FDATA); 3804 esp->msgin_ctr++; 3805 } 3806 } else { 3807 esp_advance_phase(SCptr, in_the_dark); 3808 return do_work_bus; 3809 } 3810 } else { 3811 it = esp->cur_msgin[0]; 3812 } 3813 if (!message_out && esp->msgin_len) { 3814 if (esp->msgin_ctr < esp->msgin_len) { 3815 esp_advance_phase(SCptr, in_msgincont); 3816 } else if (esp->msgin_len == 1) { 3817 message_out = check_singlebyte_msg(esp); 3818 } else if (esp->msgin_len == 2) { 3819 if (esp->cur_msgin[0] == EXTENDED_MESSAGE) { 3820 if ((it + 2) >= 15) { 3821 message_out = MESSAGE_REJECT; 3822 } else { 3823 esp->msgin_len = (it + 2); 3824 esp_advance_phase(SCptr, in_msgincont); 3825 } 3826 } else { 3827 message_out = MESSAGE_REJECT; /* foo on you */ 3828 } 3829 } else { 3830 message_out = check_multibyte_msg(esp); 3831 } 3832 } 3833 if (message_out < 0) { 3834 return -message_out; 3835 } else if (message_out) { 3836 if (((message_out != 1) && 3837 ((message_out < 0x20) || (message_out & 0x80)))) 3838 esp->msgout_len = 1; 3839 esp->cur_msgout[0] = message_out; 3840 esp_cmd(esp, ESP_CMD_SATN); 3841 esp_advance_phase(SCptr, in_the_dark); 3842 esp->msgin_len = 0; 3843 } 3844 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS); 3845 esp->sreg &= ~(ESP_STAT_INTR); 3846 if ((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD)) 3847 esp_cmd(esp, ESP_CMD_MOK); 3848 if ((SCptr->SCp.sent_command == in_msgindone) && 3849 (SCptr->SCp.phase == in_freeing)) 3850 return esp_do_freebus(esp); 3851 return do_intr_end; 3852} 3853 3854static int esp_do_cmdbegin(struct esp *esp) 3855{ 3856 struct scsi_cmnd *SCptr = esp->current_SC; 3857 3858 esp_advance_phase(SCptr, in_cmdend); 3859 if (esp->erev == fashme) { 3860 u32 tmp = sbus_readl(esp->dregs + DMA_CSR); 3861 int i; 3862 3863 for (i = 0; i < esp->esp_scmdleft; i++) 3864 esp->esp_command[i] = *esp->esp_scmdp++; 3865 esp->esp_scmdleft = 0; 3866 esp_cmd(esp, ESP_CMD_FLUSH); 3867 esp_setcount(esp->eregs, i, 1); 3868 esp_cmd(esp, (ESP_CMD_DMA | ESP_CMD_TI)); 3869 tmp |= (DMA_SCSI_DISAB | DMA_ENABLE); 3870 tmp &= ~(DMA_ST_WRITE); 3871 sbus_writel(i, esp->dregs + DMA_COUNT); 3872 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR); 3873 sbus_writel(tmp, esp->dregs + DMA_CSR); 3874 } else { 3875 u8 tmp; 3876 3877 esp_cmd(esp, ESP_CMD_FLUSH); 3878 tmp = *esp->esp_scmdp++; 3879 esp->esp_scmdleft--; 3880 sbus_writeb(tmp, esp->eregs + ESP_FDATA); 3881 esp_cmd(esp, ESP_CMD_TI); 3882 } 3883 return do_intr_end; 3884} 3885 3886static int esp_do_cmddone(struct esp *esp) 3887{ 3888 if (esp->erev == fashme) 3889 dma_invalidate(esp); 3890 else 3891 esp_cmd(esp, ESP_CMD_NULL); 3892 3893 if (esp->ireg & ESP_INTR_BSERV) { 3894 esp_advance_phase(esp->current_SC, in_the_dark); 3895 return esp_do_phase_determine(esp); 3896 } 3897 3898 ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n", 3899 esp->esp_id)); 3900 return do_reset_bus; 3901} 3902 3903static int esp_do_msgout(struct esp *esp) 3904{ 3905 esp_cmd(esp, ESP_CMD_FLUSH); 3906 switch (esp->msgout_len) { 3907 case 1: 3908 if (esp->erev == fashme) 3909 hme_fifo_push(esp, &esp->cur_msgout[0], 1); 3910 else 3911 sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA); 3912 3913 esp_cmd(esp, ESP_CMD_TI); 3914 break; 3915 3916 case 2: 3917 esp->esp_command[0] = esp->cur_msgout[0]; 3918 esp->esp_command[1] = esp->cur_msgout[1]; 3919 3920 if (esp->erev == fashme) { 3921 hme_fifo_push(esp, &esp->cur_msgout[0], 2); 3922 esp_cmd(esp, ESP_CMD_TI); 3923 } else { 3924 dma_setup(esp, esp->esp_command_dvma, 2, 0); 3925 esp_setcount(esp->eregs, 2, 0); 3926 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 3927 } 3928 break; 3929 3930 case 4: 3931 esp->esp_command[0] = esp->cur_msgout[0]; 3932 esp->esp_command[1] = esp->cur_msgout[1]; 3933 esp->esp_command[2] = esp->cur_msgout[2]; 3934 esp->esp_command[3] = esp->cur_msgout[3]; 3935 esp->snip = 1; 3936 3937 if (esp->erev == fashme) { 3938 hme_fifo_push(esp, &esp->cur_msgout[0], 4); 3939 esp_cmd(esp, ESP_CMD_TI); 3940 } else { 3941 dma_setup(esp, esp->esp_command_dvma, 4, 0); 3942 esp_setcount(esp->eregs, 4, 0); 3943 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 3944 } 3945 break; 3946 3947 case 5: 3948 esp->esp_command[0] = esp->cur_msgout[0]; 3949 esp->esp_command[1] = esp->cur_msgout[1]; 3950 esp->esp_command[2] = esp->cur_msgout[2]; 3951 esp->esp_command[3] = esp->cur_msgout[3]; 3952 esp->esp_command[4] = esp->cur_msgout[4]; 3953 esp->snip = 1; 3954 3955 if (esp->erev == fashme) { 3956 hme_fifo_push(esp, &esp->cur_msgout[0], 5); 3957 esp_cmd(esp, ESP_CMD_TI); 3958 } else { 3959 dma_setup(esp, esp->esp_command_dvma, 5, 0); 3960 esp_setcount(esp->eregs, 5, 0); 3961 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 3962 } 3963 break; 3964 3965 default: 3966 /* whoops */ 3967 ESPMISC(("bogus msgout sending NOP\n")); 3968 esp->cur_msgout[0] = NOP; 3969 3970 if (esp->erev == fashme) { 3971 hme_fifo_push(esp, &esp->cur_msgout[0], 1); 3972 } else { 3973 sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA); 3974 } 3975 3976 esp->msgout_len = 1; 3977 esp_cmd(esp, ESP_CMD_TI); 3978 break; 3979 }; 3980 3981 esp_advance_phase(esp->current_SC, in_msgoutdone); 3982 return do_intr_end; 3983} 3984 3985static int esp_do_msgoutdone(struct esp *esp) 3986{ 3987 if (esp->msgout_len > 1) { 3988 /* XXX HME/FAS ATN deassert workaround required, 3989 * XXX no DMA flushing, only possible ESP_CMD_FLUSH 3990 * XXX to kill the fifo. 3991 */ 3992 if (esp->erev != fashme) { 3993 u32 tmp; 3994 3995 while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ) 3996 udelay(1); 3997 tmp &= ~DMA_ENABLE; 3998 sbus_writel(tmp, esp->dregs + DMA_CSR); 3999 dma_invalidate(esp); 4000 } else { 4001 esp_cmd(esp, ESP_CMD_FLUSH); 4002 } 4003 } 4004 if (!(esp->ireg & ESP_INTR_DC)) { 4005 if (esp->erev != fashme) 4006 esp_cmd(esp, ESP_CMD_NULL); 4007 switch (esp->sreg & ESP_STAT_PMASK) { 4008 case ESP_MOP: 4009 /* whoops, parity error */ 4010 ESPLOG(("esp%d: still in msgout, parity error assumed\n", 4011 esp->esp_id)); 4012 if (esp->msgout_len > 1) 4013 esp_cmd(esp, ESP_CMD_SATN); 4014 esp_advance_phase(esp->current_SC, in_msgout); 4015 return do_work_bus; 4016 4017 case ESP_DIP: 4018 break; 4019 4020 default: 4021 /* Happy Meal fifo is touchy... */ 4022 if ((esp->erev != fashme) && 4023 !fcount(esp) && 4024 !(((struct esp_device *)esp->current_SC->device->hostdata)->sync_max_offset)) 4025 esp_cmd(esp, ESP_CMD_FLUSH); 4026 break; 4027 4028 }; 4029 } else { 4030 ESPLOG(("esp%d: disconnect, resetting bus\n", esp->esp_id)); 4031 return do_reset_bus; 4032 } 4033 4034 /* If we sent out a synchronous negotiation message, update 4035 * our state. 4036 */ 4037 if (esp->cur_msgout[2] == EXTENDED_MESSAGE && 4038 esp->cur_msgout[4] == EXTENDED_SDTR) { 4039 esp->snip = 1; /* anal retentiveness... */ 4040 } 4041 4042 esp->prevmsgout = esp->cur_msgout[0]; 4043 esp->msgout_len = 0; 4044 esp_advance_phase(esp->current_SC, in_the_dark); 4045 return esp_do_phase_determine(esp); 4046} 4047 4048static int esp_bus_unexpected(struct esp *esp) 4049{ 4050 ESPLOG(("esp%d: command in weird state %2x\n", 4051 esp->esp_id, esp->current_SC->SCp.phase)); 4052 return do_reset_bus; 4053} 4054 4055static espfunc_t bus_vector[] = { 4056 esp_do_data_finale, 4057 esp_do_data_finale, 4058 esp_bus_unexpected, 4059 esp_do_msgin, 4060 esp_do_msgincont, 4061 esp_do_msgindone, 4062 esp_do_msgout, 4063 esp_do_msgoutdone, 4064 esp_do_cmdbegin, 4065 esp_do_cmddone, 4066 esp_do_status, 4067 esp_do_freebus, 4068 esp_do_phase_determine, 4069 esp_bus_unexpected, 4070 esp_bus_unexpected, 4071 esp_bus_unexpected, 4072}; 4073 4074/* This is the second tier in our dual-level SCSI state machine. */ 4075static int esp_work_bus(struct esp *esp) 4076{ 4077 struct scsi_cmnd *SCptr = esp->current_SC; 4078 unsigned int phase; 4079 4080 ESPBUS(("esp_work_bus: ")); 4081 if (!SCptr) { 4082 ESPBUS(("reconnect\n")); 4083 return esp_do_reconnect(esp); 4084 } 4085 phase = SCptr->SCp.phase; 4086 if ((phase & 0xf0) == in_phases_mask) 4087 return bus_vector[(phase & 0x0f)](esp); 4088 else if ((phase & 0xf0) == in_slct_mask) 4089 return esp_select_complete(esp); 4090 else 4091 return esp_bus_unexpected(esp); 4092} 4093 4094static espfunc_t isvc_vector[] = { 4095 NULL, 4096 esp_do_phase_determine, 4097 esp_do_resetbus, 4098 esp_finish_reset, 4099 esp_work_bus 4100}; 4101 4102/* Main interrupt handler for an esp adapter. */ 4103static void esp_handle(struct esp *esp) 4104{ 4105 struct scsi_cmnd *SCptr; 4106 int what_next = do_intr_end; 4107 4108 SCptr = esp->current_SC; 4109 4110 /* Check for errors. */ 4111 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS); 4112 esp->sreg &= (~ESP_STAT_INTR); 4113 if (esp->erev == fashme) { 4114 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2); 4115 esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS); 4116 } 4117 4118 if (esp->sreg & (ESP_STAT_SPAM)) { 4119 /* Gross error, could be due to one of: 4120 * 4121 * - top of fifo overwritten, could be because 4122 * we tried to do a synchronous transfer with 4123 * an offset greater than ESP fifo size 4124 * 4125 * - top of command register overwritten 4126 * 4127 * - DMA setup to go in one direction, SCSI 4128 * bus points in the other, whoops 4129 * 4130 * - weird phase change during asynchronous 4131 * data phase while we are initiator 4132 */ 4133 ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg)); 4134 4135 /* If a command is live on the bus we cannot safely 4136 * reset the bus, so we'll just let the pieces fall 4137 * where they may. Here we are hoping that the 4138 * target will be able to cleanly go away soon 4139 * so we can safely reset things. 4140 */ 4141 if (!SCptr) { 4142 ESPLOG(("esp%d: No current cmd during gross error, " 4143 "resetting bus\n", esp->esp_id)); 4144 what_next = do_reset_bus; 4145 goto state_machine; 4146 } 4147 } 4148 4149 if (sbus_readl(esp->dregs + DMA_CSR) & DMA_HNDL_ERROR) { 4150 /* A DMA gate array error. Here we must 4151 * be seeing one of two things. Either the 4152 * virtual to physical address translation 4153 * on the SBUS could not occur, else the 4154 * translation it did get pointed to a bogus 4155 * page. Ho hum... 4156 */ 4157 ESPLOG(("esp%d: DMA error %08x\n", esp->esp_id, 4158 sbus_readl(esp->dregs + DMA_CSR))); 4159 4160 /* DMA gate array itself must be reset to clear the 4161 * error condition. 4162 */ 4163 esp_reset_dma(esp); 4164 4165 what_next = do_reset_bus; 4166 goto state_machine; 4167 } 4168 4169 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); /* Unlatch intr reg */ 4170 4171 if (esp->erev == fashme) { 4172 /* This chip is really losing. */ 4173 ESPHME(("HME[")); 4174 4175 ESPHME(("sreg2=%02x,", esp->sreg2)); 4176 /* Must latch fifo before reading the interrupt 4177 * register else garbage ends up in the FIFO 4178 * which confuses the driver utterly. 4179 */ 4180 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) || 4181 (esp->sreg2 & ESP_STAT2_F1BYTE)) { 4182 ESPHME(("fifo_workaround]")); 4183 hme_fifo_read(esp); 4184 } else { 4185 ESPHME(("no_fifo_workaround]")); 4186 } 4187 } 4188 4189 /* No current cmd is only valid at this point when there are 4190 * commands off the bus or we are trying a reset. 4191 */ 4192 if (!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) { 4193 /* Panic is safe, since current_SC is null. */ 4194 ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id)); 4195 panic("esp_handle: current_SC == penguin within interrupt!"); 4196 } 4197 4198 if (esp->ireg & (ESP_INTR_IC)) { 4199 /* Illegal command fed to ESP. Outside of obvious 4200 * software bugs that could cause this, there is 4201 * a condition with esp100 where we can confuse the 4202 * ESP into an erroneous illegal command interrupt 4203 * because it does not scrape the FIFO properly 4204 * for reselection. See esp100_reconnect_hwbug() 4205 * to see how we try very hard to avoid this. 4206 */ 4207 ESPLOG(("esp%d: invalid command\n", esp->esp_id)); 4208 4209 esp_dump_state(esp); 4210 4211 if (SCptr != NULL) { 4212 /* Devices with very buggy firmware can drop BSY 4213 * during a scatter list interrupt when using sync 4214 * mode transfers. We continue the transfer as 4215 * expected, the target drops the bus, the ESP 4216 * gets confused, and we get a illegal command 4217 * interrupt because the bus is in the disconnected 4218 * state now and ESP_CMD_TI is only allowed when 4219 * a nexus is alive on the bus. 4220 */ 4221 ESPLOG(("esp%d: Forcing async and disabling disconnect for " 4222 "target %d\n", esp->esp_id, SCptr->device->id)); 4223 SCptr->device->borken = 1; /* foo on you */ 4224 } 4225 4226 what_next = do_reset_bus; 4227 } else if (!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) { 4228 if (SCptr) { 4229 unsigned int phase = SCptr->SCp.phase; 4230 4231 if (phase & in_phases_mask) { 4232 what_next = esp_work_bus(esp); 4233 } else if (phase & in_slct_mask) { 4234 what_next = esp_select_complete(esp); 4235 } else { 4236 ESPLOG(("esp%d: interrupt for no good reason...\n", 4237 esp->esp_id)); 4238 what_next = do_intr_end; 4239 } 4240 } else { 4241 ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n", 4242 esp->esp_id)); 4243 what_next = do_reset_bus; 4244 } 4245 } else if (esp->ireg & ESP_INTR_SR) { 4246 ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id)); 4247 what_next = do_reset_complete; 4248 } else if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) { 4249 ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n", 4250 esp->esp_id)); 4251 what_next = do_reset_bus; 4252 } else if (esp->ireg & ESP_INTR_RSEL) { 4253 if (SCptr == NULL) { 4254 /* This is ok. */ 4255 what_next = esp_do_reconnect(esp); 4256 } else if (SCptr->SCp.phase & in_slct_mask) { 4257 /* Only selection code knows how to clean 4258 * up properly. 4259 */ 4260 ESPDISC(("Reselected during selection attempt\n")); 4261 what_next = esp_select_complete(esp); 4262 } else { 4263 ESPLOG(("esp%d: Reselected while bus is busy\n", 4264 esp->esp_id)); 4265 what_next = do_reset_bus; 4266 } 4267 } 4268 4269 /* This is tier-one in our dual level SCSI state machine. */ 4270state_machine: 4271 while (what_next != do_intr_end) { 4272 if (what_next >= do_phase_determine && 4273 what_next < do_intr_end) { 4274 what_next = isvc_vector[what_next](esp); 4275 } else { 4276 /* state is completely lost ;-( */ 4277 ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n", 4278 esp->esp_id)); 4279 what_next = do_reset_bus; 4280 } 4281 } 4282} 4283 4284/* Service only the ESP described by dev_id. */ 4285static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs) 4286{ 4287 struct esp *esp = dev_id; 4288 unsigned long flags; 4289 4290 spin_lock_irqsave(esp->ehost->host_lock, flags); 4291 if (ESP_IRQ_P(esp->dregs)) { 4292 ESP_INTSOFF(esp->dregs); 4293 4294 ESPIRQ(("I[%d:%d](", smp_processor_id(), esp->esp_id)); 4295 esp_handle(esp); 4296 ESPIRQ((")")); 4297 4298 ESP_INTSON(esp->dregs); 4299 } 4300 spin_unlock_irqrestore(esp->ehost->host_lock, flags); 4301 4302 return IRQ_HANDLED; 4303} 4304 4305static int esp_slave_alloc(struct scsi_device *SDptr) 4306{ 4307 struct esp_device *esp_dev = 4308 kmalloc(sizeof(struct esp_device), GFP_ATOMIC); 4309 4310 if (!esp_dev) 4311 return -ENOMEM; 4312 memset(esp_dev, 0, sizeof(struct esp_device)); 4313 SDptr->hostdata = esp_dev; 4314 return 0; 4315} 4316 4317static void esp_slave_destroy(struct scsi_device *SDptr) 4318{ 4319 struct esp *esp = (struct esp *) SDptr->host->hostdata; 4320 4321 esp->targets_present &= ~(1 << SDptr->id); 4322 kfree(SDptr->hostdata); 4323 SDptr->hostdata = NULL; 4324} 4325 4326static struct scsi_host_template esp_template = { 4327 .module = THIS_MODULE, 4328 .name = "esp", 4329 .info = esp_info, 4330 .slave_alloc = esp_slave_alloc, 4331 .slave_destroy = esp_slave_destroy, 4332 .queuecommand = esp_queue, 4333 .eh_abort_handler = esp_abort, 4334 .eh_bus_reset_handler = esp_reset, 4335 .can_queue = 7, 4336 .this_id = 7, 4337 .sg_tablesize = SG_ALL, 4338 .cmd_per_lun = 1, 4339 .use_clustering = ENABLE_CLUSTERING, 4340 .proc_name = "esp", 4341 .proc_info = esp_proc_info, 4342}; 4343 4344#ifndef CONFIG_SUN4 4345static struct of_device_id esp_match[] = { 4346 { 4347 .name = "SUNW,esp", 4348 .data = &esp_template, 4349 }, 4350 { 4351 .name = "SUNW,fas", 4352 .data = &esp_template, 4353 }, 4354 { 4355 .name = "esp", 4356 .data = &esp_template, 4357 }, 4358 {}, 4359}; 4360MODULE_DEVICE_TABLE(of, esp_match); 4361 4362static struct of_platform_driver esp_sbus_driver = { 4363 .name = "esp", 4364 .match_table = esp_match, 4365 .probe = esp_sbus_probe, 4366 .remove = __devexit_p(esp_sbus_remove), 4367}; 4368#endif 4369 4370static int __init esp_init(void) 4371{ 4372#ifdef CONFIG_SUN4 4373 return esp_sun4_probe(&esp_template); 4374#else 4375 return of_register_driver(&esp_sbus_driver, &sbus_bus_type); 4376#endif 4377} 4378 4379static void __exit esp_exit(void) 4380{ 4381#ifdef CONFIG_SUN4 4382 esp_sun4_remove(); 4383#else 4384 of_unregister_driver(&esp_sbus_driver); 4385#endif 4386} 4387 4388MODULE_DESCRIPTION("ESP Sun SCSI driver"); 4389MODULE_AUTHOR("David S. Miller (davem@davemloft.net)"); 4390MODULE_LICENSE("GPL"); 4391MODULE_VERSION(DRV_VERSION); 4392 4393module_init(esp_init); 4394module_exit(esp_exit);