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1#ifndef _ASM_POWERPC_IO_H 2#define _ASM_POWERPC_IO_H 3#ifdef __KERNEL__ 4 5/* 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12/* Check of existence of legacy devices */ 13extern int check_legacy_ioport(unsigned long base_port); 14 15#ifndef CONFIG_PPC64 16#include <asm-ppc/io.h> 17#else 18 19#include <linux/compiler.h> 20#include <asm/page.h> 21#include <asm/byteorder.h> 22#ifdef CONFIG_PPC_ISERIES 23#include <asm/iseries/iseries_io.h> 24#endif 25#include <asm/synch.h> 26#include <asm/delay.h> 27 28#include <asm-generic/iomap.h> 29 30#define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c)) 31#define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c)) 32#define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c)) 33#define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c)) 34 35 36#define SIO_CONFIG_RA 0x398 37#define SIO_CONFIG_RD 0x399 38 39#define SLOW_DOWN_IO 40 41extern unsigned long isa_io_base; 42extern unsigned long pci_io_base; 43 44#ifdef CONFIG_PPC_ISERIES 45/* __raw_* accessors aren't supported on iSeries */ 46#define __raw_readb(addr) { BUG(); 0; } 47#define __raw_readw(addr) { BUG(); 0; } 48#define __raw_readl(addr) { BUG(); 0; } 49#define __raw_readq(addr) { BUG(); 0; } 50#define __raw_writeb(v, addr) { BUG(); 0; } 51#define __raw_writew(v, addr) { BUG(); 0; } 52#define __raw_writel(v, addr) { BUG(); 0; } 53#define __raw_writeq(v, addr) { BUG(); 0; } 54#define readb(addr) iSeries_Read_Byte(addr) 55#define readw(addr) iSeries_Read_Word(addr) 56#define readl(addr) iSeries_Read_Long(addr) 57#define writeb(data, addr) iSeries_Write_Byte((data),(addr)) 58#define writew(data, addr) iSeries_Write_Word((data),(addr)) 59#define writel(data, addr) iSeries_Write_Long((data),(addr)) 60#define memset_io(a,b,c) iSeries_memset_io((a),(b),(c)) 61#define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c)) 62#define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c)) 63 64#define inb(addr) readb(((void __iomem *)(long)(addr))) 65#define inw(addr) readw(((void __iomem *)(long)(addr))) 66#define inl(addr) readl(((void __iomem *)(long)(addr))) 67#define outb(data,addr) writeb(data,((void __iomem *)(long)(addr))) 68#define outw(data,addr) writew(data,((void __iomem *)(long)(addr))) 69#define outl(data,addr) writel(data,((void __iomem *)(long)(addr))) 70/* 71 * The *_ns versions below don't do byte-swapping. 72 * Neither do the standard versions now, these are just here 73 * for older code. 74 */ 75#define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) 76#define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) 77#else 78 79static inline unsigned char __raw_readb(const volatile void __iomem *addr) 80{ 81 return *(volatile unsigned char __force *)addr; 82} 83static inline unsigned short __raw_readw(const volatile void __iomem *addr) 84{ 85 return *(volatile unsigned short __force *)addr; 86} 87static inline unsigned int __raw_readl(const volatile void __iomem *addr) 88{ 89 return *(volatile unsigned int __force *)addr; 90} 91static inline unsigned long __raw_readq(const volatile void __iomem *addr) 92{ 93 return *(volatile unsigned long __force *)addr; 94} 95static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) 96{ 97 *(volatile unsigned char __force *)addr = v; 98} 99static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) 100{ 101 *(volatile unsigned short __force *)addr = v; 102} 103static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) 104{ 105 *(volatile unsigned int __force *)addr = v; 106} 107static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) 108{ 109 *(volatile unsigned long __force *)addr = v; 110} 111#define readb(addr) eeh_readb(addr) 112#define readw(addr) eeh_readw(addr) 113#define readl(addr) eeh_readl(addr) 114#define readq(addr) eeh_readq(addr) 115#define writeb(data, addr) eeh_writeb((data), (addr)) 116#define writew(data, addr) eeh_writew((data), (addr)) 117#define writel(data, addr) eeh_writel((data), (addr)) 118#define writeq(data, addr) eeh_writeq((data), (addr)) 119#define memset_io(a,b,c) eeh_memset_io((a),(b),(c)) 120#define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c)) 121#define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c)) 122#define inb(port) eeh_inb((unsigned long)port) 123#define outb(val, port) eeh_outb(val, (unsigned long)port) 124#define inw(port) eeh_inw((unsigned long)port) 125#define outw(val, port) eeh_outw(val, (unsigned long)port) 126#define inl(port) eeh_inl((unsigned long)port) 127#define outl(val, port) eeh_outl(val, (unsigned long)port) 128 129/* 130 * The insw/outsw/insl/outsl macros don't do byte-swapping. 131 * They are only used in practice for transferring buffers which 132 * are arrays of bytes, and byte-swapping is not appropriate in 133 * that case. - paulus */ 134#define insb(port, buf, ns) eeh_insb((port), (buf), (ns)) 135#define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns)) 136#define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl)) 137#define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns)) 138#define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl)) 139 140#define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns)) 141#define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) 142#define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) 143 144#endif 145 146#define readb_relaxed(addr) readb(addr) 147#define readw_relaxed(addr) readw(addr) 148#define readl_relaxed(addr) readl(addr) 149#define readq_relaxed(addr) readq(addr) 150 151extern void _insb(volatile u8 __iomem *port, void *buf, int ns); 152extern void _outsb(volatile u8 __iomem *port, const void *buf, int ns); 153extern void _insw(volatile u16 __iomem *port, void *buf, int ns); 154extern void _outsw(volatile u16 __iomem *port, const void *buf, int ns); 155extern void _insl(volatile u32 __iomem *port, void *buf, int nl); 156extern void _outsl(volatile u32 __iomem *port, const void *buf, int nl); 157extern void _insw_ns(volatile u16 __iomem *port, void *buf, int ns); 158extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, int ns); 159extern void _insl_ns(volatile u32 __iomem *port, void *buf, int nl); 160extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl); 161 162#define mmiowb() 163 164/* 165 * output pause versions need a delay at least for the 166 * w83c105 ide controller in a p610. 167 */ 168#define inb_p(port) inb(port) 169#define outb_p(val, port) (udelay(1), outb((val), (port))) 170#define inw_p(port) inw(port) 171#define outw_p(val, port) (udelay(1), outw((val), (port))) 172#define inl_p(port) inl(port) 173#define outl_p(val, port) (udelay(1), outl((val), (port))) 174 175/* 176 * The *_ns versions below don't do byte-swapping. 177 * Neither do the standard versions now, these are just here 178 * for older code. 179 */ 180#define outsw_ns(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) 181#define outsl_ns(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) 182 183 184#define IO_SPACE_LIMIT ~(0UL) 185 186 187extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr, 188 unsigned long size, unsigned long flags); 189extern void __iomem *__ioremap(unsigned long address, unsigned long size, 190 unsigned long flags); 191 192/** 193 * ioremap - map bus memory into CPU space 194 * @address: bus address of the memory 195 * @size: size of the resource to map 196 * 197 * ioremap performs a platform specific sequence of operations to 198 * make bus memory CPU accessible via the readb/readw/readl/writeb/ 199 * writew/writel functions and the other mmio helpers. The returned 200 * address is not guaranteed to be usable directly as a virtual 201 * address. 202 */ 203extern void __iomem *ioremap(unsigned long address, unsigned long size); 204 205#define ioremap_nocache(addr, size) ioremap((addr), (size)) 206extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size); 207extern void iounmap(volatile void __iomem *addr); 208extern void __iomem * reserve_phb_iospace(unsigned long size); 209 210/** 211 * virt_to_phys - map virtual addresses to physical 212 * @address: address to remap 213 * 214 * The returned physical address is the physical (CPU) mapping for 215 * the memory address given. It is only valid to use this function on 216 * addresses directly mapped or allocated via kmalloc. 217 * 218 * This function does not give bus mappings for DMA transfers. In 219 * almost all conceivable cases a device driver should not be using 220 * this function 221 */ 222static inline unsigned long virt_to_phys(volatile void * address) 223{ 224 return __pa((unsigned long)address); 225} 226 227/** 228 * phys_to_virt - map physical address to virtual 229 * @address: address to remap 230 * 231 * The returned virtual address is a current CPU mapping for 232 * the memory address given. It is only valid to use this function on 233 * addresses that have a kernel mapping 234 * 235 * This function does not handle bus mappings for DMA transfers. In 236 * almost all conceivable cases a device driver should not be using 237 * this function 238 */ 239static inline void * phys_to_virt(unsigned long address) 240{ 241 return (void *)__va(address); 242} 243 244/* 245 * Change "struct page" to physical address. 246 */ 247#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 248 249/* We do NOT want virtual merging, it would put too much pressure on 250 * our iommu allocator. Instead, we want drivers to be smart enough 251 * to coalesce sglists that happen to have been mapped in a contiguous 252 * way by the iommu 253 */ 254#define BIO_VMERGE_BOUNDARY 0 255 256static inline void iosync(void) 257{ 258 __asm__ __volatile__ ("sync" : : : "memory"); 259} 260 261/* Enforce in-order execution of data I/O. 262 * No distinction between read/write on PPC; use eieio for all three. 263 */ 264#define iobarrier_rw() eieio() 265#define iobarrier_r() eieio() 266#define iobarrier_w() eieio() 267 268/* 269 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. 270 * These routines do not perform EEH-related I/O address translation, 271 * and should not be used directly by device drivers. Use inb/readb 272 * instead. 273 */ 274static inline int in_8(const volatile unsigned char __iomem *addr) 275{ 276 int ret; 277 278 __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync" 279 : "=r" (ret) : "m" (*addr)); 280 return ret; 281} 282 283static inline void out_8(volatile unsigned char __iomem *addr, int val) 284{ 285 __asm__ __volatile__("stb%U0%X0 %1,%0; sync" 286 : "=m" (*addr) : "r" (val)); 287} 288 289static inline int in_le16(const volatile unsigned short __iomem *addr) 290{ 291 int ret; 292 293 __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync" 294 : "=r" (ret) : "r" (addr), "m" (*addr)); 295 return ret; 296} 297 298static inline int in_be16(const volatile unsigned short __iomem *addr) 299{ 300 int ret; 301 302 __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync" 303 : "=r" (ret) : "m" (*addr)); 304 return ret; 305} 306 307static inline void out_le16(volatile unsigned short __iomem *addr, int val) 308{ 309 __asm__ __volatile__("sthbrx %1,0,%2; sync" 310 : "=m" (*addr) : "r" (val), "r" (addr)); 311} 312 313static inline void out_be16(volatile unsigned short __iomem *addr, int val) 314{ 315 __asm__ __volatile__("sth%U0%X0 %1,%0; sync" 316 : "=m" (*addr) : "r" (val)); 317} 318 319static inline unsigned in_le32(const volatile unsigned __iomem *addr) 320{ 321 unsigned ret; 322 323 __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync" 324 : "=r" (ret) : "r" (addr), "m" (*addr)); 325 return ret; 326} 327 328static inline unsigned in_be32(const volatile unsigned __iomem *addr) 329{ 330 unsigned ret; 331 332 __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync" 333 : "=r" (ret) : "m" (*addr)); 334 return ret; 335} 336 337static inline void out_le32(volatile unsigned __iomem *addr, int val) 338{ 339 __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr) 340 : "r" (val), "r" (addr)); 341} 342 343static inline void out_be32(volatile unsigned __iomem *addr, int val) 344{ 345 __asm__ __volatile__("stw%U0%X0 %1,%0; sync" 346 : "=m" (*addr) : "r" (val)); 347} 348 349static inline unsigned long in_le64(const volatile unsigned long __iomem *addr) 350{ 351 unsigned long tmp, ret; 352 353 __asm__ __volatile__( 354 "ld %1,0(%2)\n" 355 "twi 0,%1,0\n" 356 "isync\n" 357 "rldimi %0,%1,5*8,1*8\n" 358 "rldimi %0,%1,3*8,2*8\n" 359 "rldimi %0,%1,1*8,3*8\n" 360 "rldimi %0,%1,7*8,4*8\n" 361 "rldicl %1,%1,32,0\n" 362 "rlwimi %0,%1,8,8,31\n" 363 "rlwimi %0,%1,24,16,23\n" 364 : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr)); 365 return ret; 366} 367 368static inline unsigned long in_be64(const volatile unsigned long __iomem *addr) 369{ 370 unsigned long ret; 371 372 __asm__ __volatile__("ld%U1%X1 %0,%1; twi 0,%0,0; isync" 373 : "=r" (ret) : "m" (*addr)); 374 return ret; 375} 376 377static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long val) 378{ 379 unsigned long tmp; 380 381 __asm__ __volatile__( 382 "rldimi %0,%1,5*8,1*8\n" 383 "rldimi %0,%1,3*8,2*8\n" 384 "rldimi %0,%1,1*8,3*8\n" 385 "rldimi %0,%1,7*8,4*8\n" 386 "rldicl %1,%1,32,0\n" 387 "rlwimi %0,%1,8,8,31\n" 388 "rlwimi %0,%1,24,16,23\n" 389 "std %0,0(%3)\n" 390 "sync" 391 : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr)); 392} 393 394static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long val) 395{ 396 __asm__ __volatile__("std%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val)); 397} 398 399#ifndef CONFIG_PPC_ISERIES 400#include <asm/eeh.h> 401#endif 402 403/** 404 * check_signature - find BIOS signatures 405 * @io_addr: mmio address to check 406 * @signature: signature block 407 * @length: length of signature 408 * 409 * Perform a signature comparison with the mmio address io_addr. This 410 * address should have been obtained by ioremap. 411 * Returns 1 on a match. 412 */ 413static inline int check_signature(const volatile void __iomem * io_addr, 414 const unsigned char *signature, int length) 415{ 416 int retval = 0; 417#ifndef CONFIG_PPC_ISERIES 418 do { 419 if (readb(io_addr) != *signature) 420 goto out; 421 io_addr++; 422 signature++; 423 length--; 424 } while (length); 425 retval = 1; 426out: 427#endif 428 return retval; 429} 430 431/* Nothing to do */ 432 433#define dma_cache_inv(_start,_size) do { } while (0) 434#define dma_cache_wback(_start,_size) do { } while (0) 435#define dma_cache_wback_inv(_start,_size) do { } while (0) 436 437 438/* 439 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 440 * access 441 */ 442#define xlate_dev_mem_ptr(p) __va(p) 443 444/* 445 * Convert a virtual cached pointer to an uncached pointer 446 */ 447#define xlate_dev_kmem_ptr(p) p 448 449#endif /* __KERNEL__ */ 450 451#endif /* CONFIG_PPC64 */ 452#endif /* _ASM_POWERPC_IO_H */