Linux kernel mirror (for testing)
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1/*
2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
32#include <linux/dma-mapping.h>
33#include <asm/io.h>
34#include <linux/ata.h>
35#include <linux/workqueue.h>
36
37/*
38 * compile-time options: to be removed as soon as all the drivers are
39 * converted to the new debugging mechanism
40 */
41#undef ATA_DEBUG /* debugging output */
42#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
43#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
44#undef ATA_NDEBUG /* define to disable quick runtime checks */
45#undef ATA_ENABLE_PATA /* define to enable PATA support in some
46 * low-level drivers */
47#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
48
49
50/* note: prints function name for you */
51#ifdef ATA_DEBUG
52#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
53#ifdef ATA_VERBOSE_DEBUG
54#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
55#else
56#define VPRINTK(fmt, args...)
57#endif /* ATA_VERBOSE_DEBUG */
58#else
59#define DPRINTK(fmt, args...)
60#define VPRINTK(fmt, args...)
61#endif /* ATA_DEBUG */
62
63#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64
65/* NEW: debug levels */
66#define HAVE_LIBATA_MSG 1
67
68enum {
69 ATA_MSG_DRV = 0x0001,
70 ATA_MSG_INFO = 0x0002,
71 ATA_MSG_PROBE = 0x0004,
72 ATA_MSG_WARN = 0x0008,
73 ATA_MSG_MALLOC = 0x0010,
74 ATA_MSG_CTL = 0x0020,
75 ATA_MSG_INTR = 0x0040,
76 ATA_MSG_ERR = 0x0080,
77};
78
79#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
80#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
81#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
82#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
83#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
84#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
85#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
86#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
87
88static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
89{
90 if (dval < 0 || dval >= (sizeof(u32) * 8))
91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
92 if (!dval)
93 return 0;
94 return (1 << dval) - 1;
95}
96
97/* defines only for the constants which don't work well as enums */
98#define ATA_TAG_POISON 0xfafbfcfdU
99
100/* move to PCI layer? */
101static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
102{
103 return &pdev->dev;
104}
105
106enum {
107 /* various global constants */
108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
109 ATA_MAX_PORTS = 8,
110 ATA_DEF_QUEUE = 1,
111 ATA_MAX_QUEUE = 1,
112 ATA_MAX_SECTORS = 200, /* FIXME */
113 ATA_MAX_BUS = 2,
114 ATA_DEF_BUSY_WAIT = 10000,
115 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
116
117 ATA_SHT_EMULATED = 1,
118 ATA_SHT_CMD_PER_LUN = 1,
119 ATA_SHT_THIS_ID = -1,
120 ATA_SHT_USE_CLUSTERING = 1,
121
122 /* struct ata_device stuff */
123 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
124 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
125 ATA_DFLAG_LBA = (1 << 2), /* device supports LBA */
126
127 ATA_DEV_UNKNOWN = 0, /* unknown device */
128 ATA_DEV_ATA = 1, /* ATA device */
129 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
130 ATA_DEV_ATAPI = 3, /* ATAPI device */
131 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
132 ATA_DEV_NONE = 5, /* no device */
133
134 /* struct ata_port flags */
135 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
136 /* (doesn't imply presence) */
137 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
138 ATA_FLAG_SATA = (1 << 3),
139 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
140 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */
141 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
142 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */
143 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
144 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
145 * proper HSM is in place. */
146 ATA_FLAG_DEBUGMSG = (1 << 10),
147 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
148
149 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
150
151 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
152 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
153
154 ATA_FLAG_FLUSH_PORT_TASK = (1 << 15), /* Flush port task */
155 ATA_FLAG_IN_EH = (1 << 16), /* EH in progress */
156
157 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
158 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
159 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
160 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
161 ATA_QCFLAG_EH_SCHEDULED = (1 << 5), /* EH scheduled */
162
163 /* host set flags */
164 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */
165
166 /* various lengths of time */
167 ATA_TMOUT_PIO = 30 * HZ,
168 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
169 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
170 ATA_TMOUT_CDB = 30 * HZ,
171 ATA_TMOUT_CDB_QUICK = 5 * HZ,
172 ATA_TMOUT_INTERNAL = 30 * HZ,
173 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
174
175 /* ATA bus states */
176 BUS_UNKNOWN = 0,
177 BUS_DMA = 1,
178 BUS_IDLE = 2,
179 BUS_NOINTR = 3,
180 BUS_NODATA = 4,
181 BUS_TIMER = 5,
182 BUS_PIO = 6,
183 BUS_EDD = 7,
184 BUS_IDENTIFY = 8,
185 BUS_PACKET = 9,
186
187 /* SATA port states */
188 PORT_UNKNOWN = 0,
189 PORT_ENABLED = 1,
190 PORT_DISABLED = 2,
191
192 /* encoding various smaller bitmaps into a single
193 * unsigned int bitmap
194 */
195 ATA_BITS_PIO = 5,
196 ATA_BITS_MWDMA = 3,
197 ATA_BITS_UDMA = 8,
198
199 ATA_SHIFT_PIO = 0,
200 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO,
201 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
202
203 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
204 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
205 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
206
207 /* size of buffer to pad xfers ending on unaligned boundaries */
208 ATA_DMA_PAD_SZ = 4,
209 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
210
211 /* Masks for port functions */
212 ATA_PORT_PRIMARY = (1 << 0),
213 ATA_PORT_SECONDARY = (1 << 1),
214};
215
216enum hsm_task_states {
217 HSM_ST_UNKNOWN,
218 HSM_ST_IDLE,
219 HSM_ST_POLL,
220 HSM_ST_TMOUT,
221 HSM_ST,
222 HSM_ST_LAST,
223 HSM_ST_LAST_POLL,
224 HSM_ST_ERR,
225};
226
227enum ata_completion_errors {
228 AC_ERR_DEV = (1 << 0), /* device reported error */
229 AC_ERR_HSM = (1 << 1), /* host state machine violation */
230 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
231 AC_ERR_MEDIA = (1 << 3), /* media error */
232 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
233 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
234 AC_ERR_SYSTEM = (1 << 6), /* system error */
235 AC_ERR_INVALID = (1 << 7), /* invalid argument */
236 AC_ERR_OTHER = (1 << 8), /* unknown */
237};
238
239/* forward declarations */
240struct scsi_device;
241struct ata_port_operations;
242struct ata_port;
243struct ata_queued_cmd;
244
245/* typedefs */
246typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
247typedef void (*ata_probeinit_fn_t)(struct ata_port *);
248typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *);
249typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *);
250
251struct ata_ioports {
252 unsigned long cmd_addr;
253 unsigned long data_addr;
254 unsigned long error_addr;
255 unsigned long feature_addr;
256 unsigned long nsect_addr;
257 unsigned long lbal_addr;
258 unsigned long lbam_addr;
259 unsigned long lbah_addr;
260 unsigned long device_addr;
261 unsigned long status_addr;
262 unsigned long command_addr;
263 unsigned long altstatus_addr;
264 unsigned long ctl_addr;
265 unsigned long bmdma_addr;
266 unsigned long scr_addr;
267};
268
269struct ata_probe_ent {
270 struct list_head node;
271 struct device *dev;
272 const struct ata_port_operations *port_ops;
273 struct scsi_host_template *sht;
274 struct ata_ioports port[ATA_MAX_PORTS];
275 unsigned int n_ports;
276 unsigned int hard_port_no;
277 unsigned int pio_mask;
278 unsigned int mwdma_mask;
279 unsigned int udma_mask;
280 unsigned int legacy_mode;
281 unsigned long irq;
282 unsigned int irq_flags;
283 unsigned long host_flags;
284 unsigned long host_set_flags;
285 void __iomem *mmio_base;
286 void *private_data;
287};
288
289struct ata_host_set {
290 spinlock_t lock;
291 struct device *dev;
292 unsigned long irq;
293 void __iomem *mmio_base;
294 unsigned int n_ports;
295 void *private_data;
296 const struct ata_port_operations *ops;
297 unsigned long flags;
298 int simplex_claimed; /* Keep seperate in case we
299 ever need to do this locked */
300 struct ata_port * ports[0];
301};
302
303struct ata_queued_cmd {
304 struct ata_port *ap;
305 struct ata_device *dev;
306
307 struct scsi_cmnd *scsicmd;
308 void (*scsidone)(struct scsi_cmnd *);
309
310 struct ata_taskfile tf;
311 u8 cdb[ATAPI_CDB_LEN];
312
313 unsigned long flags; /* ATA_QCFLAG_xxx */
314 unsigned int tag;
315 unsigned int n_elem;
316 unsigned int orig_n_elem;
317
318 int dma_dir;
319
320 unsigned int pad_len;
321
322 unsigned int nsect;
323 unsigned int cursect;
324
325 unsigned int nbytes;
326 unsigned int curbytes;
327
328 unsigned int cursg;
329 unsigned int cursg_ofs;
330
331 struct scatterlist sgent;
332 struct scatterlist pad_sgent;
333 void *buf_virt;
334
335 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
336 struct scatterlist *__sg;
337
338 unsigned int err_mask;
339
340 ata_qc_cb_t complete_fn;
341
342 void *private_data;
343};
344
345struct ata_host_stats {
346 unsigned long unhandled_irq;
347 unsigned long idle_irq;
348 unsigned long rw_reqbuf;
349};
350
351struct ata_device {
352 u64 n_sectors; /* size of device, if ATA */
353 unsigned long flags; /* ATA_DFLAG_xxx */
354 unsigned int class; /* ATA_DEV_xxx */
355 unsigned int devno; /* 0 or 1 */
356 u16 *id; /* IDENTIFY xxx DEVICE data */
357 u8 pio_mode;
358 u8 dma_mode;
359 u8 xfer_mode;
360 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
361
362 unsigned int multi_count; /* sectors count for
363 READ/WRITE MULTIPLE */
364 unsigned int max_sectors; /* per-device max sectors */
365 unsigned int cdb_len;
366
367 /* per-dev xfer mask */
368 unsigned int pio_mask;
369 unsigned int mwdma_mask;
370 unsigned int udma_mask;
371
372 /* for CHS addressing */
373 u16 cylinders; /* Number of cylinders */
374 u16 heads; /* Number of heads */
375 u16 sectors; /* Number of sectors per track */
376};
377
378struct ata_port {
379 struct Scsi_Host *host; /* our co-allocated scsi host */
380 const struct ata_port_operations *ops;
381 unsigned long flags; /* ATA_FLAG_xxx */
382 unsigned int id; /* unique id req'd by scsi midlyr */
383 unsigned int port_no; /* unique port #; from zero */
384 unsigned int hard_port_no; /* hardware port #; from zero */
385
386 struct ata_prd *prd; /* our SG list */
387 dma_addr_t prd_dma; /* and its DMA mapping */
388
389 void *pad; /* array of DMA pad buffers */
390 dma_addr_t pad_dma;
391
392 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
393
394 u8 ctl; /* cache of ATA control register */
395 u8 last_ctl; /* Cache last written value */
396 unsigned int pio_mask;
397 unsigned int mwdma_mask;
398 unsigned int udma_mask;
399 unsigned int cbl; /* cable type; ATA_CBL_xxx */
400
401 struct ata_device device[ATA_MAX_DEVICES];
402
403 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
404 unsigned long qactive;
405 unsigned int active_tag;
406
407 struct ata_host_stats stats;
408 struct ata_host_set *host_set;
409 struct device *dev;
410
411 struct work_struct port_task;
412
413 unsigned int hsm_task_state;
414 unsigned long pio_task_timeout;
415
416 u32 msg_enable;
417 struct list_head eh_done_q;
418
419 void *private_data;
420};
421
422struct ata_port_operations {
423 void (*port_disable) (struct ata_port *);
424
425 void (*dev_config) (struct ata_port *, struct ata_device *);
426
427 void (*set_piomode) (struct ata_port *, struct ata_device *);
428 void (*set_dmamode) (struct ata_port *, struct ata_device *);
429 unsigned long (*mode_filter) (const struct ata_port *, struct ata_device *, unsigned long);
430
431 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
432 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
433
434 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
435 u8 (*check_status)(struct ata_port *ap);
436 u8 (*check_altstatus)(struct ata_port *ap);
437 void (*dev_select)(struct ata_port *ap, unsigned int device);
438
439 void (*phy_reset) (struct ata_port *ap); /* obsolete */
440 void (*set_mode) (struct ata_port *ap);
441 int (*probe_reset) (struct ata_port *ap, unsigned int *classes);
442
443 void (*post_set_mode) (struct ata_port *ap);
444
445 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
446
447 void (*bmdma_setup) (struct ata_queued_cmd *qc);
448 void (*bmdma_start) (struct ata_queued_cmd *qc);
449
450 void (*qc_prep) (struct ata_queued_cmd *qc);
451 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
452
453 void (*eng_timeout) (struct ata_port *ap);
454
455 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
456 void (*irq_clear) (struct ata_port *);
457
458 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
459 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
460 u32 val);
461
462 int (*port_start) (struct ata_port *ap);
463 void (*port_stop) (struct ata_port *ap);
464
465 void (*host_stop) (struct ata_host_set *host_set);
466
467 void (*bmdma_stop) (struct ata_queued_cmd *qc);
468 u8 (*bmdma_status) (struct ata_port *ap);
469};
470
471struct ata_port_info {
472 struct scsi_host_template *sht;
473 unsigned long host_flags;
474 unsigned long pio_mask;
475 unsigned long mwdma_mask;
476 unsigned long udma_mask;
477 const struct ata_port_operations *port_ops;
478 void *private_data;
479};
480
481struct ata_timing {
482 unsigned short mode; /* ATA mode */
483 unsigned short setup; /* t1 */
484 unsigned short act8b; /* t2 for 8-bit I/O */
485 unsigned short rec8b; /* t2i for 8-bit I/O */
486 unsigned short cyc8b; /* t0 for 8-bit I/O */
487 unsigned short active; /* t2 or tD */
488 unsigned short recover; /* t2i or tK */
489 unsigned short cycle; /* t0 */
490 unsigned short udma; /* t2CYCTYP/2 */
491};
492
493#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
494
495extern void ata_port_probe(struct ata_port *);
496extern void __sata_phy_reset(struct ata_port *ap);
497extern void sata_phy_reset(struct ata_port *ap);
498extern void ata_bus_reset(struct ata_port *ap);
499extern int ata_drive_probe_reset(struct ata_port *ap,
500 ata_probeinit_fn_t probeinit,
501 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
502 ata_postreset_fn_t postreset, unsigned int *classes);
503extern void ata_std_probeinit(struct ata_port *ap);
504extern int ata_std_softreset(struct ata_port *ap, int verbose,
505 unsigned int *classes);
506extern int sata_std_hardreset(struct ata_port *ap, int verbose,
507 unsigned int *class);
508extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
509extern int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
510 int post_reset);
511extern void ata_port_disable(struct ata_port *);
512extern void ata_std_ports(struct ata_ioports *ioaddr);
513#ifdef CONFIG_PCI
514extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
515 unsigned int n_ports);
516extern void ata_pci_remove_one (struct pci_dev *pdev);
517extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
518extern int ata_pci_device_resume(struct pci_dev *pdev);
519extern int ata_pci_clear_simplex(struct pci_dev *pdev);
520#endif /* CONFIG_PCI */
521extern int ata_device_add(const struct ata_probe_ent *ent);
522extern void ata_host_set_remove(struct ata_host_set *host_set);
523extern int ata_scsi_detect(struct scsi_host_template *sht);
524extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
525extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
526extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
527extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
528extern int ata_scsi_release(struct Scsi_Host *host);
529extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
530extern int ata_scsi_device_resume(struct scsi_device *);
531extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t state);
532extern int ata_device_resume(struct ata_port *, struct ata_device *);
533extern int ata_device_suspend(struct ata_port *, struct ata_device *, pm_message_t state);
534extern int ata_ratelimit(void);
535extern unsigned int ata_busy_sleep(struct ata_port *ap,
536 unsigned long timeout_pat,
537 unsigned long timeout);
538extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *),
539 void *data, unsigned long delay);
540
541/*
542 * Default driver ops implementations
543 */
544extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
545extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
546extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
547extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
548extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
549extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
550extern u8 ata_check_status(struct ata_port *ap);
551extern u8 ata_altstatus(struct ata_port *ap);
552extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
553extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes);
554extern int ata_port_start (struct ata_port *ap);
555extern void ata_port_stop (struct ata_port *ap);
556extern void ata_host_stop (struct ata_host_set *host_set);
557extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
558extern void ata_qc_prep(struct ata_queued_cmd *qc);
559extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
560extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
561extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
562 unsigned int buflen);
563extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
564 unsigned int n_elem);
565extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
566extern void ata_id_string(const u16 *id, unsigned char *s,
567 unsigned int ofs, unsigned int len);
568extern void ata_id_c_string(const u16 *id, unsigned char *s,
569 unsigned int ofs, unsigned int len);
570extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
571extern void ata_bmdma_start (struct ata_queued_cmd *qc);
572extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
573extern u8 ata_bmdma_status(struct ata_port *ap);
574extern void ata_bmdma_irq_clear(struct ata_port *ap);
575extern void __ata_qc_complete(struct ata_queued_cmd *qc);
576extern void ata_eng_timeout(struct ata_port *ap);
577extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
578 struct scsi_cmnd *cmd,
579 void (*done)(struct scsi_cmnd *));
580extern int ata_std_bios_param(struct scsi_device *sdev,
581 struct block_device *bdev,
582 sector_t capacity, int geom[]);
583extern int ata_scsi_slave_config(struct scsi_device *sdev);
584extern struct ata_device *ata_dev_pair(struct ata_port *ap,
585 struct ata_device *adev);
586
587/*
588 * Timing helpers
589 */
590
591extern unsigned int ata_pio_need_iordy(const struct ata_device *);
592extern int ata_timing_compute(struct ata_device *, unsigned short,
593 struct ata_timing *, int, int);
594extern void ata_timing_merge(const struct ata_timing *,
595 const struct ata_timing *, struct ata_timing *,
596 unsigned int);
597
598enum {
599 ATA_TIMING_SETUP = (1 << 0),
600 ATA_TIMING_ACT8B = (1 << 1),
601 ATA_TIMING_REC8B = (1 << 2),
602 ATA_TIMING_CYC8B = (1 << 3),
603 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
604 ATA_TIMING_CYC8B,
605 ATA_TIMING_ACTIVE = (1 << 4),
606 ATA_TIMING_RECOVER = (1 << 5),
607 ATA_TIMING_CYCLE = (1 << 6),
608 ATA_TIMING_UDMA = (1 << 7),
609 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
610 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
611 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
612 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
613};
614
615
616#ifdef CONFIG_PCI
617struct pci_bits {
618 unsigned int reg; /* PCI config register to read */
619 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
620 unsigned long mask;
621 unsigned long val;
622};
623
624extern void ata_pci_host_stop (struct ata_host_set *host_set);
625extern struct ata_probe_ent *
626ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
627extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
628extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
629#endif /* CONFIG_PCI */
630
631
632static inline int
633ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
634{
635 if (sg == &qc->pad_sgent)
636 return 1;
637 if (qc->pad_len)
638 return 0;
639 if (((sg - qc->__sg) + 1) == qc->n_elem)
640 return 1;
641 return 0;
642}
643
644static inline struct scatterlist *
645ata_qc_first_sg(struct ata_queued_cmd *qc)
646{
647 if (qc->n_elem)
648 return qc->__sg;
649 if (qc->pad_len)
650 return &qc->pad_sgent;
651 return NULL;
652}
653
654static inline struct scatterlist *
655ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
656{
657 if (sg == &qc->pad_sgent)
658 return NULL;
659 if (++sg - qc->__sg < qc->n_elem)
660 return sg;
661 if (qc->pad_len)
662 return &qc->pad_sgent;
663 return NULL;
664}
665
666#define ata_for_each_sg(sg, qc) \
667 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
668
669static inline unsigned int ata_tag_valid(unsigned int tag)
670{
671 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
672}
673
674static inline unsigned int ata_class_present(unsigned int class)
675{
676 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
677}
678
679static inline unsigned int ata_dev_present(const struct ata_device *dev)
680{
681 return ata_class_present(dev->class);
682}
683
684static inline u8 ata_chk_status(struct ata_port *ap)
685{
686 return ap->ops->check_status(ap);
687}
688
689
690/**
691 * ata_pause - Flush writes and pause 400 nanoseconds.
692 * @ap: Port to wait for.
693 *
694 * LOCKING:
695 * Inherited from caller.
696 */
697
698static inline void ata_pause(struct ata_port *ap)
699{
700 ata_altstatus(ap);
701 ndelay(400);
702}
703
704
705/**
706 * ata_busy_wait - Wait for a port status register
707 * @ap: Port to wait for.
708 *
709 * Waits up to max*10 microseconds for the selected bits in the port's
710 * status register to be cleared.
711 * Returns final value of status register.
712 *
713 * LOCKING:
714 * Inherited from caller.
715 */
716
717static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
718 unsigned int max)
719{
720 u8 status;
721
722 do {
723 udelay(10);
724 status = ata_chk_status(ap);
725 max--;
726 } while ((status & bits) && (max > 0));
727
728 return status;
729}
730
731
732/**
733 * ata_wait_idle - Wait for a port to be idle.
734 * @ap: Port to wait for.
735 *
736 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
737 * Returns final value of status register.
738 *
739 * LOCKING:
740 * Inherited from caller.
741 */
742
743static inline u8 ata_wait_idle(struct ata_port *ap)
744{
745 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
746
747 if (status & (ATA_BUSY | ATA_DRQ)) {
748 unsigned long l = ap->ioaddr.status_addr;
749 if (ata_msg_warn(ap))
750 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
751 status, l);
752 }
753
754 return status;
755}
756
757static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
758{
759 qc->tf.ctl |= ATA_NIEN;
760}
761
762static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
763 unsigned int tag)
764{
765 if (likely(ata_tag_valid(tag)))
766 return &ap->qcmd[tag];
767 return NULL;
768}
769
770static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
771{
772 memset(tf, 0, sizeof(*tf));
773
774 tf->ctl = ap->ctl;
775 if (device == 0)
776 tf->device = ATA_DEVICE_OBS;
777 else
778 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
779}
780
781static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
782{
783 qc->__sg = NULL;
784 qc->flags = 0;
785 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
786 qc->nsect = 0;
787 qc->nbytes = qc->curbytes = 0;
788 qc->err_mask = 0;
789
790 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
791}
792
793/**
794 * ata_qc_complete - Complete an active ATA command
795 * @qc: Command to complete
796 * @err_mask: ATA Status register contents
797 *
798 * Indicate to the mid and upper layers that an ATA
799 * command has completed, with either an ok or not-ok status.
800 *
801 * LOCKING:
802 * spin_lock_irqsave(host_set lock)
803 */
804static inline void ata_qc_complete(struct ata_queued_cmd *qc)
805{
806 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED))
807 return;
808
809 __ata_qc_complete(qc);
810}
811
812/**
813 * ata_irq_on - Enable interrupts on a port.
814 * @ap: Port on which interrupts are enabled.
815 *
816 * Enable interrupts on a legacy IDE device using MMIO or PIO,
817 * wait for idle, clear any pending interrupts.
818 *
819 * LOCKING:
820 * Inherited from caller.
821 */
822
823static inline u8 ata_irq_on(struct ata_port *ap)
824{
825 struct ata_ioports *ioaddr = &ap->ioaddr;
826 u8 tmp;
827
828 ap->ctl &= ~ATA_NIEN;
829 ap->last_ctl = ap->ctl;
830
831 if (ap->flags & ATA_FLAG_MMIO)
832 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
833 else
834 outb(ap->ctl, ioaddr->ctl_addr);
835 tmp = ata_wait_idle(ap);
836
837 ap->ops->irq_clear(ap);
838
839 return tmp;
840}
841
842
843/**
844 * ata_irq_ack - Acknowledge a device interrupt.
845 * @ap: Port on which interrupts are enabled.
846 *
847 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
848 * or BUSY+DRQ clear). Obtain dma status and port status from
849 * device. Clear the interrupt. Return port status.
850 *
851 * LOCKING:
852 */
853
854static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
855{
856 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
857 u8 host_stat, post_stat, status;
858
859 status = ata_busy_wait(ap, bits, 1000);
860 if (status & bits)
861 if (ata_msg_err(ap))
862 printk(KERN_ERR "abnormal status 0x%X\n", status);
863
864 /* get controller status; clear intr, err bits */
865 if (ap->flags & ATA_FLAG_MMIO) {
866 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
867 host_stat = readb(mmio + ATA_DMA_STATUS);
868 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
869 mmio + ATA_DMA_STATUS);
870
871 post_stat = readb(mmio + ATA_DMA_STATUS);
872 } else {
873 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
874 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
875 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
876
877 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
878 }
879
880 if (ata_msg_intr(ap))
881 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
882 __FUNCTION__,
883 host_stat, post_stat, status);
884
885 return status;
886}
887
888static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
889{
890 return ap->ops->scr_read(ap, reg);
891}
892
893static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
894{
895 ap->ops->scr_write(ap, reg, val);
896}
897
898static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
899 u32 val)
900{
901 ap->ops->scr_write(ap, reg, val);
902 (void) ap->ops->scr_read(ap, reg);
903}
904
905static inline unsigned int sata_dev_present(struct ata_port *ap)
906{
907 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
908}
909
910static inline int ata_try_flush_cache(const struct ata_device *dev)
911{
912 return ata_id_wcache_enabled(dev->id) ||
913 ata_id_has_flush(dev->id) ||
914 ata_id_has_flush_ext(dev->id);
915}
916
917static inline unsigned int ac_err_mask(u8 status)
918{
919 if (status & ATA_BUSY)
920 return AC_ERR_HSM;
921 if (status & (ATA_ERR | ATA_DF))
922 return AC_ERR_DEV;
923 return 0;
924}
925
926static inline unsigned int __ac_err_mask(u8 status)
927{
928 unsigned int mask = ac_err_mask(status);
929 if (mask == 0)
930 return AC_ERR_OTHER;
931 return mask;
932}
933
934static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
935{
936 ap->pad_dma = 0;
937 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
938 &ap->pad_dma, GFP_KERNEL);
939 return (ap->pad == NULL) ? -ENOMEM : 0;
940}
941
942static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
943{
944 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
945}
946
947#endif /* __LINUX_LIBATA_H__ */