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1/* $Id: processor.h,v 1.83 2002/02/10 06:04:33 davem Exp $
2 * include/asm-sparc64/processor.h
3 *
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5 */
6
7#ifndef __ASM_SPARC64_PROCESSOR_H
8#define __ASM_SPARC64_PROCESSOR_H
9
10/*
11 * Sparc64 implementation of macro that returns current
12 * instruction pointer ("program counter").
13 */
14#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
15
16#include <linux/config.h>
17#include <asm/asi.h>
18#include <asm/a.out.h>
19#include <asm/pstate.h>
20#include <asm/ptrace.h>
21#include <asm/page.h>
22
23/* The sparc has no problems with write protection */
24#define wp_works_ok 1
25#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
26
27/*
28 * User lives in his very own context, and cannot reference us. Note
29 * that TASK_SIZE is a misnomer, it really gives maximum user virtual
30 * address that the kernel will allocate out.
31 *
32 * XXX No longer using virtual page tables, kill this upper limit...
33 */
34#define VA_BITS 44
35#ifndef __ASSEMBLY__
36#define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3))
37#else
38#define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3))
39#endif
40#define TASK_SIZE ((unsigned long)-VPTE_SIZE)
41
42#ifndef __ASSEMBLY__
43
44typedef struct {
45 unsigned char seg;
46} mm_segment_t;
47
48/* The Sparc processor specific thread struct. */
49/* XXX This should die, everything can go into thread_info now. */
50struct thread_struct {
51#ifdef CONFIG_DEBUG_SPINLOCK
52 /* How many spinlocks held by this thread.
53 * Used with spin lock debugging to catch tasks
54 * sleeping illegally with locks held.
55 */
56 int smp_lock_count;
57 unsigned int smp_lock_pc;
58#else
59 int dummy; /* f'in gcc bug... */
60#endif
61};
62
63#endif /* !(__ASSEMBLY__) */
64
65#ifndef CONFIG_DEBUG_SPINLOCK
66#define INIT_THREAD { \
67 0, \
68}
69#else /* CONFIG_DEBUG_SPINLOCK */
70#define INIT_THREAD { \
71/* smp_lock_count, smp_lock_pc, */ \
72 0, 0, \
73}
74#endif /* !(CONFIG_DEBUG_SPINLOCK) */
75
76#ifndef __ASSEMBLY__
77
78#include <linux/types.h>
79
80/* Return saved PC of a blocked thread. */
81struct task_struct;
82extern unsigned long thread_saved_pc(struct task_struct *);
83
84/* On Uniprocessor, even in RMO processes see TSO semantics */
85#ifdef CONFIG_SMP
86#define TSTATE_INITIAL_MM TSTATE_TSO
87#else
88#define TSTATE_INITIAL_MM TSTATE_RMO
89#endif
90
91/* Do necessary setup to start up a newly executed thread. */
92#define start_thread(regs, pc, sp) \
93do { \
94 unsigned long __asi = ASI_PNF; \
95 regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
96 regs->tpc = ((pc & (~3)) - 4); \
97 regs->tnpc = regs->tpc + 4; \
98 regs->y = 0; \
99 set_thread_wstate(1 << 3); \
100 if (current_thread_info()->utraps) { \
101 if (*(current_thread_info()->utraps) < 2) \
102 kfree(current_thread_info()->utraps); \
103 else \
104 (*(current_thread_info()->utraps))--; \
105 current_thread_info()->utraps = NULL; \
106 } \
107 __asm__ __volatile__( \
108 "stx %%g0, [%0 + %2 + 0x00]\n\t" \
109 "stx %%g0, [%0 + %2 + 0x08]\n\t" \
110 "stx %%g0, [%0 + %2 + 0x10]\n\t" \
111 "stx %%g0, [%0 + %2 + 0x18]\n\t" \
112 "stx %%g0, [%0 + %2 + 0x20]\n\t" \
113 "stx %%g0, [%0 + %2 + 0x28]\n\t" \
114 "stx %%g0, [%0 + %2 + 0x30]\n\t" \
115 "stx %%g0, [%0 + %2 + 0x38]\n\t" \
116 "stx %%g0, [%0 + %2 + 0x40]\n\t" \
117 "stx %%g0, [%0 + %2 + 0x48]\n\t" \
118 "stx %%g0, [%0 + %2 + 0x50]\n\t" \
119 "stx %%g0, [%0 + %2 + 0x58]\n\t" \
120 "stx %%g0, [%0 + %2 + 0x60]\n\t" \
121 "stx %%g0, [%0 + %2 + 0x68]\n\t" \
122 "stx %1, [%0 + %2 + 0x70]\n\t" \
123 "stx %%g0, [%0 + %2 + 0x78]\n\t" \
124 "wrpr %%g0, (1 << 3), %%wstate\n\t" \
125 : \
126 : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
127 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
128} while (0)
129
130#define start_thread32(regs, pc, sp) \
131do { \
132 unsigned long __asi = ASI_PNF; \
133 pc &= 0x00000000ffffffffUL; \
134 sp &= 0x00000000ffffffffUL; \
135 regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
136 regs->tpc = ((pc & (~3)) - 4); \
137 regs->tnpc = regs->tpc + 4; \
138 regs->y = 0; \
139 set_thread_wstate(2 << 3); \
140 if (current_thread_info()->utraps) { \
141 if (*(current_thread_info()->utraps) < 2) \
142 kfree(current_thread_info()->utraps); \
143 else \
144 (*(current_thread_info()->utraps))--; \
145 current_thread_info()->utraps = NULL; \
146 } \
147 __asm__ __volatile__( \
148 "stx %%g0, [%0 + %2 + 0x00]\n\t" \
149 "stx %%g0, [%0 + %2 + 0x08]\n\t" \
150 "stx %%g0, [%0 + %2 + 0x10]\n\t" \
151 "stx %%g0, [%0 + %2 + 0x18]\n\t" \
152 "stx %%g0, [%0 + %2 + 0x20]\n\t" \
153 "stx %%g0, [%0 + %2 + 0x28]\n\t" \
154 "stx %%g0, [%0 + %2 + 0x30]\n\t" \
155 "stx %%g0, [%0 + %2 + 0x38]\n\t" \
156 "stx %%g0, [%0 + %2 + 0x40]\n\t" \
157 "stx %%g0, [%0 + %2 + 0x48]\n\t" \
158 "stx %%g0, [%0 + %2 + 0x50]\n\t" \
159 "stx %%g0, [%0 + %2 + 0x58]\n\t" \
160 "stx %%g0, [%0 + %2 + 0x60]\n\t" \
161 "stx %%g0, [%0 + %2 + 0x68]\n\t" \
162 "stx %1, [%0 + %2 + 0x70]\n\t" \
163 "stx %%g0, [%0 + %2 + 0x78]\n\t" \
164 "wrpr %%g0, (2 << 3), %%wstate\n\t" \
165 : \
166 : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
167 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
168} while (0)
169
170/* Free all resources held by a thread. */
171#define release_thread(tsk) do { } while (0)
172
173/* Prepare to copy thread state - unlazy all lazy status */
174#define prepare_to_copy(tsk) do { } while (0)
175
176extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
177
178extern unsigned long get_wchan(struct task_struct *task);
179
180#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
181#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
182#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
183
184#define cpu_relax() barrier()
185
186/* Prefetch support. This is tuned for UltraSPARC-III and later.
187 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
188 * a shallower prefetch queue than later chips.
189 */
190#define ARCH_HAS_PREFETCH
191#define ARCH_HAS_PREFETCHW
192#define ARCH_HAS_SPINLOCK_PREFETCH
193
194static inline void prefetch(const void *x)
195{
196 /* We do not use the read prefetch mnemonic because that
197 * prefetches into the prefetch-cache which only is accessible
198 * by floating point operations in UltraSPARC-III and later.
199 * By contrast, "#one_write" prefetches into the L2 cache
200 * in shared state.
201 */
202 __asm__ __volatile__("prefetch [%0], #one_write"
203 : /* no outputs */
204 : "r" (x));
205}
206
207static inline void prefetchw(const void *x)
208{
209 /* The most optimal prefetch to use for writes is
210 * "#n_writes". This brings the cacheline into the
211 * L2 cache in "owned" state.
212 */
213 __asm__ __volatile__("prefetch [%0], #n_writes"
214 : /* no outputs */
215 : "r" (x));
216}
217
218#define spin_lock_prefetch(x) prefetchw(x)
219
220#define HAVE_ARCH_PICK_MMAP_LAYOUT
221
222#endif /* !(__ASSEMBLY__) */
223
224#endif /* !(__ASM_SPARC64_PROCESSOR_H) */