Linux kernel mirror (for testing)
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1/*
2 * include/asm-sh/processor.h
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 */
7
8#ifndef __ASM_SH_PROCESSOR_H
9#define __ASM_SH_PROCESSOR_H
10#ifdef __KERNEL__
11
12#include <asm/page.h>
13#include <asm/types.h>
14#include <asm/cache.h>
15#include <asm/ptrace.h>
16
17/*
18 * Default implementation of macro that returns current
19 * instruction pointer ("program counter").
20 */
21#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
22
23/* Core Processor Version Register */
24#define CCN_PVR 0xff000030
25#define CCN_CVR 0xff000040
26#define CCN_PRR 0xff000044
27
28/*
29 * CPU type and hardware bug flags. Kept separately for each CPU.
30 *
31 * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
32 * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
33 * for parsing the subtype in get_cpu_subtype().
34 */
35enum cpu_type {
36 /* SH-2 types */
37 CPU_SH7604,
38
39 /* SH-3 types */
40 CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
41 CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300,
42
43 /* SH-4 types */
44 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
45 CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
46 CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781,
47
48 /* Unknown subtype */
49 CPU_SH_NONE
50};
51
52struct sh_cpuinfo {
53 enum cpu_type type;
54 unsigned long loops_per_jiffy;
55
56 struct cache_info icache;
57 struct cache_info dcache;
58
59 unsigned long flags;
60};
61
62extern struct sh_cpuinfo boot_cpu_data;
63
64#ifdef CONFIG_SMP
65extern struct sh_cpuinfo cpu_data[];
66#define current_cpu_data cpu_data[smp_processor_id()]
67#else
68#define cpu_data (&boot_cpu_data)
69#define current_cpu_data boot_cpu_data
70#endif
71
72/*
73 * User space process size: 2GB.
74 *
75 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
76 */
77#define TASK_SIZE 0x7c000000UL
78
79/* This decides where the kernel will search for a free chunk of vm
80 * space during mmap's.
81 */
82#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
83
84/*
85 * Bit of SR register
86 *
87 * FD-bit:
88 * When it's set, it means the processor doesn't have right to use FPU,
89 * and it results exception when the floating operation is executed.
90 *
91 * IMASK-bit:
92 * Interrupt level mask
93 */
94#define SR_FD 0x00008000
95#define SR_DSP 0x00001000
96#define SR_IMASK 0x000000f0
97
98/*
99 * FPU structure and data
100 */
101
102struct sh_fpu_hard_struct {
103 unsigned long fp_regs[16];
104 unsigned long xfp_regs[16];
105 unsigned long fpscr;
106 unsigned long fpul;
107
108 long status; /* software status information */
109};
110
111/* Dummy fpu emulator */
112struct sh_fpu_soft_struct {
113 unsigned long fp_regs[16];
114 unsigned long xfp_regs[16];
115 unsigned long fpscr;
116 unsigned long fpul;
117
118 unsigned char lookahead;
119 unsigned long entry_pc;
120};
121
122union sh_fpu_union {
123 struct sh_fpu_hard_struct hard;
124 struct sh_fpu_soft_struct soft;
125};
126
127/*
128 * Processor flags
129 */
130
131#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
132#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
133#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
134#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
135#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
136#define CPU_HAS_PTEA 0x0020 /* PTEA register */
137
138struct thread_struct {
139 unsigned long sp;
140 unsigned long pc;
141
142 unsigned long trap_no, error_code;
143 unsigned long address;
144 /* Hardware debugging registers may come here */
145 unsigned long ubc_pc;
146
147 /* floating point info */
148 union sh_fpu_union fpu;
149};
150
151/* Count of active tasks with UBC settings */
152extern int ubc_usercnt;
153
154#define INIT_THREAD { \
155 sizeof(init_stack) + (long) &init_stack, /* sp */ \
156 0, /* pc */ \
157 0, 0, \
158 0, \
159 0, \
160 {{{0,}},} /* fpu state */ \
161}
162
163/*
164 * Do necessary setup to start up a newly executed thread.
165 */
166#define start_thread(regs, new_pc, new_sp) \
167 set_fs(USER_DS); \
168 regs->pr = 0; \
169 regs->sr = SR_FD; /* User mode. */ \
170 regs->pc = new_pc; \
171 regs->regs[15] = new_sp
172
173/* Forward declaration, a strange C thing */
174struct task_struct;
175struct mm_struct;
176
177/* Free all resources held by a thread. */
178extern void release_thread(struct task_struct *);
179
180/* Prepare to copy thread state - unlazy all lazy status */
181#define prepare_to_copy(tsk) do { } while (0)
182
183/*
184 * create a kernel thread without removing it from tasklists
185 */
186extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
187
188/* Copy and release all segment info associated with a VM */
189#define copy_segments(p, mm) do { } while(0)
190#define release_segments(mm) do { } while(0)
191
192/*
193 * FPU lazy state save handling.
194 */
195
196static __inline__ void disable_fpu(void)
197{
198 unsigned long __dummy;
199
200 /* Set FD flag in SR */
201 __asm__ __volatile__("stc sr, %0\n\t"
202 "or %1, %0\n\t"
203 "ldc %0, sr"
204 : "=&r" (__dummy)
205 : "r" (SR_FD));
206}
207
208static __inline__ void enable_fpu(void)
209{
210 unsigned long __dummy;
211
212 /* Clear out FD flag in SR */
213 __asm__ __volatile__("stc sr, %0\n\t"
214 "and %1, %0\n\t"
215 "ldc %0, sr"
216 : "=&r" (__dummy)
217 : "r" (~SR_FD));
218}
219
220static __inline__ void release_fpu(struct pt_regs *regs)
221{
222 regs->sr |= SR_FD;
223}
224
225static __inline__ void grab_fpu(struct pt_regs *regs)
226{
227 regs->sr &= ~SR_FD;
228}
229
230#ifdef CONFIG_CPU_SH4
231extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
232#else
233#define save_fpu(tsk) do { } while (0)
234#endif
235
236#define unlazy_fpu(tsk, regs) do { \
237 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
238 save_fpu(tsk, regs); \
239 } \
240} while (0)
241
242#define clear_fpu(tsk, regs) do { \
243 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
244 clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
245 release_fpu(regs); \
246 } \
247} while (0)
248
249/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
250#define FPSCR_INIT 0x00080000
251
252#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
253#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
254
255/*
256 * Return saved PC of a blocked thread.
257 */
258#define thread_saved_pc(tsk) (tsk->thread.pc)
259
260extern unsigned long get_wchan(struct task_struct *p);
261
262#define KSTK_EIP(tsk) ((tsk)->thread.pc)
263#define KSTK_ESP(tsk) ((tsk)->thread.sp)
264
265#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
266#define cpu_relax() do { } while (0)
267
268#endif /* __KERNEL__ */
269#endif /* __ASM_SH_PROCESSOR_H */