Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1/*
2 * linux/include/asm-arm/assembler.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This file contains arm architecture specific defines
11 * for the different processors.
12 *
13 * Do not include any C declarations in this file - it is included by
14 * assembler source.
15 */
16#ifndef __ASSEMBLY__
17#error "Only include this from assembly code"
18#endif
19
20#include <asm/ptrace.h>
21
22/*
23 * Endian independent macros for shifting bytes within registers.
24 */
25#ifndef __ARMEB__
26#define pull lsr
27#define push lsl
28#define get_byte_0 lsl #0
29#define get_byte_1 lsr #8
30#define get_byte_2 lsr #16
31#define get_byte_3 lsr #24
32#define put_byte_0 lsl #0
33#define put_byte_1 lsl #8
34#define put_byte_2 lsl #16
35#define put_byte_3 lsl #24
36#else
37#define pull lsl
38#define push lsr
39#define get_byte_0 lsr #24
40#define get_byte_1 lsr #16
41#define get_byte_2 lsr #8
42#define get_byte_3 lsl #0
43#define put_byte_0 lsl #24
44#define put_byte_1 lsl #16
45#define put_byte_2 lsl #8
46#define put_byte_3 lsl #0
47#endif
48
49/*
50 * Data preload for architectures that support it
51 */
52#if __LINUX_ARM_ARCH__ >= 5
53#define PLD(code...) code
54#else
55#define PLD(code...)
56#endif
57
58#define MODE_USR USR_MODE
59#define MODE_FIQ FIQ_MODE
60#define MODE_IRQ IRQ_MODE
61#define MODE_SVC SVC_MODE
62
63#define DEFAULT_FIQ MODE_FIQ
64
65/*
66 * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
67 */
68#ifdef __STDC__
69#define LOADREGS(cond, base, reglist...)\
70 ldm##cond base,reglist
71#else
72#define LOADREGS(cond, base, reglist...)\
73 ldm/**/cond base,reglist
74#endif
75
76/*
77 * Build a return instruction for this processor type.
78 */
79#define RETINSTR(instr, regs...)\
80 instr regs
81
82/*
83 * Enable and disable interrupts
84 */
85#if __LINUX_ARM_ARCH__ >= 6
86 .macro disable_irq
87 cpsid i
88 .endm
89
90 .macro enable_irq
91 cpsie i
92 .endm
93#else
94 .macro disable_irq
95 msr cpsr_c, #PSR_I_BIT | SVC_MODE
96 .endm
97
98 .macro enable_irq
99 msr cpsr_c, #SVC_MODE
100 .endm
101#endif
102
103/*
104 * Save the current IRQ state and disable IRQs. Note that this macro
105 * assumes FIQs are enabled, and that the processor is in SVC mode.
106 */
107 .macro save_and_disable_irqs, oldcpsr
108 mrs \oldcpsr, cpsr
109 disable_irq
110 .endm
111
112/*
113 * Restore interrupt state previously stored in a register. We don't
114 * guarantee that this will preserve the flags.
115 */
116 .macro restore_irqs, oldcpsr
117 msr cpsr_c, \oldcpsr
118 .endm
119
120/*
121 * These two are used to save LR/restore PC over a user-based access.
122 * The old 26-bit architecture requires that we do. On 32-bit
123 * architecture, we can safely ignore this requirement.
124 */
125 .macro save_lr
126 .endm
127
128 .macro restore_pc
129 mov pc, lr
130 .endm
131
132#define USER(x...) \
1339999: x; \
134 .section __ex_table,"a"; \
135 .align 3; \
136 .long 9999b,9001f; \
137 .previous