tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/*
2 * linux/drivers/video/savagefb.h -- S3 Savage Framebuffer Driver
3 *
4 * Copyright (c) 2001 Denis Oliver Kropp <dok@convergence.de>
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file COPYING in the main directory of this
8 * archive for more details.
9 */
10
11
12#ifndef __SAVAGEFB_H__
13#define __SAVAGEFB_H__
14
15#include <linux/i2c.h>
16#include <linux/i2c-id.h>
17#include <linux/i2c-algo-bit.h>
18#include "../edid.h"
19
20#ifdef SAVAGEFB_DEBUG
21# define DBG(x) printk (KERN_DEBUG "savagefb: %s\n", (x));
22#else
23# define DBG(x)
24# define SavagePrintRegs(...)
25#endif
26
27
28#define PCI_CHIP_SAVAGE4 0x8a22
29#define PCI_CHIP_SAVAGE3D 0x8a20
30#define PCI_CHIP_SAVAGE3D_MV 0x8a21
31#define PCI_CHIP_SAVAGE2000 0x9102
32#define PCI_CHIP_SAVAGE_MX_MV 0x8c10
33#define PCI_CHIP_SAVAGE_MX 0x8c11
34#define PCI_CHIP_SAVAGE_IX_MV 0x8c12
35#define PCI_CHIP_SAVAGE_IX 0x8c13
36#define PCI_CHIP_PROSAVAGE_PM 0x8a25
37#define PCI_CHIP_PROSAVAGE_KM 0x8a26
38 /* Twister is a code name; hope I get the real name soon. */
39#define PCI_CHIP_S3TWISTER_P 0x8d01
40#define PCI_CHIP_S3TWISTER_K 0x8d02
41#define PCI_CHIP_PROSAVAGE_DDR 0x8d03
42#define PCI_CHIP_PROSAVAGE_DDRK 0x8d04
43#define PCI_CHIP_SUPSAV_MX128 0x8c22
44#define PCI_CHIP_SUPSAV_MX64 0x8c24
45#define PCI_CHIP_SUPSAV_MX64C 0x8c26
46#define PCI_CHIP_SUPSAV_IX128SDR 0x8c2a
47#define PCI_CHIP_SUPSAV_IX128DDR 0x8c2b
48#define PCI_CHIP_SUPSAV_IX64SDR 0x8c2c
49#define PCI_CHIP_SUPSAV_IX64DDR 0x8c2d
50#define PCI_CHIP_SUPSAV_IXCSDR 0x8c2e
51#define PCI_CHIP_SUPSAV_IXCDDR 0x8c2f
52
53
54
55#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
56
57#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) || (chip==S3_PROSAVAGE))
58
59#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
60
61#define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
62
63/* Chip tags. These are used to group the adapters into
64 * related families.
65 */
66
67typedef enum {
68 S3_UNKNOWN = 0,
69 S3_SAVAGE3D,
70 S3_SAVAGE_MX,
71 S3_SAVAGE4,
72 S3_PROSAVAGE,
73 S3_SUPERSAVAGE,
74 S3_SAVAGE2000,
75 S3_LAST
76} savage_chipset;
77
78#define BIOS_BSIZE 1024
79#define BIOS_BASE 0xc0000
80
81#define SAVAGE_NEWMMIO_REGBASE_S3 0x1000000 /* 16MB */
82#define SAVAGE_NEWMMIO_REGBASE_S4 0x0000000
83#define SAVAGE_NEWMMIO_REGSIZE 0x0080000 /* 512kb */
84#define SAVAGE_NEWMMIO_VGABASE 0x8000
85
86#define BASE_FREQ 14318
87#define HALF_BASE_FREQ 7159
88
89#define FIFO_CONTROL_REG 0x8200
90#define MIU_CONTROL_REG 0x8204
91#define STREAMS_TIMEOUT_REG 0x8208
92#define MISC_TIMEOUT_REG 0x820c
93
94#define MONO_PAT_0 0xa4e8
95#define MONO_PAT_1 0xa4ec
96
97#define MAXFIFO 0x7f00
98
99#define BCI_CMD_NOP 0x40000000
100#define BCI_CMD_SETREG 0x96000000
101#define BCI_CMD_RECT 0x48000000
102#define BCI_CMD_RECT_XP 0x01000000
103#define BCI_CMD_RECT_YP 0x02000000
104#define BCI_CMD_SEND_COLOR 0x00008000
105#define BCI_CMD_DEST_GBD 0x00000000
106#define BCI_CMD_SRC_GBD 0x00000020
107#define BCI_CMD_SRC_SOLID 0x00000000
108#define BCI_CMD_SRC_MONO 0x00000060
109#define BCI_CMD_CLIP_NEW 0x00006000
110#define BCI_CMD_CLIP_LR 0x00004000
111
112#define BCI_CLIP_LR(l, r) ((((r) << 16) | (l)) & 0x0FFF0FFF)
113#define BCI_CLIP_TL(t, l) ((((t) << 16) | (l)) & 0x0FFF0FFF)
114#define BCI_CLIP_BR(b, r) ((((b) << 16) | (r)) & 0x0FFF0FFF)
115#define BCI_W_H(w, h) (((h) << 16) | ((w) & 0xFFF))
116#define BCI_X_Y(x, y) (((y) << 16) | ((x) & 0xFFF))
117
118#define BCI_GBD1 0xE0
119#define BCI_GBD2 0xE1
120
121#define BCI_BUFFER_OFFSET 0x10000
122#define BCI_SIZE 0x4000
123
124#define BCI_SEND(dw) writel(dw, par->bci_base + par->bci_ptr++)
125
126#define BCI_CMD_GET_ROP(cmd) (((cmd) >> 16) & 0xFF)
127#define BCI_CMD_SET_ROP(cmd, rop) ((cmd) |= ((rop & 0xFF) << 16))
128#define BCI_CMD_SEND_COLOR 0x00008000
129
130#define DISP_CRT 1
131#define DISP_LCD 2
132#define DISP_DFP 3
133
134struct xtimings {
135 unsigned int Clock;
136 unsigned int HDisplay;
137 unsigned int HSyncStart;
138 unsigned int HSyncEnd;
139 unsigned int HTotal;
140 unsigned int HAdjusted;
141 unsigned int VDisplay;
142 unsigned int VSyncStart;
143 unsigned int VSyncEnd;
144 unsigned int VTotal;
145 unsigned int sync;
146 int dblscan;
147 int interlaced;
148};
149
150
151/* --------------------------------------------------------------------- */
152
153#define NR_PALETTE 256
154
155
156struct savagefb_par;
157
158struct savagefb_i2c_chan {
159 struct savagefb_par *par;
160 struct i2c_adapter adapter;
161 struct i2c_algo_bit_data algo;
162 volatile u8 __iomem *ioaddr;
163 u32 reg;
164};
165
166struct savagefb_par {
167 struct pci_dev *pcidev;
168 savage_chipset chip;
169 struct savagefb_i2c_chan chan;
170 unsigned char *edid;
171 u32 pseudo_palette[16];
172 int paletteEnabled;
173 int pm_state;
174 int display_type;
175 int dvi;
176 int crtonly;
177 int dacSpeedBpp;
178 int maxClock;
179 int minClock;
180 int numClocks;
181 int clock[4];
182 struct {
183 u8 __iomem *vbase;
184 u32 pbase;
185 u32 len;
186#ifdef CONFIG_MTRR
187 int mtrr;
188#endif
189 } video;
190
191 struct {
192 volatile u8 __iomem *vbase;
193 u32 pbase;
194 u32 len;
195 } mmio;
196
197 volatile u32 __iomem *bci_base;
198 unsigned int bci_ptr;
199
200 u32 cob_offset;
201 u32 cob_size;
202 int cob_index;
203
204 void (*SavageWaitIdle) (struct savagefb_par *par);
205 void (*SavageWaitFifo) (struct savagefb_par *par, int space);
206
207 int MCLK, REFCLK, LCDclk;
208 int HorizScaleFactor;
209
210 /* Panels size */
211 int SavagePanelWidth;
212 int SavagePanelHeight;
213
214 struct {
215 u16 red, green, blue, transp;
216 } palette[NR_PALETTE];
217
218 int depth;
219 int vwidth;
220
221 unsigned char MiscOutReg; /* Misc */
222 unsigned char CRTC[25]; /* Crtc Controller */
223 unsigned char Sequencer[5]; /* Video Sequencer */
224 unsigned char Graphics[9]; /* Video Graphics */
225 unsigned char Attribute[21]; /* Video Atribute */
226
227 unsigned int mode, refresh;
228 unsigned char SR08, SR0E, SR0F;
229 unsigned char SR10, SR11, SR12, SR13, SR15, SR18, SR29, SR30;
230 unsigned char SR54[8];
231 unsigned char Clock;
232 unsigned char CR31, CR32, CR33, CR34, CR36, CR3A, CR3B, CR3C;
233 unsigned char CR40, CR41, CR42, CR43, CR45;
234 unsigned char CR50, CR51, CR53, CR55, CR58, CR5B, CR5D, CR5E;
235 unsigned char CR60, CR63, CR65, CR66, CR67, CR68, CR69, CR6D, CR6F;
236 unsigned char CR86, CR88;
237 unsigned char CR90, CR91, CRB0;
238 unsigned int STREAMS[22]; /* yuck, streams regs */
239 unsigned int MMPR0, MMPR1, MMPR2, MMPR3;
240};
241
242#define BCI_BD_BW_DISABLE 0x10000000
243#define BCI_BD_SET_BPP(bd, bpp) ((bd) |= (((bpp) & 0xFF) << 16))
244#define BCI_BD_SET_STRIDE(bd, st) ((bd) |= ((st) & 0xFFFF))
245
246
247/* IO functions */
248static inline u8 savage_in8(u32 addr, struct savagefb_par *par)
249{
250 return readb(par->mmio.vbase + addr);
251}
252
253static inline u16 savage_in16(u32 addr, struct savagefb_par *par)
254{
255 return readw(par->mmio.vbase + addr);
256}
257
258static inline u32 savage_in32(u32 addr, struct savagefb_par *par)
259{
260 return readl(par->mmio.vbase + addr);
261}
262
263static inline void savage_out8(u32 addr, u8 val, struct savagefb_par *par)
264{
265 writeb(val, par->mmio.vbase + addr);
266}
267
268static inline void savage_out16(u32 addr, u16 val, struct savagefb_par *par)
269{
270 writew(val, par->mmio.vbase + addr);
271}
272
273static inline void savage_out32(u32 addr, u32 val, struct savagefb_par *par)
274{
275 writel(val, par->mmio.vbase + addr);
276}
277
278static inline u8 vga_in8(int addr, struct savagefb_par *par)
279{
280 return savage_in8(0x8000 + addr, par);
281}
282
283static inline u16 vga_in16(int addr, struct savagefb_par *par)
284{
285 return savage_in16(0x8000 + addr, par);
286}
287
288static inline u8 vga_in32(int addr, struct savagefb_par *par)
289{
290 return savage_in32(0x8000 + addr, par);
291}
292
293static inline void vga_out8(int addr, u8 val, struct savagefb_par *par)
294{
295 savage_out8(0x8000 + addr, val, par);
296}
297
298static inline void vga_out16(int addr, u16 val, struct savagefb_par *par)
299{
300 savage_out16(0x8000 + addr, val, par);
301}
302
303static inline void vga_out32(int addr, u32 val, struct savagefb_par *par)
304{
305 savage_out32(0x8000 + addr, val, par);
306}
307
308static inline u8 VGArCR (u8 index, struct savagefb_par *par)
309{
310 vga_out8(0x3d4, index, par);
311 return vga_in8(0x3d5, par);
312}
313
314static inline u8 VGArGR (u8 index, struct savagefb_par *par)
315{
316 vga_out8(0x3ce, index, par);
317 return vga_in8(0x3cf, par);
318}
319
320static inline u8 VGArSEQ (u8 index, struct savagefb_par *par)
321{
322 vga_out8(0x3c4, index, par);
323 return vga_in8(0x3c5, par);
324}
325
326static inline void VGAwCR(u8 index, u8 val, struct savagefb_par *par)
327{
328 vga_out8(0x3d4, index, par);
329 vga_out8(0x3d5, val, par);
330}
331
332static inline void VGAwGR(u8 index, u8 val, struct savagefb_par *par)
333{
334 vga_out8(0x3ce, index, par);
335 vga_out8(0x3cf, val, par);
336}
337
338static inline void VGAwSEQ(u8 index, u8 val, struct savagefb_par *par)
339{
340 vga_out8(0x3c4, index, par);
341 vga_out8 (0x3c5, val, par);
342}
343
344static inline void VGAenablePalette(struct savagefb_par *par)
345{
346 u8 tmp;
347
348 tmp = vga_in8(0x3da, par);
349 vga_out8(0x3c0, 0x00, par);
350 par->paletteEnabled = 1;
351}
352
353static inline void VGAdisablePalette(struct savagefb_par *par)
354{
355 u8 tmp;
356
357 tmp = vga_in8(0x3da, par);
358 vga_out8(0x3c0, 0x20, par);
359 par->paletteEnabled = 0;
360}
361
362static inline void VGAwATTR(u8 index, u8 value, struct savagefb_par *par)
363{
364 u8 tmp;
365
366 if (par->paletteEnabled)
367 index &= ~0x20;
368 else
369 index |= 0x20;
370
371 tmp = vga_in8(0x3da, par);
372 vga_out8(0x3c0, index, par);
373 vga_out8 (0x3c0, value, par);
374}
375
376static inline void VGAwMISC(u8 value, struct savagefb_par *par)
377{
378 vga_out8(0x3c2, value, par);
379}
380
381#ifndef CONFIG_FB_SAVAGE_ACCEL
382#define savagefb_set_clip(x)
383#endif
384
385static inline void VerticalRetraceWait(struct savagefb_par *par)
386{
387 vga_out8(0x3d4, 0x17, par);
388 if (vga_in8(0x3d5, par) & 0x80) {
389 while ((vga_in8(0x3da, par) & 0x08) == 0x08);
390 while ((vga_in8(0x3da, par) & 0x08) == 0x00);
391 }
392}
393
394extern int savagefb_probe_i2c_connector(struct fb_info *info,
395 u8 **out_edid);
396extern void savagefb_create_i2c_busses(struct fb_info *info);
397extern void savagefb_delete_i2c_busses(struct fb_info *info);
398extern int savagefb_sync(struct fb_info *info);
399extern void savagefb_copyarea(struct fb_info *info,
400 const struct fb_copyarea *region);
401extern void savagefb_fillrect(struct fb_info *info,
402 const struct fb_fillrect *rect);
403extern void savagefb_imageblit(struct fb_info *info,
404 const struct fb_image *image);
405
406
407#endif /* __SAVAGEFB_H__ */