Linux kernel mirror (for testing)
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linux
1/*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 */
28#ifndef _CPQPHP_H
29#define _CPQPHP_H
30
31#include "pci_hotplug.h"
32#include <linux/interrupt.h>
33#include <asm/io.h> /* for read? and write? functions */
34#include <linux/delay.h> /* for delays */
35#include <linux/mutex.h>
36
37#define MY_NAME "cpqphp"
38
39#define dbg(fmt, arg...) do { if (cpqhp_debug) printk(KERN_DEBUG "%s: " fmt , MY_NAME , ## arg); } while (0)
40#define err(format, arg...) printk(KERN_ERR "%s: " format , MY_NAME , ## arg)
41#define info(format, arg...) printk(KERN_INFO "%s: " format , MY_NAME , ## arg)
42#define warn(format, arg...) printk(KERN_WARNING "%s: " format , MY_NAME , ## arg)
43
44
45
46struct smbios_system_slot {
47 u8 type;
48 u8 length;
49 u16 handle;
50 u8 name_string_num;
51 u8 slot_type;
52 u8 slot_width;
53 u8 slot_current_usage;
54 u8 slot_length;
55 u16 slot_number;
56 u8 properties1;
57 u8 properties2;
58} __attribute__ ((packed));
59
60/* offsets to the smbios generic type based on the above structure layout */
61enum smbios_system_slot_offsets {
62 SMBIOS_SLOT_GENERIC_TYPE = offsetof(struct smbios_system_slot, type),
63 SMBIOS_SLOT_GENERIC_LENGTH = offsetof(struct smbios_system_slot, length),
64 SMBIOS_SLOT_GENERIC_HANDLE = offsetof(struct smbios_system_slot, handle),
65 SMBIOS_SLOT_NAME_STRING_NUM = offsetof(struct smbios_system_slot, name_string_num),
66 SMBIOS_SLOT_TYPE = offsetof(struct smbios_system_slot, slot_type),
67 SMBIOS_SLOT_WIDTH = offsetof(struct smbios_system_slot, slot_width),
68 SMBIOS_SLOT_CURRENT_USAGE = offsetof(struct smbios_system_slot, slot_current_usage),
69 SMBIOS_SLOT_LENGTH = offsetof(struct smbios_system_slot, slot_length),
70 SMBIOS_SLOT_NUMBER = offsetof(struct smbios_system_slot, slot_number),
71 SMBIOS_SLOT_PROPERTIES1 = offsetof(struct smbios_system_slot, properties1),
72 SMBIOS_SLOT_PROPERTIES2 = offsetof(struct smbios_system_slot, properties2),
73};
74
75struct smbios_generic {
76 u8 type;
77 u8 length;
78 u16 handle;
79} __attribute__ ((packed));
80
81/* offsets to the smbios generic type based on the above structure layout */
82enum smbios_generic_offsets {
83 SMBIOS_GENERIC_TYPE = offsetof(struct smbios_generic, type),
84 SMBIOS_GENERIC_LENGTH = offsetof(struct smbios_generic, length),
85 SMBIOS_GENERIC_HANDLE = offsetof(struct smbios_generic, handle),
86};
87
88struct smbios_entry_point {
89 char anchor[4];
90 u8 ep_checksum;
91 u8 ep_length;
92 u8 major_version;
93 u8 minor_version;
94 u16 max_size_entry;
95 u8 ep_rev;
96 u8 reserved[5];
97 char int_anchor[5];
98 u8 int_checksum;
99 u16 st_length;
100 u32 st_address;
101 u16 number_of_entrys;
102 u8 bcd_rev;
103} __attribute__ ((packed));
104
105/* offsets to the smbios entry point based on the above structure layout */
106enum smbios_entry_point_offsets {
107 ANCHOR = offsetof(struct smbios_entry_point, anchor[0]),
108 EP_CHECKSUM = offsetof(struct smbios_entry_point, ep_checksum),
109 EP_LENGTH = offsetof(struct smbios_entry_point, ep_length),
110 MAJOR_VERSION = offsetof(struct smbios_entry_point, major_version),
111 MINOR_VERSION = offsetof(struct smbios_entry_point, minor_version),
112 MAX_SIZE_ENTRY = offsetof(struct smbios_entry_point, max_size_entry),
113 EP_REV = offsetof(struct smbios_entry_point, ep_rev),
114 INT_ANCHOR = offsetof(struct smbios_entry_point, int_anchor[0]),
115 INT_CHECKSUM = offsetof(struct smbios_entry_point, int_checksum),
116 ST_LENGTH = offsetof(struct smbios_entry_point, st_length),
117 ST_ADDRESS = offsetof(struct smbios_entry_point, st_address),
118 NUMBER_OF_ENTRYS = offsetof(struct smbios_entry_point, number_of_entrys),
119 BCD_REV = offsetof(struct smbios_entry_point, bcd_rev),
120};
121
122struct ctrl_reg { /* offset */
123 u8 slot_RST; /* 0x00 */
124 u8 slot_enable; /* 0x01 */
125 u16 misc; /* 0x02 */
126 u32 led_control; /* 0x04 */
127 u32 int_input_clear; /* 0x08 */
128 u32 int_mask; /* 0x0a */
129 u8 reserved0; /* 0x10 */
130 u8 reserved1; /* 0x11 */
131 u8 reserved2; /* 0x12 */
132 u8 gen_output_AB; /* 0x13 */
133 u32 non_int_input; /* 0x14 */
134 u32 reserved3; /* 0x18 */
135 u32 reserved4; /* 0x1a */
136 u32 reserved5; /* 0x20 */
137 u8 reserved6; /* 0x24 */
138 u8 reserved7; /* 0x25 */
139 u16 reserved8; /* 0x26 */
140 u8 slot_mask; /* 0x28 */
141 u8 reserved9; /* 0x29 */
142 u8 reserved10; /* 0x2a */
143 u8 reserved11; /* 0x2b */
144 u8 slot_SERR; /* 0x2c */
145 u8 slot_power; /* 0x2d */
146 u8 reserved12; /* 0x2e */
147 u8 reserved13; /* 0x2f */
148 u8 next_curr_freq; /* 0x30 */
149 u8 reset_freq_mode; /* 0x31 */
150} __attribute__ ((packed));
151
152/* offsets to the controller registers based on the above structure layout */
153enum ctrl_offsets {
154 SLOT_RST = offsetof(struct ctrl_reg, slot_RST),
155 SLOT_ENABLE = offsetof(struct ctrl_reg, slot_enable),
156 MISC = offsetof(struct ctrl_reg, misc),
157 LED_CONTROL = offsetof(struct ctrl_reg, led_control),
158 INT_INPUT_CLEAR = offsetof(struct ctrl_reg, int_input_clear),
159 INT_MASK = offsetof(struct ctrl_reg, int_mask),
160 CTRL_RESERVED0 = offsetof(struct ctrl_reg, reserved0),
161 CTRL_RESERVED1 = offsetof(struct ctrl_reg, reserved1),
162 CTRL_RESERVED2 = offsetof(struct ctrl_reg, reserved1),
163 GEN_OUTPUT_AB = offsetof(struct ctrl_reg, gen_output_AB),
164 NON_INT_INPUT = offsetof(struct ctrl_reg, non_int_input),
165 CTRL_RESERVED3 = offsetof(struct ctrl_reg, reserved3),
166 CTRL_RESERVED4 = offsetof(struct ctrl_reg, reserved4),
167 CTRL_RESERVED5 = offsetof(struct ctrl_reg, reserved5),
168 CTRL_RESERVED6 = offsetof(struct ctrl_reg, reserved6),
169 CTRL_RESERVED7 = offsetof(struct ctrl_reg, reserved7),
170 CTRL_RESERVED8 = offsetof(struct ctrl_reg, reserved8),
171 SLOT_MASK = offsetof(struct ctrl_reg, slot_mask),
172 CTRL_RESERVED9 = offsetof(struct ctrl_reg, reserved9),
173 CTRL_RESERVED10 = offsetof(struct ctrl_reg, reserved10),
174 CTRL_RESERVED11 = offsetof(struct ctrl_reg, reserved11),
175 SLOT_SERR = offsetof(struct ctrl_reg, slot_SERR),
176 SLOT_POWER = offsetof(struct ctrl_reg, slot_power),
177 NEXT_CURR_FREQ = offsetof(struct ctrl_reg, next_curr_freq),
178 RESET_FREQ_MODE = offsetof(struct ctrl_reg, reset_freq_mode),
179};
180
181struct hrt {
182 char sig0;
183 char sig1;
184 char sig2;
185 char sig3;
186 u16 unused_IRQ;
187 u16 PCIIRQ;
188 u8 number_of_entries;
189 u8 revision;
190 u16 reserved1;
191 u32 reserved2;
192} __attribute__ ((packed));
193
194/* offsets to the hotplug resource table registers based on the above structure layout */
195enum hrt_offsets {
196 SIG0 = offsetof(struct hrt, sig0),
197 SIG1 = offsetof(struct hrt, sig1),
198 SIG2 = offsetof(struct hrt, sig2),
199 SIG3 = offsetof(struct hrt, sig3),
200 UNUSED_IRQ = offsetof(struct hrt, unused_IRQ),
201 PCIIRQ = offsetof(struct hrt, PCIIRQ),
202 NUMBER_OF_ENTRIES = offsetof(struct hrt, number_of_entries),
203 REVISION = offsetof(struct hrt, revision),
204 HRT_RESERVED1 = offsetof(struct hrt, reserved1),
205 HRT_RESERVED2 = offsetof(struct hrt, reserved2),
206};
207
208struct slot_rt {
209 u8 dev_func;
210 u8 primary_bus;
211 u8 secondary_bus;
212 u8 max_bus;
213 u16 io_base;
214 u16 io_length;
215 u16 mem_base;
216 u16 mem_length;
217 u16 pre_mem_base;
218 u16 pre_mem_length;
219} __attribute__ ((packed));
220
221/* offsets to the hotplug slot resource table registers based on the above structure layout */
222enum slot_rt_offsets {
223 DEV_FUNC = offsetof(struct slot_rt, dev_func),
224 PRIMARY_BUS = offsetof(struct slot_rt, primary_bus),
225 SECONDARY_BUS = offsetof(struct slot_rt, secondary_bus),
226 MAX_BUS = offsetof(struct slot_rt, max_bus),
227 IO_BASE = offsetof(struct slot_rt, io_base),
228 IO_LENGTH = offsetof(struct slot_rt, io_length),
229 MEM_BASE = offsetof(struct slot_rt, mem_base),
230 MEM_LENGTH = offsetof(struct slot_rt, mem_length),
231 PRE_MEM_BASE = offsetof(struct slot_rt, pre_mem_base),
232 PRE_MEM_LENGTH = offsetof(struct slot_rt, pre_mem_length),
233};
234
235struct pci_func {
236 struct pci_func *next;
237 u8 bus;
238 u8 device;
239 u8 function;
240 u8 is_a_board;
241 u16 status;
242 u8 configured;
243 u8 switch_save;
244 u8 presence_save;
245 u32 base_length[0x06];
246 u8 base_type[0x06];
247 u16 reserved2;
248 u32 config_space[0x20];
249 struct pci_resource *mem_head;
250 struct pci_resource *p_mem_head;
251 struct pci_resource *io_head;
252 struct pci_resource *bus_head;
253 struct timer_list *p_task_event;
254 struct pci_dev* pci_dev;
255};
256
257struct slot {
258 struct slot *next;
259 u8 bus;
260 u8 device;
261 u8 number;
262 u8 is_a_board;
263 u8 configured;
264 u8 state;
265 u8 switch_save;
266 u8 presence_save;
267 u32 capabilities;
268 u16 reserved2;
269 struct timer_list task_event;
270 u8 hp_slot;
271 struct controller *ctrl;
272 void __iomem *p_sm_slot;
273 struct hotplug_slot *hotplug_slot;
274};
275
276struct pci_resource {
277 struct pci_resource * next;
278 u32 base;
279 u32 length;
280};
281
282struct event_info {
283 u32 event_type;
284 u8 hp_slot;
285};
286
287struct controller {
288 struct controller *next;
289 u32 ctrl_int_comp;
290 struct mutex crit_sect; /* critical section mutex */
291 void __iomem *hpc_reg; /* cookie for our pci controller location */
292 struct pci_resource *mem_head;
293 struct pci_resource *p_mem_head;
294 struct pci_resource *io_head;
295 struct pci_resource *bus_head;
296 struct pci_dev *pci_dev;
297 struct pci_bus *pci_bus;
298 struct event_info event_queue[10];
299 struct slot *slot;
300 u8 next_event;
301 u8 interrupt;
302 u8 cfgspc_irq;
303 u8 bus; /* bus number for the pci hotplug controller */
304 u8 rev;
305 u8 slot_device_offset;
306 u8 first_slot;
307 u8 add_support;
308 u8 push_flag;
309 enum pci_bus_speed speed;
310 enum pci_bus_speed speed_capability;
311 u8 push_button; /* 0 = no pushbutton, 1 = pushbutton present */
312 u8 slot_switch_type; /* 0 = no switch, 1 = switch present */
313 u8 defeature_PHP; /* 0 = PHP not supported, 1 = PHP supported */
314 u8 alternate_base_address; /* 0 = not supported, 1 = supported */
315 u8 pci_config_space; /* Index/data access to working registers 0 = not supported, 1 = supported */
316 u8 pcix_speed_capability; /* PCI-X */
317 u8 pcix_support; /* PCI-X */
318 u16 vendor_id;
319 struct work_struct int_task_event;
320 wait_queue_head_t queue; /* sleep & wake process */
321 struct dentry *dentry; /* debugfs dentry */
322};
323
324struct irq_mapping {
325 u8 barber_pole;
326 u8 valid_INT;
327 u8 interrupt[4];
328};
329
330struct resource_lists {
331 struct pci_resource *mem_head;
332 struct pci_resource *p_mem_head;
333 struct pci_resource *io_head;
334 struct pci_resource *bus_head;
335 struct irq_mapping *irqs;
336};
337
338#define ROM_PHY_ADDR 0x0F0000
339#define ROM_PHY_LEN 0x00ffff
340
341#define PCI_HPC_ID 0xA0F7
342#define PCI_SUB_HPC_ID 0xA2F7
343#define PCI_SUB_HPC_ID2 0xA2F8
344#define PCI_SUB_HPC_ID3 0xA2F9
345#define PCI_SUB_HPC_ID_INTC 0xA2FA
346#define PCI_SUB_HPC_ID4 0xA2FD
347
348#define INT_BUTTON_IGNORE 0
349#define INT_PRESENCE_ON 1
350#define INT_PRESENCE_OFF 2
351#define INT_SWITCH_CLOSE 3
352#define INT_SWITCH_OPEN 4
353#define INT_POWER_FAULT 5
354#define INT_POWER_FAULT_CLEAR 6
355#define INT_BUTTON_PRESS 7
356#define INT_BUTTON_RELEASE 8
357#define INT_BUTTON_CANCEL 9
358
359#define STATIC_STATE 0
360#define BLINKINGON_STATE 1
361#define BLINKINGOFF_STATE 2
362#define POWERON_STATE 3
363#define POWEROFF_STATE 4
364
365#define PCISLOT_INTERLOCK_CLOSED 0x00000001
366#define PCISLOT_ADAPTER_PRESENT 0x00000002
367#define PCISLOT_POWERED 0x00000004
368#define PCISLOT_66_MHZ_OPERATION 0x00000008
369#define PCISLOT_64_BIT_OPERATION 0x00000010
370#define PCISLOT_REPLACE_SUPPORTED 0x00000020
371#define PCISLOT_ADD_SUPPORTED 0x00000040
372#define PCISLOT_INTERLOCK_SUPPORTED 0x00000080
373#define PCISLOT_66_MHZ_SUPPORTED 0x00000100
374#define PCISLOT_64_BIT_SUPPORTED 0x00000200
375
376#define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
377
378#define INTERLOCK_OPEN 0x00000002
379#define ADD_NOT_SUPPORTED 0x00000003
380#define CARD_FUNCTIONING 0x00000005
381#define ADAPTER_NOT_SAME 0x00000006
382#define NO_ADAPTER_PRESENT 0x00000009
383#define NOT_ENOUGH_RESOURCES 0x0000000B
384#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
385#define POWER_FAILURE 0x0000000E
386
387#define REMOVE_NOT_SUPPORTED 0x00000003
388
389
390/*
391 * error Messages
392 */
393#define msg_initialization_err "Initialization failure, error=%d\n"
394#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
395#define msg_HPC_non_compaq_or_intel "The PCI hot plug controller is not supported by this driver.\n"
396#define msg_HPC_not_supported "this system is not supported by this version of cpqphpd. Upgrade to a newer version of cpqphpd\n"
397#define msg_unable_to_save "unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
398#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
399#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
400#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
401#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
402
403
404/* debugfs functions for the hotplug controller info */
405extern void cpqhp_initialize_debugfs (void);
406extern void cpqhp_shutdown_debugfs (void);
407extern void cpqhp_create_debugfs_files (struct controller *ctrl);
408extern void cpqhp_remove_debugfs_files (struct controller *ctrl);
409
410/* controller functions */
411extern void cpqhp_pushbutton_thread (unsigned long event_pointer);
412extern irqreturn_t cpqhp_ctrl_intr (int IRQ, void *data, struct pt_regs *regs);
413extern int cpqhp_find_available_resources (struct controller *ctrl, void __iomem *rom_start);
414extern int cpqhp_event_start_thread (void);
415extern void cpqhp_event_stop_thread (void);
416extern struct pci_func *cpqhp_slot_create (unsigned char busnumber);
417extern struct pci_func *cpqhp_slot_find (unsigned char bus, unsigned char device, unsigned char index);
418extern int cpqhp_process_SI (struct controller *ctrl, struct pci_func *func);
419extern int cpqhp_process_SS (struct controller *ctrl, struct pci_func *func);
420extern int cpqhp_hardware_test (struct controller *ctrl, int test_num);
421
422/* resource functions */
423extern int cpqhp_resource_sort_and_combine (struct pci_resource **head);
424
425/* pci functions */
426extern int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
427extern int cpqhp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot);
428extern int cpqhp_save_config (struct controller *ctrl, int busnumber, int is_hot_plug);
429extern int cpqhp_save_base_addr_length (struct controller *ctrl, struct pci_func * func);
430extern int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func);
431extern int cpqhp_configure_board (struct controller *ctrl, struct pci_func * func);
432extern int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
433extern int cpqhp_valid_replace (struct controller *ctrl, struct pci_func * func);
434extern void cpqhp_destroy_board_resources (struct pci_func * func);
435extern int cpqhp_return_board_resources (struct pci_func * func, struct resource_lists * resources);
436extern void cpqhp_destroy_resource_list (struct resource_lists * resources);
437extern int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func);
438extern int cpqhp_unconfigure_device (struct pci_func* func);
439
440/* Global variables */
441extern int cpqhp_debug;
442extern int cpqhp_legacy_mode;
443extern struct controller *cpqhp_ctrl_list;
444extern struct pci_func *cpqhp_slot_list[256];
445
446/* these can be gotten rid of, but for debugging they are purty */
447extern u8 cpqhp_nic_irq;
448extern u8 cpqhp_disk_irq;
449
450
451/* inline functions */
452
453/*
454 * return_resource
455 *
456 * Puts node back in the resource list pointed to by head
457 *
458 */
459static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
460{
461 if (!node || !head)
462 return;
463 node->next = *head;
464 *head = node;
465}
466
467static inline void set_SOGO(struct controller *ctrl)
468{
469 u16 misc;
470
471 misc = readw(ctrl->hpc_reg + MISC);
472 misc = (misc | 0x0001) & 0xFFFB;
473 writew(misc, ctrl->hpc_reg + MISC);
474}
475
476
477static inline void amber_LED_on(struct controller *ctrl, u8 slot)
478{
479 u32 led_control;
480
481 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
482 led_control |= (0x01010000L << slot);
483 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
484}
485
486
487static inline void amber_LED_off(struct controller *ctrl, u8 slot)
488{
489 u32 led_control;
490
491 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
492 led_control &= ~(0x01010000L << slot);
493 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
494}
495
496
497static inline int read_amber_LED(struct controller *ctrl, u8 slot)
498{
499 u32 led_control;
500
501 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
502 led_control &= (0x01010000L << slot);
503
504 return led_control ? 1 : 0;
505}
506
507
508static inline void green_LED_on(struct controller *ctrl, u8 slot)
509{
510 u32 led_control;
511
512 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
513 led_control |= 0x0101L << slot;
514 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
515}
516
517static inline void green_LED_off(struct controller *ctrl, u8 slot)
518{
519 u32 led_control;
520
521 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
522 led_control &= ~(0x0101L << slot);
523 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
524}
525
526
527static inline void green_LED_blink(struct controller *ctrl, u8 slot)
528{
529 u32 led_control;
530
531 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
532 led_control &= ~(0x0101L << slot);
533 led_control |= (0x0001L << slot);
534 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
535}
536
537
538static inline void slot_disable(struct controller *ctrl, u8 slot)
539{
540 u8 slot_enable;
541
542 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
543 slot_enable &= ~(0x01 << slot);
544 writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
545}
546
547
548static inline void slot_enable(struct controller *ctrl, u8 slot)
549{
550 u8 slot_enable;
551
552 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
553 slot_enable |= (0x01 << slot);
554 writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
555}
556
557
558static inline u8 is_slot_enabled(struct controller *ctrl, u8 slot)
559{
560 u8 slot_enable;
561
562 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
563 slot_enable &= (0x01 << slot);
564 return slot_enable ? 1 : 0;
565}
566
567
568static inline u8 read_slot_enable(struct controller *ctrl)
569{
570 return readb(ctrl->hpc_reg + SLOT_ENABLE);
571}
572
573
574/*
575 * get_controller_speed - find the current frequency/mode of controller.
576 *
577 * @ctrl: controller to get frequency/mode for.
578 *
579 * Returns controller speed.
580 *
581 */
582static inline u8 get_controller_speed(struct controller *ctrl)
583{
584 u8 curr_freq;
585 u16 misc;
586
587 if (ctrl->pcix_support) {
588 curr_freq = readb(ctrl->hpc_reg + NEXT_CURR_FREQ);
589 if ((curr_freq & 0xB0) == 0xB0)
590 return PCI_SPEED_133MHz_PCIX;
591 if ((curr_freq & 0xA0) == 0xA0)
592 return PCI_SPEED_100MHz_PCIX;
593 if ((curr_freq & 0x90) == 0x90)
594 return PCI_SPEED_66MHz_PCIX;
595 if (curr_freq & 0x10)
596 return PCI_SPEED_66MHz;
597
598 return PCI_SPEED_33MHz;
599 }
600
601 misc = readw(ctrl->hpc_reg + MISC);
602 return (misc & 0x0800) ? PCI_SPEED_66MHz : PCI_SPEED_33MHz;
603}
604
605
606/*
607 * get_adapter_speed - find the max supported frequency/mode of adapter.
608 *
609 * @ctrl: hotplug controller.
610 * @hp_slot: hotplug slot where adapter is installed.
611 *
612 * Returns adapter speed.
613 *
614 */
615static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot)
616{
617 u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
618 dbg("slot: %d, PCIXCAP: %8x\n", hp_slot, temp_dword);
619 if (ctrl->pcix_support) {
620 if (temp_dword & (0x10000 << hp_slot))
621 return PCI_SPEED_133MHz_PCIX;
622 if (temp_dword & (0x100 << hp_slot))
623 return PCI_SPEED_66MHz_PCIX;
624 }
625
626 if (temp_dword & (0x01 << hp_slot))
627 return PCI_SPEED_66MHz;
628
629 return PCI_SPEED_33MHz;
630}
631
632static inline void enable_slot_power(struct controller *ctrl, u8 slot)
633{
634 u8 slot_power;
635
636 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
637 slot_power |= (0x01 << slot);
638 writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
639}
640
641static inline void disable_slot_power(struct controller *ctrl, u8 slot)
642{
643 u8 slot_power;
644
645 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
646 slot_power &= ~(0x01 << slot);
647 writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
648}
649
650
651static inline int cpq_get_attention_status(struct controller *ctrl, struct slot *slot)
652{
653 u8 hp_slot;
654
655 hp_slot = slot->device - ctrl->slot_device_offset;
656
657 return read_amber_LED(ctrl, hp_slot);
658}
659
660
661static inline int get_slot_enabled(struct controller *ctrl, struct slot *slot)
662{
663 u8 hp_slot;
664
665 hp_slot = slot->device - ctrl->slot_device_offset;
666
667 return is_slot_enabled(ctrl, hp_slot);
668}
669
670
671static inline int cpq_get_latch_status(struct controller *ctrl, struct slot *slot)
672{
673 u32 status;
674 u8 hp_slot;
675
676 hp_slot = slot->device - ctrl->slot_device_offset;
677 dbg("%s: slot->device = %d, ctrl->slot_device_offset = %d \n",
678 __FUNCTION__, slot->device, ctrl->slot_device_offset);
679
680 status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
681
682 return(status == 0) ? 1 : 0;
683}
684
685
686static inline int get_presence_status(struct controller *ctrl, struct slot *slot)
687{
688 int presence_save = 0;
689 u8 hp_slot;
690 u32 tempdword;
691
692 hp_slot = slot->device - ctrl->slot_device_offset;
693
694 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
695 presence_save = (int) ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> hp_slot) & 0x02;
696
697 return presence_save;
698}
699
700#define SLOT_NAME_SIZE 10
701
702static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
703{
704 snprintf(buffer, buffer_size, "%d", slot->number);
705}
706
707
708static inline int wait_for_ctrl_irq(struct controller *ctrl)
709{
710 DECLARE_WAITQUEUE(wait, current);
711 int retval = 0;
712
713 dbg("%s - start\n", __FUNCTION__);
714 add_wait_queue(&ctrl->queue, &wait);
715 /* Sleep for up to 1 second to wait for the LED to change. */
716 msleep_interruptible(1000);
717 remove_wait_queue(&ctrl->queue, &wait);
718 if (signal_pending(current))
719 retval = -EINTR;
720
721 dbg("%s - end\n", __FUNCTION__);
722 return retval;
723}
724
725#endif
726