tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * linux/arch/sh/kernel/pci-bigsur.c
3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 *
6 * Ported to new API by Paul Mundt <lethal@linux-sh.org>.
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * PCI initialization for the Hitachi Big Sur Evaluation Board
12 */
13
14#include <linux/config.h>
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pci.h>
20
21#include <asm/io.h>
22#include "pci-sh7751.h"
23#include <asm/bigsur/bigsur.h>
24
25#define BIGSUR_PCI_IO 0x4000
26#define BIGSUR_PCI_MEM 0xfd000000
27
28static struct resource sh7751_io_resource = {
29 .name = "SH7751 IO",
30 .start = BIGSUR_PCI_IO,
31 .end = BIGSUR_PCI_IO + (64*1024) - 1,
32 .flags = IORESOURCE_IO,
33};
34
35static struct resource sh7751_mem_resource = {
36 .name = "SH7751 mem",
37 .start = BIGSUR_PCI_MEM,
38 .end = BIGSUR_PCI_MEM + (64*1024*1024) - 1,
39 .flags = IORESOURCE_MEM,
40};
41
42extern struct pci_ops sh7751_pci_ops;
43
44struct pci_channel board_pci_channels[] = {
45 { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
46 { 0, }
47};
48
49static struct sh7751_pci_address_map sh7751_pci_map = {
50 .window0 = {
51 .base = SH7751_CS3_BASE_ADDR,
52 .size = BIGSUR_LSR0_SIZE,
53 },
54
55 .window1 = {
56 .base = SH7751_CS3_BASE_ADDR,
57 .size = BIGSUR_LSR1_SIZE,
58 },
59};
60
61/*
62 * Initialize the Big Sur PCI interface
63 * Setup hardware to be Central Funtion
64 * Copy the BSR regs to the PCI interface
65 * Setup PCI windows into local RAM
66 */
67int __init pcibios_init_platform(void)
68{
69 return sh7751_pcic_init(&sh7751_pci_map);
70}
71
72int pcibios_map_platform_irq(u8 slot, u8 pin)
73{
74 /*
75 * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
76 * interface is on the wrong end of the board so that it can also
77 * support a V320 CPI interface chip... Therefor the IRQ mapping is
78 * somewhat use dependent... I'l assume a linear map for now, i.e.
79 * INTA=slot0,pin0... INTD=slot3,pin0...
80 */
81 int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
82
83 PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
84 slot, pin-1+'A', irq);
85
86 return irq;
87}
88