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1/* 2 * PCI Express Hot Plug Controller Driver 3 * 4 * Copyright (C) 1995,2001 Compaq Computer Corporation 5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) 6 * Copyright (C) 2001 IBM Corp. 7 * Copyright (C) 2003-2004 Intel Corporation 8 * 9 * All rights reserved. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 19 * NON INFRINGEMENT. See the GNU General Public License for more 20 * details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com> 27 * 28 */ 29#ifndef _PCIEHP_H 30#define _PCIEHP_H 31 32#include <linux/types.h> 33#include <linux/pci.h> 34#include <linux/delay.h> 35#include <linux/sched.h> /* signal_pending() */ 36#include <linux/pcieport_if.h> 37#include <linux/mutex.h> 38#include "pci_hotplug.h" 39 40#define MY_NAME "pciehp" 41 42extern int pciehp_poll_mode; 43extern int pciehp_poll_time; 44extern int pciehp_debug; 45extern int pciehp_force; 46 47/*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/ 48#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0) 49#define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg) 50#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg) 51#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg) 52 53 54struct slot { 55 struct slot *next; 56 u8 bus; 57 u8 device; 58 u32 number; 59 u8 state; 60 struct timer_list task_event; 61 u8 hp_slot; 62 struct controller *ctrl; 63 struct hpc_ops *hpc_ops; 64 struct hotplug_slot *hotplug_slot; 65 struct list_head slot_list; 66}; 67 68struct event_info { 69 u32 event_type; 70 u8 hp_slot; 71}; 72 73typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id); 74 75struct php_ctlr_state_s { 76 struct php_ctlr_state_s *pnext; 77 struct pci_dev *pci_dev; 78 unsigned int irq; 79 unsigned long flags; /* spinlock's */ 80 u32 slot_device_offset; 81 u32 num_slots; 82 struct timer_list int_poll_timer; /* Added for poll event */ 83 php_intr_callback_t attention_button_callback; 84 php_intr_callback_t switch_change_callback; 85 php_intr_callback_t presence_change_callback; 86 php_intr_callback_t power_fault_callback; 87 void *callback_instance_id; 88 struct ctrl_reg *creg; /* Ptr to controller register space */ 89}; 90 91#define MAX_EVENTS 10 92struct controller { 93 struct controller *next; 94 struct mutex crit_sect; /* critical section mutex */ 95 struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */ 96 int num_slots; /* Number of slots on ctlr */ 97 int slot_num_inc; /* 1 or -1 */ 98 struct pci_dev *pci_dev; 99 struct pci_bus *pci_bus; 100 struct event_info event_queue[MAX_EVENTS]; 101 struct slot *slot; 102 struct hpc_ops *hpc_ops; 103 wait_queue_head_t queue; /* sleep & wake process */ 104 u8 next_event; 105 u8 bus; 106 u8 device; 107 u8 function; 108 u8 slot_device_offset; 109 u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */ 110 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 111 u8 ctrlcap; 112 u16 vendor_id; 113 u8 cap_base; 114}; 115 116#define INT_BUTTON_IGNORE 0 117#define INT_PRESENCE_ON 1 118#define INT_PRESENCE_OFF 2 119#define INT_SWITCH_CLOSE 3 120#define INT_SWITCH_OPEN 4 121#define INT_POWER_FAULT 5 122#define INT_POWER_FAULT_CLEAR 6 123#define INT_BUTTON_PRESS 7 124#define INT_BUTTON_RELEASE 8 125#define INT_BUTTON_CANCEL 9 126 127#define STATIC_STATE 0 128#define BLINKINGON_STATE 1 129#define BLINKINGOFF_STATE 2 130#define POWERON_STATE 3 131#define POWEROFF_STATE 4 132 133#define PCI_TO_PCI_BRIDGE_CLASS 0x00060400 134 135/* Error messages */ 136#define INTERLOCK_OPEN 0x00000002 137#define ADD_NOT_SUPPORTED 0x00000003 138#define CARD_FUNCTIONING 0x00000005 139#define ADAPTER_NOT_SAME 0x00000006 140#define NO_ADAPTER_PRESENT 0x00000009 141#define NOT_ENOUGH_RESOURCES 0x0000000B 142#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C 143#define WRONG_BUS_FREQUENCY 0x0000000D 144#define POWER_FAILURE 0x0000000E 145 146#define REMOVE_NOT_SUPPORTED 0x00000003 147 148#define DISABLE_CARD 1 149 150/* Field definitions in Slot Capabilities Register */ 151#define ATTN_BUTTN_PRSN 0x00000001 152#define PWR_CTRL_PRSN 0x00000002 153#define MRL_SENS_PRSN 0x00000004 154#define ATTN_LED_PRSN 0x00000008 155#define PWR_LED_PRSN 0x00000010 156#define HP_SUPR_RM_SUP 0x00000020 157 158#define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN) 159#define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN) 160#define MRL_SENS(cap) (cap & MRL_SENS_PRSN) 161#define ATTN_LED(cap) (cap & ATTN_LED_PRSN) 162#define PWR_LED(cap) (cap & PWR_LED_PRSN) 163#define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP) 164 165/* 166 * error Messages 167 */ 168#define msg_initialization_err "Initialization failure, error=%d\n" 169#define msg_button_on "PCI slot #%d - powering on due to button press.\n" 170#define msg_button_off "PCI slot #%d - powering off due to button press.\n" 171#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n" 172#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n" 173 174/* controller functions */ 175extern int pciehp_event_start_thread (void); 176extern void pciehp_event_stop_thread (void); 177extern int pciehp_enable_slot (struct slot *slot); 178extern int pciehp_disable_slot (struct slot *slot); 179 180extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id); 181extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id); 182extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id); 183extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id); 184/* extern void long_delay (int delay); */ 185 186/* pci functions */ 187extern int pciehp_configure_device (struct slot *p_slot); 188extern int pciehp_unconfigure_device (struct slot *p_slot); 189 190 191 192/* Global variables */ 193extern struct controller *pciehp_ctrl_list; 194 195/* Inline functions */ 196 197static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device) 198{ 199 struct slot *p_slot, *tmp_slot = NULL; 200 201 p_slot = ctrl->slot; 202 203 while (p_slot && (p_slot->device != device)) { 204 tmp_slot = p_slot; 205 p_slot = p_slot->next; 206 } 207 if (p_slot == NULL) { 208 err("ERROR: pciehp_find_slot device=0x%x\n", device); 209 p_slot = tmp_slot; 210 } 211 212 return p_slot; 213} 214 215static inline int wait_for_ctrl_irq(struct controller *ctrl) 216{ 217 int retval = 0; 218 219 DECLARE_WAITQUEUE(wait, current); 220 221 add_wait_queue(&ctrl->queue, &wait); 222 if (!pciehp_poll_mode) 223 /* Sleep for up to 1 second */ 224 msleep_interruptible(1000); 225 else 226 msleep_interruptible(2500); 227 228 remove_wait_queue(&ctrl->queue, &wait); 229 if (signal_pending(current)) 230 retval = -EINTR; 231 232 return retval; 233} 234 235#define SLOT_NAME_SIZE 10 236 237static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot) 238{ 239 snprintf(buffer, buffer_size, "%04d_%04d", slot->bus, slot->number); 240} 241 242enum php_ctlr_type { 243 PCI, 244 ISA, 245 ACPI 246}; 247 248int pcie_init(struct controller *ctrl, struct pcie_device *dev); 249 250/* This has no meaning for PCI Express, as there is only 1 slot per port */ 251int pcie_get_ctlr_slot_config(struct controller *ctrl, 252 int *num_ctlr_slots, 253 int *first_device_num, 254 int *physical_slot_num, 255 u8 *ctrlcap); 256 257struct hpc_ops { 258 int (*power_on_slot) (struct slot *slot); 259 int (*power_off_slot) (struct slot *slot); 260 int (*get_power_status) (struct slot *slot, u8 *status); 261 int (*get_attention_status) (struct slot *slot, u8 *status); 262 int (*set_attention_status) (struct slot *slot, u8 status); 263 int (*get_latch_status) (struct slot *slot, u8 *status); 264 int (*get_adapter_status) (struct slot *slot, u8 *status); 265 266 int (*get_max_bus_speed) (struct slot *slot, enum pci_bus_speed *speed); 267 int (*get_cur_bus_speed) (struct slot *slot, enum pci_bus_speed *speed); 268 269 int (*get_max_lnk_width) (struct slot *slot, enum pcie_link_width *value); 270 int (*get_cur_lnk_width) (struct slot *slot, enum pcie_link_width *value); 271 272 int (*query_power_fault) (struct slot *slot); 273 void (*green_led_on) (struct slot *slot); 274 void (*green_led_off) (struct slot *slot); 275 void (*green_led_blink) (struct slot *slot); 276 void (*release_ctlr) (struct controller *ctrl); 277 int (*check_lnk_status) (struct controller *ctrl); 278}; 279 280 281#ifdef CONFIG_ACPI 282#define pciehp_get_hp_hw_control_from_firmware(dev) \ 283 pciehp_acpi_get_hp_hw_control_from_firmware(dev) 284static inline int pciehp_get_hp_params_from_firmware(struct pci_dev *dev, 285 struct hotplug_params *hpp) 286{ 287 if (ACPI_FAILURE(acpi_get_hp_params_from_firmware(dev, hpp))) 288 return -ENODEV; 289 return 0; 290} 291#else 292#define pciehp_get_hp_hw_control_from_firmware(dev) 0 293#define pciehp_get_hp_params_from_firmware(dev, hpp) (-ENODEV) 294#endif /* CONFIG_ACPI */ 295#endif /* _PCIEHP_H */