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1/* $Id: esp.c,v 1.101 2002/01/15 06:48:55 davem Exp $ 2 * esp.c: EnhancedScsiProcessor Sun SCSI driver code. 3 * 4 * Copyright (C) 1995, 1998 David S. Miller (davem@caip.rutgers.edu) 5 */ 6 7/* TODO: 8 * 9 * 1) Maybe disable parity checking in config register one for SCSI1 10 * targets. (Gilmore says parity error on the SBus can lock up 11 * old sun4c's) 12 * 2) Add support for DMA2 pipelining. 13 * 3) Add tagged queueing. 14 */ 15 16#include <linux/config.h> 17#include <linux/kernel.h> 18#include <linux/delay.h> 19#include <linux/types.h> 20#include <linux/string.h> 21#include <linux/slab.h> 22#include <linux/blkdev.h> 23#include <linux/proc_fs.h> 24#include <linux/stat.h> 25#include <linux/init.h> 26#include <linux/spinlock.h> 27#include <linux/interrupt.h> 28#include <linux/module.h> 29 30#include "esp.h" 31 32#include <asm/sbus.h> 33#include <asm/dma.h> 34#include <asm/system.h> 35#include <asm/ptrace.h> 36#include <asm/pgtable.h> 37#include <asm/oplib.h> 38#include <asm/io.h> 39#include <asm/irq.h> 40#ifndef __sparc_v9__ 41#include <asm/machines.h> 42#include <asm/idprom.h> 43#endif 44 45#include <scsi/scsi.h> 46#include <scsi/scsi_cmnd.h> 47#include <scsi/scsi_device.h> 48#include <scsi/scsi_eh.h> 49#include <scsi/scsi_host.h> 50#include <scsi/scsi_tcq.h> 51 52#define DRV_VERSION "1.101" 53 54#define DEBUG_ESP 55/* #define DEBUG_ESP_HME */ 56/* #define DEBUG_ESP_DATA */ 57/* #define DEBUG_ESP_QUEUE */ 58/* #define DEBUG_ESP_DISCONNECT */ 59/* #define DEBUG_ESP_STATUS */ 60/* #define DEBUG_ESP_PHASES */ 61/* #define DEBUG_ESP_WORKBUS */ 62/* #define DEBUG_STATE_MACHINE */ 63/* #define DEBUG_ESP_CMDS */ 64/* #define DEBUG_ESP_IRQS */ 65/* #define DEBUG_SDTR */ 66/* #define DEBUG_ESP_SG */ 67 68/* Use the following to sprinkle debugging messages in a way which 69 * suits you if combinations of the above become too verbose when 70 * trying to track down a specific problem. 71 */ 72/* #define DEBUG_ESP_MISC */ 73 74#if defined(DEBUG_ESP) 75#define ESPLOG(foo) printk foo 76#else 77#define ESPLOG(foo) 78#endif /* (DEBUG_ESP) */ 79 80#if defined(DEBUG_ESP_HME) 81#define ESPHME(foo) printk foo 82#else 83#define ESPHME(foo) 84#endif 85 86#if defined(DEBUG_ESP_DATA) 87#define ESPDATA(foo) printk foo 88#else 89#define ESPDATA(foo) 90#endif 91 92#if defined(DEBUG_ESP_QUEUE) 93#define ESPQUEUE(foo) printk foo 94#else 95#define ESPQUEUE(foo) 96#endif 97 98#if defined(DEBUG_ESP_DISCONNECT) 99#define ESPDISC(foo) printk foo 100#else 101#define ESPDISC(foo) 102#endif 103 104#if defined(DEBUG_ESP_STATUS) 105#define ESPSTAT(foo) printk foo 106#else 107#define ESPSTAT(foo) 108#endif 109 110#if defined(DEBUG_ESP_PHASES) 111#define ESPPHASE(foo) printk foo 112#else 113#define ESPPHASE(foo) 114#endif 115 116#if defined(DEBUG_ESP_WORKBUS) 117#define ESPBUS(foo) printk foo 118#else 119#define ESPBUS(foo) 120#endif 121 122#if defined(DEBUG_ESP_IRQS) 123#define ESPIRQ(foo) printk foo 124#else 125#define ESPIRQ(foo) 126#endif 127 128#if defined(DEBUG_SDTR) 129#define ESPSDTR(foo) printk foo 130#else 131#define ESPSDTR(foo) 132#endif 133 134#if defined(DEBUG_ESP_MISC) 135#define ESPMISC(foo) printk foo 136#else 137#define ESPMISC(foo) 138#endif 139 140/* Command phase enumeration. */ 141enum { 142 not_issued = 0x00, /* Still in the issue_SC queue. */ 143 144 /* Various forms of selecting a target. */ 145#define in_slct_mask 0x10 146 in_slct_norm = 0x10, /* ESP is arbitrating, normal selection */ 147 in_slct_stop = 0x11, /* ESP will select, then stop with IRQ */ 148 in_slct_msg = 0x12, /* select, then send a message */ 149 in_slct_tag = 0x13, /* select and send tagged queue msg */ 150 in_slct_sneg = 0x14, /* select and acquire sync capabilities */ 151 152 /* Any post selection activity. */ 153#define in_phases_mask 0x20 154 in_datain = 0x20, /* Data is transferring from the bus */ 155 in_dataout = 0x21, /* Data is transferring to the bus */ 156 in_data_done = 0x22, /* Last DMA data operation done (maybe) */ 157 in_msgin = 0x23, /* Eating message from target */ 158 in_msgincont = 0x24, /* Eating more msg bytes from target */ 159 in_msgindone = 0x25, /* Decide what to do with what we got */ 160 in_msgout = 0x26, /* Sending message to target */ 161 in_msgoutdone = 0x27, /* Done sending msg out */ 162 in_cmdbegin = 0x28, /* Sending cmd after abnormal selection */ 163 in_cmdend = 0x29, /* Done sending slow cmd */ 164 in_status = 0x2a, /* Was in status phase, finishing cmd */ 165 in_freeing = 0x2b, /* freeing the bus for cmd cmplt or disc */ 166 in_the_dark = 0x2c, /* Don't know what bus phase we are in */ 167 168 /* Special states, ie. not normal bus transitions... */ 169#define in_spec_mask 0x80 170 in_abortone = 0x80, /* Aborting one command currently */ 171 in_abortall = 0x81, /* Blowing away all commands we have */ 172 in_resetdev = 0x82, /* SCSI target reset in progress */ 173 in_resetbus = 0x83, /* SCSI bus reset in progress */ 174 in_tgterror = 0x84, /* Target did something stupid */ 175}; 176 177enum { 178 /* Zero has special meaning, see skipahead[12]. */ 179/*0*/ do_never, 180 181/*1*/ do_phase_determine, 182/*2*/ do_reset_bus, 183/*3*/ do_reset_complete, 184/*4*/ do_work_bus, 185/*5*/ do_intr_end 186}; 187 188/* The master ring of all esp hosts we are managing in this driver. */ 189static struct esp *espchain; 190static DEFINE_SPINLOCK(espchain_lock); 191static int esps_running = 0; 192 193/* Forward declarations. */ 194static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs); 195 196/* Debugging routines */ 197struct esp_cmdstrings { 198 u8 cmdchar; 199 char *text; 200} esp_cmd_strings[] = { 201 /* Miscellaneous */ 202 { ESP_CMD_NULL, "ESP_NOP", }, 203 { ESP_CMD_FLUSH, "FIFO_FLUSH", }, 204 { ESP_CMD_RC, "RSTESP", }, 205 { ESP_CMD_RS, "RSTSCSI", }, 206 /* Disconnected State Group */ 207 { ESP_CMD_RSEL, "RESLCTSEQ", }, 208 { ESP_CMD_SEL, "SLCTNATN", }, 209 { ESP_CMD_SELA, "SLCTATN", }, 210 { ESP_CMD_SELAS, "SLCTATNSTOP", }, 211 { ESP_CMD_ESEL, "ENSLCTRESEL", }, 212 { ESP_CMD_DSEL, "DISSELRESEL", }, 213 { ESP_CMD_SA3, "SLCTATN3", }, 214 { ESP_CMD_RSEL3, "RESLCTSEQ", }, 215 /* Target State Group */ 216 { ESP_CMD_SMSG, "SNDMSG", }, 217 { ESP_CMD_SSTAT, "SNDSTATUS", }, 218 { ESP_CMD_SDATA, "SNDDATA", }, 219 { ESP_CMD_DSEQ, "DISCSEQ", }, 220 { ESP_CMD_TSEQ, "TERMSEQ", }, 221 { ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", }, 222 { ESP_CMD_DCNCT, "DISC", }, 223 { ESP_CMD_RMSG, "RCVMSG", }, 224 { ESP_CMD_RCMD, "RCVCMD", }, 225 { ESP_CMD_RDATA, "RCVDATA", }, 226 { ESP_CMD_RCSEQ, "RCVCMDSEQ", }, 227 /* Initiator State Group */ 228 { ESP_CMD_TI, "TRANSINFO", }, 229 { ESP_CMD_ICCSEQ, "INICMDSEQCOMP", }, 230 { ESP_CMD_MOK, "MSGACCEPTED", }, 231 { ESP_CMD_TPAD, "TPAD", }, 232 { ESP_CMD_SATN, "SATN", }, 233 { ESP_CMD_RATN, "RATN", }, 234}; 235#define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings))) 236 237/* Print textual representation of an ESP command */ 238static inline void esp_print_cmd(u8 espcmd) 239{ 240 u8 dma_bit = espcmd & ESP_CMD_DMA; 241 int i; 242 243 espcmd &= ~dma_bit; 244 for (i = 0; i < NUM_ESP_COMMANDS; i++) 245 if (esp_cmd_strings[i].cmdchar == espcmd) 246 break; 247 if (i == NUM_ESP_COMMANDS) 248 printk("ESP_Unknown"); 249 else 250 printk("%s%s", esp_cmd_strings[i].text, 251 ((dma_bit) ? "+DMA" : "")); 252} 253 254/* Print the status register's value */ 255static inline void esp_print_statreg(u8 statreg) 256{ 257 u8 phase; 258 259 printk("STATUS<"); 260 phase = statreg & ESP_STAT_PMASK; 261 printk("%s,", (phase == ESP_DOP ? "DATA-OUT" : 262 (phase == ESP_DIP ? "DATA-IN" : 263 (phase == ESP_CMDP ? "COMMAND" : 264 (phase == ESP_STATP ? "STATUS" : 265 (phase == ESP_MOP ? "MSG-OUT" : 266 (phase == ESP_MIP ? "MSG_IN" : 267 "unknown"))))))); 268 if (statreg & ESP_STAT_TDONE) 269 printk("TRANS_DONE,"); 270 if (statreg & ESP_STAT_TCNT) 271 printk("TCOUNT_ZERO,"); 272 if (statreg & ESP_STAT_PERR) 273 printk("P_ERROR,"); 274 if (statreg & ESP_STAT_SPAM) 275 printk("SPAM,"); 276 if (statreg & ESP_STAT_INTR) 277 printk("IRQ,"); 278 printk(">"); 279} 280 281/* Print the interrupt register's value */ 282static inline void esp_print_ireg(u8 intreg) 283{ 284 printk("INTREG< "); 285 if (intreg & ESP_INTR_S) 286 printk("SLCT_NATN "); 287 if (intreg & ESP_INTR_SATN) 288 printk("SLCT_ATN "); 289 if (intreg & ESP_INTR_RSEL) 290 printk("RSLCT "); 291 if (intreg & ESP_INTR_FDONE) 292 printk("FDONE "); 293 if (intreg & ESP_INTR_BSERV) 294 printk("BSERV "); 295 if (intreg & ESP_INTR_DC) 296 printk("DISCNCT "); 297 if (intreg & ESP_INTR_IC) 298 printk("ILL_CMD "); 299 if (intreg & ESP_INTR_SR) 300 printk("SCSI_BUS_RESET "); 301 printk(">"); 302} 303 304/* Print the sequence step registers contents */ 305static inline void esp_print_seqreg(u8 stepreg) 306{ 307 stepreg &= ESP_STEP_VBITS; 308 printk("STEP<%s>", 309 (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" : 310 (stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" : 311 (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" : 312 (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" : 313 (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" : 314 "UNKNOWN")))))); 315} 316 317static char *phase_string(int phase) 318{ 319 switch (phase) { 320 case not_issued: 321 return "UNISSUED"; 322 case in_slct_norm: 323 return "SLCTNORM"; 324 case in_slct_stop: 325 return "SLCTSTOP"; 326 case in_slct_msg: 327 return "SLCTMSG"; 328 case in_slct_tag: 329 return "SLCTTAG"; 330 case in_slct_sneg: 331 return "SLCTSNEG"; 332 case in_datain: 333 return "DATAIN"; 334 case in_dataout: 335 return "DATAOUT"; 336 case in_data_done: 337 return "DATADONE"; 338 case in_msgin: 339 return "MSGIN"; 340 case in_msgincont: 341 return "MSGINCONT"; 342 case in_msgindone: 343 return "MSGINDONE"; 344 case in_msgout: 345 return "MSGOUT"; 346 case in_msgoutdone: 347 return "MSGOUTDONE"; 348 case in_cmdbegin: 349 return "CMDBEGIN"; 350 case in_cmdend: 351 return "CMDEND"; 352 case in_status: 353 return "STATUS"; 354 case in_freeing: 355 return "FREEING"; 356 case in_the_dark: 357 return "CLUELESS"; 358 case in_abortone: 359 return "ABORTONE"; 360 case in_abortall: 361 return "ABORTALL"; 362 case in_resetdev: 363 return "RESETDEV"; 364 case in_resetbus: 365 return "RESETBUS"; 366 case in_tgterror: 367 return "TGTERROR"; 368 default: 369 return "UNKNOWN"; 370 }; 371} 372 373#ifdef DEBUG_STATE_MACHINE 374static inline void esp_advance_phase(struct scsi_cmnd *s, int newphase) 375{ 376 ESPLOG(("<%s>", phase_string(newphase))); 377 s->SCp.sent_command = s->SCp.phase; 378 s->SCp.phase = newphase; 379} 380#else 381#define esp_advance_phase(__s, __newphase) \ 382 (__s)->SCp.sent_command = (__s)->SCp.phase; \ 383 (__s)->SCp.phase = (__newphase); 384#endif 385 386#ifdef DEBUG_ESP_CMDS 387static inline void esp_cmd(struct esp *esp, u8 cmd) 388{ 389 esp->espcmdlog[esp->espcmdent] = cmd; 390 esp->espcmdent = (esp->espcmdent + 1) & 31; 391 sbus_writeb(cmd, esp->eregs + ESP_CMD); 392} 393#else 394#define esp_cmd(__esp, __cmd) \ 395 sbus_writeb((__cmd), ((__esp)->eregs) + ESP_CMD) 396#endif 397 398#define ESP_INTSOFF(__dregs) \ 399 sbus_writel(sbus_readl((__dregs)+DMA_CSR)&~(DMA_INT_ENAB), (__dregs)+DMA_CSR) 400#define ESP_INTSON(__dregs) \ 401 sbus_writel(sbus_readl((__dregs)+DMA_CSR)|DMA_INT_ENAB, (__dregs)+DMA_CSR) 402#define ESP_IRQ_P(__dregs) \ 403 (sbus_readl((__dregs)+DMA_CSR) & (DMA_HNDL_INTR|DMA_HNDL_ERROR)) 404 405/* How we use the various Linux SCSI data structures for operation. 406 * 407 * struct scsi_cmnd: 408 * 409 * We keep track of the synchronous capabilities of a target 410 * in the device member, using sync_min_period and 411 * sync_max_offset. These are the values we directly write 412 * into the ESP registers while running a command. If offset 413 * is zero the ESP will use asynchronous transfers. 414 * If the borken flag is set we assume we shouldn't even bother 415 * trying to negotiate for synchronous transfer as this target 416 * is really stupid. If we notice the target is dropping the 417 * bus, and we have been allowing it to disconnect, we clear 418 * the disconnect flag. 419 */ 420 421 422/* Manipulation of the ESP command queues. Thanks to the aha152x driver 423 * and its author, Juergen E. Fischer, for the methods used here. 424 * Note that these are per-ESP queues, not global queues like 425 * the aha152x driver uses. 426 */ 427static inline void append_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC) 428{ 429 struct scsi_cmnd *end; 430 431 new_SC->host_scribble = (unsigned char *) NULL; 432 if (!*SC) 433 *SC = new_SC; 434 else { 435 for (end=*SC;end->host_scribble;end=(struct scsi_cmnd *)end->host_scribble) 436 ; 437 end->host_scribble = (unsigned char *) new_SC; 438 } 439} 440 441static inline void prepend_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC) 442{ 443 new_SC->host_scribble = (unsigned char *) *SC; 444 *SC = new_SC; 445} 446 447static inline struct scsi_cmnd *remove_first_SC(struct scsi_cmnd **SC) 448{ 449 struct scsi_cmnd *ptr; 450 ptr = *SC; 451 if (ptr) 452 *SC = (struct scsi_cmnd *) (*SC)->host_scribble; 453 return ptr; 454} 455 456static inline struct scsi_cmnd *remove_SC(struct scsi_cmnd **SC, int target, int lun) 457{ 458 struct scsi_cmnd *ptr, *prev; 459 460 for (ptr = *SC, prev = NULL; 461 ptr && ((ptr->device->id != target) || (ptr->device->lun != lun)); 462 prev = ptr, ptr = (struct scsi_cmnd *) ptr->host_scribble) 463 ; 464 if (ptr) { 465 if (prev) 466 prev->host_scribble=ptr->host_scribble; 467 else 468 *SC=(struct scsi_cmnd *)ptr->host_scribble; 469 } 470 return ptr; 471} 472 473/* Resetting various pieces of the ESP scsi driver chipset/buses. */ 474static void esp_reset_dma(struct esp *esp) 475{ 476 int can_do_burst16, can_do_burst32, can_do_burst64; 477 int can_do_sbus64; 478 u32 tmp; 479 480 can_do_burst16 = (esp->bursts & DMA_BURST16) != 0; 481 can_do_burst32 = (esp->bursts & DMA_BURST32) != 0; 482 can_do_burst64 = 0; 483 can_do_sbus64 = 0; 484 if (sbus_can_dma_64bit(esp->sdev)) 485 can_do_sbus64 = 1; 486 if (sbus_can_burst64(esp->sdev)) 487 can_do_burst64 = (esp->bursts & DMA_BURST64) != 0; 488 489 /* Punt the DVMA into a known state. */ 490 if (esp->dma->revision != dvmahme) { 491 tmp = sbus_readl(esp->dregs + DMA_CSR); 492 sbus_writel(tmp | DMA_RST_SCSI, esp->dregs + DMA_CSR); 493 sbus_writel(tmp & ~DMA_RST_SCSI, esp->dregs + DMA_CSR); 494 } 495 switch (esp->dma->revision) { 496 case dvmahme: 497 /* This is the HME DVMA gate array. */ 498 499 sbus_writel(DMA_RESET_FAS366, esp->dregs + DMA_CSR); 500 sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR); 501 502 esp->prev_hme_dmacsr = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB); 503 esp->prev_hme_dmacsr &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ); 504 505 if (can_do_burst64) 506 esp->prev_hme_dmacsr |= DMA_BRST64; 507 else if (can_do_burst32) 508 esp->prev_hme_dmacsr |= DMA_BRST32; 509 510 if (can_do_sbus64) { 511 esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64; 512 sbus_set_sbus64(esp->sdev, esp->bursts); 513 } 514 515 /* This chip is horrible. */ 516 while (sbus_readl(esp->dregs + DMA_CSR) & DMA_PEND_READ) 517 udelay(1); 518 519 sbus_writel(0, esp->dregs + DMA_CSR); 520 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR); 521 522 /* This is necessary to avoid having the SCSI channel 523 * engine lock up on us. 524 */ 525 sbus_writel(0, esp->dregs + DMA_ADDR); 526 527 break; 528 case dvmarev2: 529 /* This is the gate array found in the sun4m 530 * NCR SBUS I/O subsystem. 531 */ 532 if (esp->erev != esp100) { 533 tmp = sbus_readl(esp->dregs + DMA_CSR); 534 sbus_writel(tmp | DMA_3CLKS, esp->dregs + DMA_CSR); 535 } 536 break; 537 case dvmarev3: 538 tmp = sbus_readl(esp->dregs + DMA_CSR); 539 tmp &= ~DMA_3CLKS; 540 tmp |= DMA_2CLKS; 541 if (can_do_burst32) { 542 tmp &= ~DMA_BRST_SZ; 543 tmp |= DMA_BRST32; 544 } 545 sbus_writel(tmp, esp->dregs + DMA_CSR); 546 break; 547 case dvmaesc1: 548 /* This is the DMA unit found on SCSI/Ether cards. */ 549 tmp = sbus_readl(esp->dregs + DMA_CSR); 550 tmp |= DMA_ADD_ENABLE; 551 tmp &= ~DMA_BCNT_ENAB; 552 if (!can_do_burst32 && can_do_burst16) { 553 tmp |= DMA_ESC_BURST; 554 } else { 555 tmp &= ~(DMA_ESC_BURST); 556 } 557 sbus_writel(tmp, esp->dregs + DMA_CSR); 558 break; 559 default: 560 break; 561 }; 562 ESP_INTSON(esp->dregs); 563} 564 565/* Reset the ESP chip, _not_ the SCSI bus. */ 566static void __init esp_reset_esp(struct esp *esp) 567{ 568 u8 family_code, version; 569 int i; 570 571 /* Now reset the ESP chip */ 572 esp_cmd(esp, ESP_CMD_RC); 573 esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA); 574 esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA); 575 576 /* Reload the configuration registers */ 577 sbus_writeb(esp->cfact, esp->eregs + ESP_CFACT); 578 esp->prev_stp = 0; 579 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 580 esp->prev_soff = 0; 581 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 582 sbus_writeb(esp->neg_defp, esp->eregs + ESP_TIMEO); 583 584 /* This is the only point at which it is reliable to read 585 * the ID-code for a fast ESP chip variants. 586 */ 587 esp->max_period = ((35 * esp->ccycle) / 1000); 588 if (esp->erev == fast) { 589 version = sbus_readb(esp->eregs + ESP_UID); 590 family_code = (version & 0xf8) >> 3; 591 if (family_code == 0x02) 592 esp->erev = fas236; 593 else if (family_code == 0x0a) 594 esp->erev = fashme; /* Version is usually '5'. */ 595 else 596 esp->erev = fas100a; 597 ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n", 598 esp->esp_id, 599 (esp->erev == fas236) ? "fas236" : 600 ((esp->erev == fas100a) ? "fas100a" : 601 "fasHME"), family_code, (version & 7))); 602 603 esp->min_period = ((4 * esp->ccycle) / 1000); 604 } else { 605 esp->min_period = ((5 * esp->ccycle) / 1000); 606 } 607 esp->max_period = (esp->max_period + 3)>>2; 608 esp->min_period = (esp->min_period + 3)>>2; 609 610 sbus_writeb(esp->config1, esp->eregs + ESP_CFG1); 611 switch (esp->erev) { 612 case esp100: 613 /* nothing to do */ 614 break; 615 case esp100a: 616 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 617 break; 618 case esp236: 619 /* Slow 236 */ 620 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 621 esp->prev_cfg3 = esp->config3[0]; 622 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 623 break; 624 case fashme: 625 esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB); 626 /* fallthrough... */ 627 case fas236: 628 /* Fast 236 or HME */ 629 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 630 for (i = 0; i < 16; i++) { 631 if (esp->erev == fashme) { 632 u8 cfg3; 633 634 cfg3 = ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH; 635 if (esp->scsi_id >= 8) 636 cfg3 |= ESP_CONFIG3_IDBIT3; 637 esp->config3[i] |= cfg3; 638 } else { 639 esp->config3[i] |= ESP_CONFIG3_FCLK; 640 } 641 } 642 esp->prev_cfg3 = esp->config3[0]; 643 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 644 if (esp->erev == fashme) { 645 esp->radelay = 80; 646 } else { 647 if (esp->diff) 648 esp->radelay = 0; 649 else 650 esp->radelay = 96; 651 } 652 break; 653 case fas100a: 654 /* Fast 100a */ 655 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 656 for (i = 0; i < 16; i++) 657 esp->config3[i] |= ESP_CONFIG3_FCLOCK; 658 esp->prev_cfg3 = esp->config3[0]; 659 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 660 esp->radelay = 32; 661 break; 662 default: 663 panic("esp: what could it be... I wonder..."); 664 break; 665 }; 666 667 /* Eat any bitrot in the chip */ 668 sbus_readb(esp->eregs + ESP_INTRPT); 669 udelay(100); 670} 671 672/* This places the ESP into a known state at boot time. */ 673static void __init esp_bootup_reset(struct esp *esp) 674{ 675 u8 tmp; 676 677 /* Reset the DMA */ 678 esp_reset_dma(esp); 679 680 /* Reset the ESP */ 681 esp_reset_esp(esp); 682 683 /* Reset the SCSI bus, but tell ESP not to generate an irq */ 684 tmp = sbus_readb(esp->eregs + ESP_CFG1); 685 tmp |= ESP_CONFIG1_SRRDISAB; 686 sbus_writeb(tmp, esp->eregs + ESP_CFG1); 687 688 esp_cmd(esp, ESP_CMD_RS); 689 udelay(400); 690 691 sbus_writeb(esp->config1, esp->eregs + ESP_CFG1); 692 693 /* Eat any bitrot in the chip and we are done... */ 694 sbus_readb(esp->eregs + ESP_INTRPT); 695} 696 697static void esp_chain_add(struct esp *esp) 698{ 699 spin_lock_irq(&espchain_lock); 700 if (espchain) { 701 struct esp *elink = espchain; 702 while (elink->next) 703 elink = elink->next; 704 elink->next = esp; 705 } else { 706 espchain = esp; 707 } 708 esp->next = NULL; 709 spin_unlock_irq(&espchain_lock); 710} 711 712static void esp_chain_del(struct esp *esp) 713{ 714 spin_lock_irq(&espchain_lock); 715 if (espchain == esp) { 716 espchain = esp->next; 717 } else { 718 struct esp *elink = espchain; 719 while (elink->next != esp) 720 elink = elink->next; 721 elink->next = esp->next; 722 } 723 esp->next = NULL; 724 spin_unlock_irq(&espchain_lock); 725} 726 727static int __init esp_find_dvma(struct esp *esp, struct sbus_dev *dma_sdev) 728{ 729 struct sbus_dev *sdev = esp->sdev; 730 struct sbus_dma *dma; 731 732 if (dma_sdev != NULL) { 733 for_each_dvma(dma) { 734 if (dma->sdev == dma_sdev) 735 break; 736 } 737 } else { 738 for_each_dvma(dma) { 739 /* If allocated already, can't use it. */ 740 if (dma->allocated) 741 continue; 742 743 if (dma->sdev == NULL) 744 break; 745 746 /* If bus + slot are the same and it has the 747 * correct OBP name, it's ours. 748 */ 749 if (sdev->bus == dma->sdev->bus && 750 sdev->slot == dma->sdev->slot && 751 (!strcmp(dma->sdev->prom_name, "dma") || 752 !strcmp(dma->sdev->prom_name, "espdma"))) 753 break; 754 } 755 } 756 757 /* If we don't know how to handle the dvma, 758 * do not use this device. 759 */ 760 if (dma == NULL) { 761 printk("Cannot find dvma for ESP%d's SCSI\n", esp->esp_id); 762 return -1; 763 } 764 if (dma->allocated) { 765 printk("esp%d: can't use my espdma\n", esp->esp_id); 766 return -1; 767 } 768 dma->allocated = 1; 769 esp->dma = dma; 770 esp->dregs = dma->regs; 771 772 return 0; 773} 774 775static int __init esp_map_regs(struct esp *esp, int hme) 776{ 777 struct sbus_dev *sdev = esp->sdev; 778 struct resource *res; 779 780 /* On HME, two reg sets exist, first is DVMA, 781 * second is ESP registers. 782 */ 783 if (hme) 784 res = &sdev->resource[1]; 785 else 786 res = &sdev->resource[0]; 787 788 esp->eregs = sbus_ioremap(res, 0, ESP_REG_SIZE, "ESP Registers"); 789 790 if (esp->eregs == 0) 791 return -1; 792 return 0; 793} 794 795static int __init esp_map_cmdarea(struct esp *esp) 796{ 797 struct sbus_dev *sdev = esp->sdev; 798 799 esp->esp_command = sbus_alloc_consistent(sdev, 16, 800 &esp->esp_command_dvma); 801 if (esp->esp_command == NULL || 802 esp->esp_command_dvma == 0) 803 return -1; 804 return 0; 805} 806 807static int __init esp_register_irq(struct esp *esp) 808{ 809 esp->ehost->irq = esp->irq = esp->sdev->irqs[0]; 810 811 /* We used to try various overly-clever things to 812 * reduce the interrupt processing overhead on 813 * sun4c/sun4m when multiple ESP's shared the 814 * same IRQ. It was too complex and messy to 815 * sanely maintain. 816 */ 817 if (request_irq(esp->ehost->irq, esp_intr, 818 SA_SHIRQ, "ESP SCSI", esp)) { 819 printk("esp%d: Cannot acquire irq line\n", 820 esp->esp_id); 821 return -1; 822 } 823 824 printk("esp%d: IRQ %s ", esp->esp_id, 825 __irq_itoa(esp->ehost->irq)); 826 827 return 0; 828} 829 830static void __init esp_get_scsi_id(struct esp *esp) 831{ 832 struct sbus_dev *sdev = esp->sdev; 833 834 esp->scsi_id = prom_getintdefault(esp->prom_node, 835 "initiator-id", 836 -1); 837 if (esp->scsi_id == -1) 838 esp->scsi_id = prom_getintdefault(esp->prom_node, 839 "scsi-initiator-id", 840 -1); 841 if (esp->scsi_id == -1) 842 esp->scsi_id = (sdev->bus == NULL) ? 7 : 843 prom_getintdefault(sdev->bus->prom_node, 844 "scsi-initiator-id", 845 7); 846 esp->ehost->this_id = esp->scsi_id; 847 esp->scsi_id_mask = (1 << esp->scsi_id); 848 849} 850 851static void __init esp_get_clock_params(struct esp *esp) 852{ 853 struct sbus_dev *sdev = esp->sdev; 854 int prom_node = esp->prom_node; 855 int sbus_prom_node; 856 unsigned int fmhz; 857 u8 ccf; 858 859 if (sdev != NULL && sdev->bus != NULL) 860 sbus_prom_node = sdev->bus->prom_node; 861 else 862 sbus_prom_node = 0; 863 864 /* This is getting messy but it has to be done 865 * correctly or else you get weird behavior all 866 * over the place. We are trying to basically 867 * figure out three pieces of information. 868 * 869 * a) Clock Conversion Factor 870 * 871 * This is a representation of the input 872 * crystal clock frequency going into the 873 * ESP on this machine. Any operation whose 874 * timing is longer than 400ns depends on this 875 * value being correct. For example, you'll 876 * get blips for arbitration/selection during 877 * high load or with multiple targets if this 878 * is not set correctly. 879 * 880 * b) Selection Time-Out 881 * 882 * The ESP isn't very bright and will arbitrate 883 * for the bus and try to select a target 884 * forever if you let it. This value tells 885 * the ESP when it has taken too long to 886 * negotiate and that it should interrupt 887 * the CPU so we can see what happened. 888 * The value is computed as follows (from 889 * NCR/Symbios chip docs). 890 * 891 * (Time Out Period) * (Input Clock) 892 * STO = ---------------------------------- 893 * (8192) * (Clock Conversion Factor) 894 * 895 * You usually want the time out period to be 896 * around 250ms, I think we'll set it a little 897 * bit higher to account for fully loaded SCSI 898 * bus's and slow devices that don't respond so 899 * quickly to selection attempts. (yeah, I know 900 * this is out of spec. but there is a lot of 901 * buggy pieces of firmware out there so bite me) 902 * 903 * c) Imperical constants for synchronous offset 904 * and transfer period register values 905 * 906 * This entails the smallest and largest sync 907 * period we could ever handle on this ESP. 908 */ 909 910 fmhz = prom_getintdefault(prom_node, "clock-frequency", -1); 911 if (fmhz == -1) 912 fmhz = (!sbus_prom_node) ? 0 : 913 prom_getintdefault(sbus_prom_node, "clock-frequency", -1); 914 915 if (fmhz <= (5000000)) 916 ccf = 0; 917 else 918 ccf = (((5000000 - 1) + (fmhz))/(5000000)); 919 920 if (!ccf || ccf > 8) { 921 /* If we can't find anything reasonable, 922 * just assume 20MHZ. This is the clock 923 * frequency of the older sun4c's where I've 924 * been unable to find the clock-frequency 925 * PROM property. All other machines provide 926 * useful values it seems. 927 */ 928 ccf = ESP_CCF_F4; 929 fmhz = (20000000); 930 } 931 932 if (ccf == (ESP_CCF_F7 + 1)) 933 esp->cfact = ESP_CCF_F0; 934 else if (ccf == ESP_CCF_NEVER) 935 esp->cfact = ESP_CCF_F2; 936 else 937 esp->cfact = ccf; 938 esp->raw_cfact = ccf; 939 940 esp->cfreq = fmhz; 941 esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz); 942 esp->ctick = ESP_TICK(ccf, esp->ccycle); 943 esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf); 944 esp->sync_defp = SYNC_DEFP_SLOW; 945 946 printk("SCSI ID %d Clk %dMHz CCYC=%d CCF=%d TOut %d ", 947 esp->scsi_id, (fmhz / 1000000), 948 (int)esp->ccycle, (int)ccf, (int) esp->neg_defp); 949} 950 951static void __init esp_get_bursts(struct esp *esp, struct sbus_dev *dma) 952{ 953 struct sbus_dev *sdev = esp->sdev; 954 u8 bursts; 955 956 bursts = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff); 957 958 if (dma) { 959 u8 tmp = prom_getintdefault(dma->prom_node, 960 "burst-sizes", 0xff); 961 if (tmp != 0xff) 962 bursts &= tmp; 963 } 964 965 if (sdev->bus) { 966 u8 tmp = prom_getintdefault(sdev->bus->prom_node, 967 "burst-sizes", 0xff); 968 if (tmp != 0xff) 969 bursts &= tmp; 970 } 971 972 if (bursts == 0xff || 973 (bursts & DMA_BURST16) == 0 || 974 (bursts & DMA_BURST32) == 0) 975 bursts = (DMA_BURST32 - 1); 976 977 esp->bursts = bursts; 978} 979 980static void __init esp_get_revision(struct esp *esp) 981{ 982 u8 tmp; 983 984 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7)); 985 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY); 986 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 987 988 tmp = sbus_readb(esp->eregs + ESP_CFG2); 989 tmp &= ~ESP_CONFIG2_MAGIC; 990 if (tmp != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) { 991 /* If what we write to cfg2 does not come back, cfg2 992 * is not implemented, therefore this must be a plain 993 * esp100. 994 */ 995 esp->erev = esp100; 996 printk("NCR53C90(esp100)\n"); 997 } else { 998 esp->config2 = 0; 999 esp->prev_cfg3 = esp->config3[0] = 5; 1000 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 1001 sbus_writeb(0, esp->eregs + ESP_CFG3); 1002 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 1003 1004 tmp = sbus_readb(esp->eregs + ESP_CFG3); 1005 if (tmp != 5) { 1006 /* The cfg2 register is implemented, however 1007 * cfg3 is not, must be esp100a. 1008 */ 1009 esp->erev = esp100a; 1010 printk("NCR53C90A(esp100a)\n"); 1011 } else { 1012 int target; 1013 1014 for (target = 0; target < 16; target++) 1015 esp->config3[target] = 0; 1016 esp->prev_cfg3 = 0; 1017 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 1018 1019 /* All of cfg{1,2,3} implemented, must be one of 1020 * the fas variants, figure out which one. 1021 */ 1022 if (esp->raw_cfact > ESP_CCF_F5) { 1023 esp->erev = fast; 1024 esp->sync_defp = SYNC_DEFP_FAST; 1025 printk("NCR53C9XF(espfast)\n"); 1026 } else { 1027 esp->erev = esp236; 1028 printk("NCR53C9x(esp236)\n"); 1029 } 1030 esp->config2 = 0; 1031 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2); 1032 } 1033 } 1034} 1035 1036static void __init esp_init_swstate(struct esp *esp) 1037{ 1038 int i; 1039 1040 /* Command queues... */ 1041 esp->current_SC = NULL; 1042 esp->disconnected_SC = NULL; 1043 esp->issue_SC = NULL; 1044 1045 /* Target and current command state... */ 1046 esp->targets_present = 0; 1047 esp->resetting_bus = 0; 1048 esp->snip = 0; 1049 1050 init_waitqueue_head(&esp->reset_queue); 1051 1052 /* Debugging... */ 1053 for(i = 0; i < 32; i++) 1054 esp->espcmdlog[i] = 0; 1055 esp->espcmdent = 0; 1056 1057 /* MSG phase state... */ 1058 for(i = 0; i < 16; i++) { 1059 esp->cur_msgout[i] = 0; 1060 esp->cur_msgin[i] = 0; 1061 } 1062 esp->prevmsgout = esp->prevmsgin = 0; 1063 esp->msgout_len = esp->msgin_len = 0; 1064 1065 /* Clear the one behind caches to hold unmatchable values. */ 1066 esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff; 1067 esp->prev_hme_dmacsr = 0xffffffff; 1068} 1069 1070static int __init detect_one_esp(struct scsi_host_template *tpnt, struct sbus_dev *esp_dev, 1071 struct sbus_dev *espdma, struct sbus_bus *sbus, 1072 int id, int hme) 1073{ 1074 struct Scsi_Host *esp_host = scsi_register(tpnt, sizeof(struct esp)); 1075 struct esp *esp; 1076 1077 if (!esp_host) { 1078 printk("ESP: Cannot register SCSI host\n"); 1079 return -1; 1080 } 1081 if (hme) 1082 esp_host->max_id = 16; 1083 esp = (struct esp *) esp_host->hostdata; 1084 esp->ehost = esp_host; 1085 esp->sdev = esp_dev; 1086 esp->esp_id = id; 1087 esp->prom_node = esp_dev->prom_node; 1088 prom_getstring(esp->prom_node, "name", esp->prom_name, 1089 sizeof(esp->prom_name)); 1090 1091 esp_chain_add(esp); 1092 if (esp_find_dvma(esp, espdma) < 0) 1093 goto fail_unlink; 1094 if (esp_map_regs(esp, hme) < 0) { 1095 printk("ESP registers unmappable"); 1096 goto fail_dvma_release; 1097 } 1098 if (esp_map_cmdarea(esp) < 0) { 1099 printk("ESP DVMA transport area unmappable"); 1100 goto fail_unmap_regs; 1101 } 1102 if (esp_register_irq(esp) < 0) 1103 goto fail_unmap_cmdarea; 1104 1105 esp_get_scsi_id(esp); 1106 1107 esp->diff = prom_getbool(esp->prom_node, "differential"); 1108 if (esp->diff) 1109 printk("Differential "); 1110 1111 esp_get_clock_params(esp); 1112 esp_get_bursts(esp, espdma); 1113 esp_get_revision(esp); 1114 esp_init_swstate(esp); 1115 1116 esp_bootup_reset(esp); 1117 1118 return 0; 1119 1120fail_unmap_cmdarea: 1121 sbus_free_consistent(esp->sdev, 16, 1122 (void *) esp->esp_command, 1123 esp->esp_command_dvma); 1124 1125fail_unmap_regs: 1126 sbus_iounmap(esp->eregs, ESP_REG_SIZE); 1127 1128fail_dvma_release: 1129 esp->dma->allocated = 0; 1130 1131fail_unlink: 1132 esp_chain_del(esp); 1133 scsi_unregister(esp_host); 1134 return -1; 1135} 1136 1137/* Detecting ESP chips on the machine. This is the simple and easy 1138 * version. 1139 */ 1140 1141#ifdef CONFIG_SUN4 1142 1143#include <asm/sun4paddr.h> 1144 1145static int __init esp_detect(struct scsi_host_template *tpnt) 1146{ 1147 static struct sbus_dev esp_dev; 1148 int esps_in_use = 0; 1149 1150 espchain = NULL; 1151 1152 if (sun4_esp_physaddr) { 1153 memset (&esp_dev, 0, sizeof(esp_dev)); 1154 esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr; 1155 esp_dev.irqs[0] = 4; 1156 esp_dev.resource[0].start = sun4_esp_physaddr; 1157 esp_dev.resource[0].end = sun4_esp_physaddr + ESP_REG_SIZE - 1; 1158 esp_dev.resource[0].flags = IORESOURCE_IO; 1159 1160 if (!detect_one_esp(tpnt, &esp_dev, NULL, NULL, 0, 0)) 1161 esps_in_use++; 1162 printk("ESP: Total of 1 ESP hosts found, %d actually in use.\n", esps_in_use); 1163 esps_running = esps_in_use; 1164 } 1165 return esps_in_use; 1166} 1167 1168#else /* !CONFIG_SUN4 */ 1169 1170static int __init esp_detect(struct scsi_host_template *tpnt) 1171{ 1172 struct sbus_bus *sbus; 1173 struct sbus_dev *esp_dev, *sbdev_iter; 1174 int nesps = 0, esps_in_use = 0; 1175 1176 espchain = 0; 1177 if (!sbus_root) { 1178#ifdef CONFIG_PCI 1179 return 0; 1180#else 1181 panic("No SBUS in esp_detect()"); 1182#endif 1183 } 1184 for_each_sbus(sbus) { 1185 for_each_sbusdev(sbdev_iter, sbus) { 1186 struct sbus_dev *espdma = NULL; 1187 int hme = 0; 1188 1189 /* Is it an esp sbus device? */ 1190 esp_dev = sbdev_iter; 1191 if (strcmp(esp_dev->prom_name, "esp") && 1192 strcmp(esp_dev->prom_name, "SUNW,esp")) { 1193 if (!strcmp(esp_dev->prom_name, "SUNW,fas")) { 1194 hme = 1; 1195 espdma = esp_dev; 1196 } else { 1197 if (!esp_dev->child || 1198 (strcmp(esp_dev->prom_name, "espdma") && 1199 strcmp(esp_dev->prom_name, "dma"))) 1200 continue; /* nope... */ 1201 espdma = esp_dev; 1202 esp_dev = esp_dev->child; 1203 if (strcmp(esp_dev->prom_name, "esp") && 1204 strcmp(esp_dev->prom_name, "SUNW,esp")) 1205 continue; /* how can this happen? */ 1206 } 1207 } 1208 1209 if (detect_one_esp(tpnt, esp_dev, espdma, sbus, nesps++, hme) < 0) 1210 continue; 1211 1212 esps_in_use++; 1213 } /* for each sbusdev */ 1214 } /* for each sbus */ 1215 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, 1216 esps_in_use); 1217 esps_running = esps_in_use; 1218 return esps_in_use; 1219} 1220 1221#endif /* !CONFIG_SUN4 */ 1222 1223/* 1224 */ 1225static int esp_release(struct Scsi_Host *host) 1226{ 1227 struct esp *esp = (struct esp *) host->hostdata; 1228 1229 ESP_INTSOFF(esp->dregs); 1230#if 0 1231 esp_reset_dma(esp); 1232 esp_reset_esp(esp); 1233#endif 1234 1235 free_irq(esp->ehost->irq, esp); 1236 sbus_free_consistent(esp->sdev, 16, 1237 (void *) esp->esp_command, esp->esp_command_dvma); 1238 sbus_iounmap(esp->eregs, ESP_REG_SIZE); 1239 esp->dma->allocated = 0; 1240 esp_chain_del(esp); 1241 1242 return 0; 1243} 1244 1245/* The info function will return whatever useful 1246 * information the developer sees fit. If not provided, then 1247 * the name field will be used instead. 1248 */ 1249static const char *esp_info(struct Scsi_Host *host) 1250{ 1251 struct esp *esp; 1252 1253 esp = (struct esp *) host->hostdata; 1254 switch (esp->erev) { 1255 case esp100: 1256 return "Sparc ESP100 (NCR53C90)"; 1257 case esp100a: 1258 return "Sparc ESP100A (NCR53C90A)"; 1259 case esp236: 1260 return "Sparc ESP236"; 1261 case fas236: 1262 return "Sparc ESP236-FAST"; 1263 case fashme: 1264 return "Sparc ESP366-HME"; 1265 case fas100a: 1266 return "Sparc ESP100A-FAST"; 1267 default: 1268 return "Bogon ESP revision"; 1269 }; 1270} 1271 1272/* From Wolfgang Stanglmeier's NCR scsi driver. */ 1273struct info_str 1274{ 1275 char *buffer; 1276 int length; 1277 int offset; 1278 int pos; 1279}; 1280 1281static void copy_mem_info(struct info_str *info, char *data, int len) 1282{ 1283 if (info->pos + len > info->length) 1284 len = info->length - info->pos; 1285 1286 if (info->pos + len < info->offset) { 1287 info->pos += len; 1288 return; 1289 } 1290 if (info->pos < info->offset) { 1291 data += (info->offset - info->pos); 1292 len -= (info->offset - info->pos); 1293 } 1294 1295 if (len > 0) { 1296 memcpy(info->buffer + info->pos, data, len); 1297 info->pos += len; 1298 } 1299} 1300 1301static int copy_info(struct info_str *info, char *fmt, ...) 1302{ 1303 va_list args; 1304 char buf[81]; 1305 int len; 1306 1307 va_start(args, fmt); 1308 len = vsprintf(buf, fmt, args); 1309 va_end(args); 1310 1311 copy_mem_info(info, buf, len); 1312 return len; 1313} 1314 1315static int esp_host_info(struct esp *esp, char *ptr, off_t offset, int len) 1316{ 1317 struct scsi_device *sdev; 1318 struct info_str info; 1319 int i; 1320 1321 info.buffer = ptr; 1322 info.length = len; 1323 info.offset = offset; 1324 info.pos = 0; 1325 1326 copy_info(&info, "Sparc ESP Host Adapter:\n"); 1327 copy_info(&info, "\tPROM node\t\t%08x\n", (unsigned int) esp->prom_node); 1328 copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name); 1329 copy_info(&info, "\tESP Model\t\t"); 1330 switch (esp->erev) { 1331 case esp100: 1332 copy_info(&info, "ESP100\n"); 1333 break; 1334 case esp100a: 1335 copy_info(&info, "ESP100A\n"); 1336 break; 1337 case esp236: 1338 copy_info(&info, "ESP236\n"); 1339 break; 1340 case fas236: 1341 copy_info(&info, "FAS236\n"); 1342 break; 1343 case fas100a: 1344 copy_info(&info, "FAS100A\n"); 1345 break; 1346 case fast: 1347 copy_info(&info, "FAST\n"); 1348 break; 1349 case fashme: 1350 copy_info(&info, "Happy Meal FAS\n"); 1351 break; 1352 case espunknown: 1353 default: 1354 copy_info(&info, "Unknown!\n"); 1355 break; 1356 }; 1357 copy_info(&info, "\tDMA Revision\t\t"); 1358 switch (esp->dma->revision) { 1359 case dvmarev0: 1360 copy_info(&info, "Rev 0\n"); 1361 break; 1362 case dvmaesc1: 1363 copy_info(&info, "ESC Rev 1\n"); 1364 break; 1365 case dvmarev1: 1366 copy_info(&info, "Rev 1\n"); 1367 break; 1368 case dvmarev2: 1369 copy_info(&info, "Rev 2\n"); 1370 break; 1371 case dvmarev3: 1372 copy_info(&info, "Rev 3\n"); 1373 break; 1374 case dvmarevplus: 1375 copy_info(&info, "Rev 1+\n"); 1376 break; 1377 case dvmahme: 1378 copy_info(&info, "Rev HME/FAS\n"); 1379 break; 1380 default: 1381 copy_info(&info, "Unknown!\n"); 1382 break; 1383 }; 1384 copy_info(&info, "\tLive Targets\t\t[ "); 1385 for (i = 0; i < 15; i++) { 1386 if (esp->targets_present & (1 << i)) 1387 copy_info(&info, "%d ", i); 1388 } 1389 copy_info(&info, "]\n\n"); 1390 1391 /* Now describe the state of each existing target. */ 1392 copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n"); 1393 1394 shost_for_each_device(sdev, esp->ehost) { 1395 struct esp_device *esp_dev = sdev->hostdata; 1396 uint id = sdev->id; 1397 1398 if (!(esp->targets_present & (1 << id))) 1399 continue; 1400 1401 copy_info(&info, "%d\t\t", id); 1402 copy_info(&info, "%08lx\t", esp->config3[id]); 1403 copy_info(&info, "[%02lx,%02lx]\t\t\t", 1404 esp_dev->sync_max_offset, 1405 esp_dev->sync_min_period); 1406 copy_info(&info, "%s\t\t", 1407 esp_dev->disconnect ? "yes" : "no"); 1408 copy_info(&info, "%s\n", 1409 (esp->config3[id] & ESP_CONFIG3_EWIDE) ? "yes" : "no"); 1410 } 1411 return info.pos > info.offset? info.pos - info.offset : 0; 1412} 1413 1414/* ESP proc filesystem code. */ 1415static int esp_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset, 1416 int length, int inout) 1417{ 1418 struct esp *esp; 1419 1420 if (inout) 1421 return -EINVAL; /* not yet */ 1422 1423 for_each_esp(esp) { 1424 if (esp->ehost == host) 1425 break; 1426 } 1427 if (!esp) 1428 return -EINVAL; 1429 1430 if (start) 1431 *start = buffer; 1432 1433 return esp_host_info(esp, buffer, offset, length); 1434} 1435 1436static void esp_get_dmabufs(struct esp *esp, struct scsi_cmnd *sp) 1437{ 1438 if (sp->use_sg == 0) { 1439 sp->SCp.this_residual = sp->request_bufflen; 1440 sp->SCp.buffer = (struct scatterlist *) sp->request_buffer; 1441 sp->SCp.buffers_residual = 0; 1442 if (sp->request_bufflen) { 1443 sp->SCp.have_data_in = sbus_map_single(esp->sdev, sp->SCp.buffer, 1444 sp->SCp.this_residual, 1445 sp->sc_data_direction); 1446 sp->SCp.ptr = (char *) ((unsigned long)sp->SCp.have_data_in); 1447 } else { 1448 sp->SCp.ptr = NULL; 1449 } 1450 } else { 1451 sp->SCp.buffer = (struct scatterlist *) sp->buffer; 1452 sp->SCp.buffers_residual = sbus_map_sg(esp->sdev, 1453 sp->SCp.buffer, 1454 sp->use_sg, 1455 sp->sc_data_direction); 1456 sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer); 1457 sp->SCp.ptr = (char *) ((unsigned long)sg_dma_address(sp->SCp.buffer)); 1458 } 1459} 1460 1461static void esp_release_dmabufs(struct esp *esp, struct scsi_cmnd *sp) 1462{ 1463 if (sp->use_sg) { 1464 sbus_unmap_sg(esp->sdev, sp->buffer, sp->use_sg, 1465 sp->sc_data_direction); 1466 } else if (sp->request_bufflen) { 1467 sbus_unmap_single(esp->sdev, 1468 sp->SCp.have_data_in, 1469 sp->request_bufflen, 1470 sp->sc_data_direction); 1471 } 1472} 1473 1474static void esp_restore_pointers(struct esp *esp, struct scsi_cmnd *sp) 1475{ 1476 struct esp_pointers *ep = &esp->data_pointers[sp->device->id]; 1477 1478 sp->SCp.ptr = ep->saved_ptr; 1479 sp->SCp.buffer = ep->saved_buffer; 1480 sp->SCp.this_residual = ep->saved_this_residual; 1481 sp->SCp.buffers_residual = ep->saved_buffers_residual; 1482} 1483 1484static void esp_save_pointers(struct esp *esp, struct scsi_cmnd *sp) 1485{ 1486 struct esp_pointers *ep = &esp->data_pointers[sp->device->id]; 1487 1488 ep->saved_ptr = sp->SCp.ptr; 1489 ep->saved_buffer = sp->SCp.buffer; 1490 ep->saved_this_residual = sp->SCp.this_residual; 1491 ep->saved_buffers_residual = sp->SCp.buffers_residual; 1492} 1493 1494/* Some rules: 1495 * 1496 * 1) Never ever panic while something is live on the bus. 1497 * If there is to be any chance of syncing the disks this 1498 * rule is to be obeyed. 1499 * 1500 * 2) Any target that causes a foul condition will no longer 1501 * have synchronous transfers done to it, no questions 1502 * asked. 1503 * 1504 * 3) Keep register accesses to a minimum. Think about some 1505 * day when we have Xbus machines this is running on and 1506 * the ESP chip is on the other end of the machine on a 1507 * different board from the cpu where this is running. 1508 */ 1509 1510/* Fire off a command. We assume the bus is free and that the only 1511 * case where we could see an interrupt is where we have disconnected 1512 * commands active and they are trying to reselect us. 1513 */ 1514static inline void esp_check_cmd(struct esp *esp, struct scsi_cmnd *sp) 1515{ 1516 switch (sp->cmd_len) { 1517 case 6: 1518 case 10: 1519 case 12: 1520 esp->esp_slowcmd = 0; 1521 break; 1522 1523 default: 1524 esp->esp_slowcmd = 1; 1525 esp->esp_scmdleft = sp->cmd_len; 1526 esp->esp_scmdp = &sp->cmnd[0]; 1527 break; 1528 }; 1529} 1530 1531static inline void build_sync_nego_msg(struct esp *esp, int period, int offset) 1532{ 1533 esp->cur_msgout[0] = EXTENDED_MESSAGE; 1534 esp->cur_msgout[1] = 3; 1535 esp->cur_msgout[2] = EXTENDED_SDTR; 1536 esp->cur_msgout[3] = period; 1537 esp->cur_msgout[4] = offset; 1538 esp->msgout_len = 5; 1539} 1540 1541/* SIZE is in bits, currently HME only supports 16 bit wide transfers. */ 1542static inline void build_wide_nego_msg(struct esp *esp, int size) 1543{ 1544 esp->cur_msgout[0] = EXTENDED_MESSAGE; 1545 esp->cur_msgout[1] = 2; 1546 esp->cur_msgout[2] = EXTENDED_WDTR; 1547 switch (size) { 1548 case 32: 1549 esp->cur_msgout[3] = 2; 1550 break; 1551 case 16: 1552 esp->cur_msgout[3] = 1; 1553 break; 1554 case 8: 1555 default: 1556 esp->cur_msgout[3] = 0; 1557 break; 1558 }; 1559 1560 esp->msgout_len = 4; 1561} 1562 1563static void esp_exec_cmd(struct esp *esp) 1564{ 1565 struct scsi_cmnd *SCptr; 1566 struct scsi_device *SDptr; 1567 struct esp_device *esp_dev; 1568 volatile u8 *cmdp = esp->esp_command; 1569 u8 the_esp_command; 1570 int lun, target; 1571 int i; 1572 1573 /* Hold off if we have disconnected commands and 1574 * an IRQ is showing... 1575 */ 1576 if (esp->disconnected_SC && ESP_IRQ_P(esp->dregs)) 1577 return; 1578 1579 /* Grab first member of the issue queue. */ 1580 SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC); 1581 1582 /* Safe to panic here because current_SC is null. */ 1583 if (!SCptr) 1584 panic("esp: esp_exec_cmd and issue queue is NULL"); 1585 1586 SDptr = SCptr->device; 1587 esp_dev = SDptr->hostdata; 1588 lun = SCptr->device->lun; 1589 target = SCptr->device->id; 1590 1591 esp->snip = 0; 1592 esp->msgout_len = 0; 1593 1594 /* Send it out whole, or piece by piece? The ESP 1595 * only knows how to automatically send out 6, 10, 1596 * and 12 byte commands. I used to think that the 1597 * Linux SCSI code would never throw anything other 1598 * than that to us, but then again there is the 1599 * SCSI generic driver which can send us anything. 1600 */ 1601 esp_check_cmd(esp, SCptr); 1602 1603 /* If arbitration/selection is successful, the ESP will leave 1604 * ATN asserted, causing the target to go into message out 1605 * phase. The ESP will feed the target the identify and then 1606 * the target can only legally go to one of command, 1607 * datain/out, status, or message in phase, or stay in message 1608 * out phase (should we be trying to send a sync negotiation 1609 * message after the identify). It is not allowed to drop 1610 * BSY, but some buggy targets do and we check for this 1611 * condition in the selection complete code. Most of the time 1612 * we'll make the command bytes available to the ESP and it 1613 * will not interrupt us until it finishes command phase, we 1614 * cannot do this for command sizes the ESP does not 1615 * understand and in this case we'll get interrupted right 1616 * when the target goes into command phase. 1617 * 1618 * It is absolutely _illegal_ in the presence of SCSI-2 devices 1619 * to use the ESP select w/o ATN command. When SCSI-2 devices are 1620 * present on the bus we _must_ always go straight to message out 1621 * phase with an identify message for the target. Being that 1622 * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2 1623 * selections should not confuse SCSI-1 we hope. 1624 */ 1625 1626 if (esp_dev->sync) { 1627 /* this targets sync is known */ 1628#ifndef __sparc_v9__ 1629do_sync_known: 1630#endif 1631 if (esp_dev->disconnect) 1632 *cmdp++ = IDENTIFY(1, lun); 1633 else 1634 *cmdp++ = IDENTIFY(0, lun); 1635 1636 if (esp->esp_slowcmd) { 1637 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA); 1638 esp_advance_phase(SCptr, in_slct_stop); 1639 } else { 1640 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA); 1641 esp_advance_phase(SCptr, in_slct_norm); 1642 } 1643 } else if (!(esp->targets_present & (1<<target)) || !(esp_dev->disconnect)) { 1644 /* After the bootup SCSI code sends both the 1645 * TEST_UNIT_READY and INQUIRY commands we want 1646 * to at least attempt allowing the device to 1647 * disconnect. 1648 */ 1649 ESPMISC(("esp: Selecting device for first time. target=%d " 1650 "lun=%d\n", target, SCptr->device->lun)); 1651 if (!SDptr->borken && !esp_dev->disconnect) 1652 esp_dev->disconnect = 1; 1653 1654 *cmdp++ = IDENTIFY(0, lun); 1655 esp->prevmsgout = NOP; 1656 esp_advance_phase(SCptr, in_slct_norm); 1657 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA); 1658 1659 /* Take no chances... */ 1660 esp_dev->sync_max_offset = 0; 1661 esp_dev->sync_min_period = 0; 1662 } else { 1663 /* Sorry, I have had way too many problems with 1664 * various CDROM devices on ESP. -DaveM 1665 */ 1666 int cdrom_hwbug_wkaround = 0; 1667 1668#ifndef __sparc_v9__ 1669 /* Never allow disconnects or synchronous transfers on 1670 * SparcStation1 and SparcStation1+. Allowing those 1671 * to be enabled seems to lockup the machine completely. 1672 */ 1673 if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) || 1674 (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) { 1675 /* But we are nice and allow tapes and removable 1676 * disks (but not CDROMs) to disconnect. 1677 */ 1678 if(SDptr->type == TYPE_TAPE || 1679 (SDptr->type != TYPE_ROM && SDptr->removable)) 1680 esp_dev->disconnect = 1; 1681 else 1682 esp_dev->disconnect = 0; 1683 esp_dev->sync_max_offset = 0; 1684 esp_dev->sync_min_period = 0; 1685 esp_dev->sync = 1; 1686 esp->snip = 0; 1687 goto do_sync_known; 1688 } 1689#endif /* !(__sparc_v9__) */ 1690 1691 /* We've talked to this guy before, 1692 * but never negotiated. Let's try, 1693 * need to attempt WIDE first, before 1694 * sync nego, as per SCSI 2 standard. 1695 */ 1696 if (esp->erev == fashme && !esp_dev->wide) { 1697 if (!SDptr->borken && 1698 SDptr->type != TYPE_ROM && 1699 SDptr->removable == 0) { 1700 build_wide_nego_msg(esp, 16); 1701 esp_dev->wide = 1; 1702 esp->wnip = 1; 1703 goto after_nego_msg_built; 1704 } else { 1705 esp_dev->wide = 1; 1706 /* Fall through and try sync. */ 1707 } 1708 } 1709 1710 if (!SDptr->borken) { 1711 if ((SDptr->type == TYPE_ROM)) { 1712 /* Nice try sucker... */ 1713 ESPMISC(("esp%d: Disabling sync for buggy " 1714 "CDROM.\n", esp->esp_id)); 1715 cdrom_hwbug_wkaround = 1; 1716 build_sync_nego_msg(esp, 0, 0); 1717 } else if (SDptr->removable != 0) { 1718 ESPMISC(("esp%d: Not negotiating sync/wide but " 1719 "allowing disconnect for removable media.\n", 1720 esp->esp_id)); 1721 build_sync_nego_msg(esp, 0, 0); 1722 } else { 1723 build_sync_nego_msg(esp, esp->sync_defp, 15); 1724 } 1725 } else { 1726 build_sync_nego_msg(esp, 0, 0); 1727 } 1728 esp_dev->sync = 1; 1729 esp->snip = 1; 1730 1731after_nego_msg_built: 1732 /* A fix for broken SCSI1 targets, when they disconnect 1733 * they lock up the bus and confuse ESP. So disallow 1734 * disconnects for SCSI1 targets for now until we 1735 * find a better fix. 1736 * 1737 * Addendum: This is funny, I figured out what was going 1738 * on. The blotzed SCSI1 target would disconnect, 1739 * one of the other SCSI2 targets or both would be 1740 * disconnected as well. The SCSI1 target would 1741 * stay disconnected long enough that we start 1742 * up a command on one of the SCSI2 targets. As 1743 * the ESP is arbitrating for the bus the SCSI1 1744 * target begins to arbitrate as well to reselect 1745 * the ESP. The SCSI1 target refuses to drop it's 1746 * ID bit on the data bus even though the ESP is 1747 * at ID 7 and is the obvious winner for any 1748 * arbitration. The ESP is a poor sport and refuses 1749 * to lose arbitration, it will continue indefinitely 1750 * trying to arbitrate for the bus and can only be 1751 * stopped via a chip reset or SCSI bus reset. 1752 * Therefore _no_ disconnects for SCSI1 targets 1753 * thank you very much. ;-) 1754 */ 1755 if(((SDptr->scsi_level < 3) && 1756 (SDptr->type != TYPE_TAPE) && 1757 SDptr->removable == 0) || 1758 cdrom_hwbug_wkaround || SDptr->borken) { 1759 ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d " 1760 "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun)); 1761 esp_dev->disconnect = 0; 1762 *cmdp++ = IDENTIFY(0, lun); 1763 } else { 1764 *cmdp++ = IDENTIFY(1, lun); 1765 } 1766 1767 /* ESP fifo is only so big... 1768 * Make this look like a slow command. 1769 */ 1770 esp->esp_slowcmd = 1; 1771 esp->esp_scmdleft = SCptr->cmd_len; 1772 esp->esp_scmdp = &SCptr->cmnd[0]; 1773 1774 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA); 1775 esp_advance_phase(SCptr, in_slct_msg); 1776 } 1777 1778 if (!esp->esp_slowcmd) 1779 for (i = 0; i < SCptr->cmd_len; i++) 1780 *cmdp++ = SCptr->cmnd[i]; 1781 1782 /* HME sucks... */ 1783 if (esp->erev == fashme) 1784 sbus_writeb((target & 0xf) | (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT), 1785 esp->eregs + ESP_BUSID); 1786 else 1787 sbus_writeb(target & 7, esp->eregs + ESP_BUSID); 1788 if (esp->prev_soff != esp_dev->sync_max_offset || 1789 esp->prev_stp != esp_dev->sync_min_period || 1790 (esp->erev > esp100a && 1791 esp->prev_cfg3 != esp->config3[target])) { 1792 esp->prev_soff = esp_dev->sync_max_offset; 1793 esp->prev_stp = esp_dev->sync_min_period; 1794 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 1795 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 1796 if (esp->erev > esp100a) { 1797 esp->prev_cfg3 = esp->config3[target]; 1798 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 1799 } 1800 } 1801 i = (cmdp - esp->esp_command); 1802 1803 if (esp->erev == fashme) { 1804 esp_cmd(esp, ESP_CMD_FLUSH); /* Grrr! */ 1805 1806 /* Set up the DMA and HME counters */ 1807 sbus_writeb(i, esp->eregs + ESP_TCLOW); 1808 sbus_writeb(0, esp->eregs + ESP_TCMED); 1809 sbus_writeb(0, esp->eregs + FAS_RLO); 1810 sbus_writeb(0, esp->eregs + FAS_RHI); 1811 esp_cmd(esp, the_esp_command); 1812 1813 /* Talk about touchy hardware... */ 1814 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr | 1815 (DMA_SCSI_DISAB | DMA_ENABLE)) & 1816 ~(DMA_ST_WRITE)); 1817 sbus_writel(16, esp->dregs + DMA_COUNT); 1818 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR); 1819 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR); 1820 } else { 1821 u32 tmp; 1822 1823 /* Set up the DMA and ESP counters */ 1824 sbus_writeb(i, esp->eregs + ESP_TCLOW); 1825 sbus_writeb(0, esp->eregs + ESP_TCMED); 1826 tmp = sbus_readl(esp->dregs + DMA_CSR); 1827 tmp &= ~DMA_ST_WRITE; 1828 tmp |= DMA_ENABLE; 1829 sbus_writel(tmp, esp->dregs + DMA_CSR); 1830 if (esp->dma->revision == dvmaesc1) { 1831 if (i) /* Workaround ESC gate array SBUS rerun bug. */ 1832 sbus_writel(PAGE_SIZE, esp->dregs + DMA_COUNT); 1833 } 1834 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR); 1835 1836 /* Tell ESP to "go". */ 1837 esp_cmd(esp, the_esp_command); 1838 } 1839} 1840 1841/* Queue a SCSI command delivered from the mid-level Linux SCSI code. */ 1842static int esp_queue(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) 1843{ 1844 struct esp *esp; 1845 1846 /* Set up func ptr and initial driver cmd-phase. */ 1847 SCpnt->scsi_done = done; 1848 SCpnt->SCp.phase = not_issued; 1849 1850 /* We use the scratch area. */ 1851 ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->device->id, SCpnt->device->lun)); 1852 ESPDISC(("N<%02x,%02x>", SCpnt->device->id, SCpnt->device->lun)); 1853 1854 esp = (struct esp *) SCpnt->device->host->hostdata; 1855 esp_get_dmabufs(esp, SCpnt); 1856 esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */ 1857 1858 SCpnt->SCp.Status = CHECK_CONDITION; 1859 SCpnt->SCp.Message = 0xff; 1860 SCpnt->SCp.sent_command = 0; 1861 1862 /* Place into our queue. */ 1863 if (SCpnt->cmnd[0] == REQUEST_SENSE) { 1864 ESPQUEUE(("RQSENSE\n")); 1865 prepend_SC(&esp->issue_SC, SCpnt); 1866 } else { 1867 ESPQUEUE(("\n")); 1868 append_SC(&esp->issue_SC, SCpnt); 1869 } 1870 1871 /* Run it now if we can. */ 1872 if (!esp->current_SC && !esp->resetting_bus) 1873 esp_exec_cmd(esp); 1874 1875 return 0; 1876} 1877 1878/* Dump driver state. */ 1879static void esp_dump_cmd(struct scsi_cmnd *SCptr) 1880{ 1881 ESPLOG(("[tgt<%02x> lun<%02x> " 1882 "pphase<%s> cphase<%s>]", 1883 SCptr->device->id, SCptr->device->lun, 1884 phase_string(SCptr->SCp.sent_command), 1885 phase_string(SCptr->SCp.phase))); 1886} 1887 1888static void esp_dump_state(struct esp *esp) 1889{ 1890 struct scsi_cmnd *SCptr = esp->current_SC; 1891#ifdef DEBUG_ESP_CMDS 1892 int i; 1893#endif 1894 1895 ESPLOG(("esp%d: dumping state\n", esp->esp_id)); 1896 ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n", 1897 esp->esp_id, 1898 sbus_readl(esp->dregs + DMA_CSR), 1899 sbus_readl(esp->dregs + DMA_ADDR))); 1900 ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n", 1901 esp->esp_id, esp->sreg, esp->seqreg, esp->ireg)); 1902 ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n", 1903 esp->esp_id, 1904 sbus_readb(esp->eregs + ESP_STATUS), 1905 sbus_readb(esp->eregs + ESP_SSTEP), 1906 sbus_readb(esp->eregs + ESP_INTRPT))); 1907#ifdef DEBUG_ESP_CMDS 1908 printk("esp%d: last ESP cmds [", esp->esp_id); 1909 i = (esp->espcmdent - 1) & 31; 1910 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">"); 1911 i = (i - 1) & 31; 1912 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">"); 1913 i = (i - 1) & 31; 1914 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">"); 1915 i = (i - 1) & 31; 1916 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">"); 1917 printk("]\n"); 1918#endif /* (DEBUG_ESP_CMDS) */ 1919 1920 if (SCptr) { 1921 ESPLOG(("esp%d: current command ", esp->esp_id)); 1922 esp_dump_cmd(SCptr); 1923 } 1924 ESPLOG(("\n")); 1925 SCptr = esp->disconnected_SC; 1926 ESPLOG(("esp%d: disconnected ", esp->esp_id)); 1927 while (SCptr) { 1928 esp_dump_cmd(SCptr); 1929 SCptr = (struct scsi_cmnd *) SCptr->host_scribble; 1930 } 1931 ESPLOG(("\n")); 1932} 1933 1934/* Abort a command. The host_lock is acquired by caller. */ 1935static int esp_abort(struct scsi_cmnd *SCptr) 1936{ 1937 struct esp *esp = (struct esp *) SCptr->device->host->hostdata; 1938 int don; 1939 1940 ESPLOG(("esp%d: Aborting command\n", esp->esp_id)); 1941 esp_dump_state(esp); 1942 1943 /* Wheee, if this is the current command on the bus, the 1944 * best we can do is assert ATN and wait for msgout phase. 1945 * This should even fix a hung SCSI bus when we lose state 1946 * in the driver and timeout because the eventual phase change 1947 * will cause the ESP to (eventually) give an interrupt. 1948 */ 1949 if (esp->current_SC == SCptr) { 1950 esp->cur_msgout[0] = ABORT; 1951 esp->msgout_len = 1; 1952 esp->msgout_ctr = 0; 1953 esp_cmd(esp, ESP_CMD_SATN); 1954 return SUCCESS; 1955 } 1956 1957 /* If it is still in the issue queue then we can safely 1958 * call the completion routine and report abort success. 1959 */ 1960 don = (sbus_readl(esp->dregs + DMA_CSR) & DMA_INT_ENAB); 1961 if (don) { 1962 ESP_INTSOFF(esp->dregs); 1963 } 1964 if (esp->issue_SC) { 1965 struct scsi_cmnd **prev, *this; 1966 for (prev = (&esp->issue_SC), this = esp->issue_SC; 1967 this != NULL; 1968 prev = (struct scsi_cmnd **) &(this->host_scribble), 1969 this = (struct scsi_cmnd *) this->host_scribble) { 1970 1971 if (this == SCptr) { 1972 *prev = (struct scsi_cmnd *) this->host_scribble; 1973 this->host_scribble = NULL; 1974 1975 esp_release_dmabufs(esp, this); 1976 this->result = DID_ABORT << 16; 1977 this->scsi_done(this); 1978 1979 if (don) 1980 ESP_INTSON(esp->dregs); 1981 1982 return SUCCESS; 1983 } 1984 } 1985 } 1986 1987 /* Yuck, the command to abort is disconnected, it is not 1988 * worth trying to abort it now if something else is live 1989 * on the bus at this time. So, we let the SCSI code wait 1990 * a little bit and try again later. 1991 */ 1992 if (esp->current_SC) { 1993 if (don) 1994 ESP_INTSON(esp->dregs); 1995 return FAILED; 1996 } 1997 1998 /* It's disconnected, we have to reconnect to re-establish 1999 * the nexus and tell the device to abort. However, we really 2000 * cannot 'reconnect' per se. Don't try to be fancy, just 2001 * indicate failure, which causes our caller to reset the whole 2002 * bus. 2003 */ 2004 2005 if (don) 2006 ESP_INTSON(esp->dregs); 2007 2008 return FAILED; 2009} 2010 2011/* We've sent ESP_CMD_RS to the ESP, the interrupt had just 2012 * arrived indicating the end of the SCSI bus reset. Our job 2013 * is to clean out the command queues and begin re-execution 2014 * of SCSI commands once more. 2015 */ 2016static int esp_finish_reset(struct esp *esp) 2017{ 2018 struct scsi_cmnd *sp = esp->current_SC; 2019 2020 /* Clean up currently executing command, if any. */ 2021 if (sp != NULL) { 2022 esp->current_SC = NULL; 2023 2024 esp_release_dmabufs(esp, sp); 2025 sp->result = (DID_RESET << 16); 2026 2027 sp->scsi_done(sp); 2028 } 2029 2030 /* Clean up disconnected queue, they have been invalidated 2031 * by the bus reset. 2032 */ 2033 if (esp->disconnected_SC) { 2034 while ((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) { 2035 esp_release_dmabufs(esp, sp); 2036 sp->result = (DID_RESET << 16); 2037 2038 sp->scsi_done(sp); 2039 } 2040 } 2041 2042 /* SCSI bus reset is complete. */ 2043 esp->resetting_bus = 0; 2044 wake_up(&esp->reset_queue); 2045 2046 /* Ok, now it is safe to get commands going once more. */ 2047 if (esp->issue_SC) 2048 esp_exec_cmd(esp); 2049 2050 return do_intr_end; 2051} 2052 2053static int esp_do_resetbus(struct esp *esp) 2054{ 2055 ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id)); 2056 esp->resetting_bus = 1; 2057 esp_cmd(esp, ESP_CMD_RS); 2058 2059 return do_intr_end; 2060} 2061 2062/* Reset ESP chip, reset hanging bus, then kill active and 2063 * disconnected commands for targets without soft reset. 2064 * 2065 * The host_lock is acquired by caller. 2066 */ 2067static int esp_reset(struct scsi_cmnd *SCptr) 2068{ 2069 struct esp *esp = (struct esp *) SCptr->device->host->hostdata; 2070 2071 spin_lock_irq(esp->ehost->host_lock); 2072 (void) esp_do_resetbus(esp); 2073 spin_unlock_irq(esp->ehost->host_lock); 2074 2075 wait_event(esp->reset_queue, (esp->resetting_bus == 0)); 2076 2077 return SUCCESS; 2078} 2079 2080/* Internal ESP done function. */ 2081static void esp_done(struct esp *esp, int error) 2082{ 2083 struct scsi_cmnd *done_SC = esp->current_SC; 2084 2085 esp->current_SC = NULL; 2086 2087 esp_release_dmabufs(esp, done_SC); 2088 done_SC->result = error; 2089 2090 done_SC->scsi_done(done_SC); 2091 2092 /* Bus is free, issue any commands in the queue. */ 2093 if (esp->issue_SC && !esp->current_SC) 2094 esp_exec_cmd(esp); 2095 2096} 2097 2098/* Wheee, ESP interrupt engine. */ 2099 2100/* Forward declarations. */ 2101static int esp_do_phase_determine(struct esp *esp); 2102static int esp_do_data_finale(struct esp *esp); 2103static int esp_select_complete(struct esp *esp); 2104static int esp_do_status(struct esp *esp); 2105static int esp_do_msgin(struct esp *esp); 2106static int esp_do_msgindone(struct esp *esp); 2107static int esp_do_msgout(struct esp *esp); 2108static int esp_do_cmdbegin(struct esp *esp); 2109 2110#define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP) 2111#define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP) 2112 2113/* Read any bytes found in the FAS366 fifo, storing them into 2114 * the ESP driver software state structure. 2115 */ 2116static void hme_fifo_read(struct esp *esp) 2117{ 2118 u8 count = 0; 2119 u8 status = esp->sreg; 2120 2121 /* Cannot safely frob the fifo for these following cases, but 2122 * we must always read the fifo when the reselect interrupt 2123 * is pending. 2124 */ 2125 if (((esp->ireg & ESP_INTR_RSEL) == 0) && 2126 (sreg_datainp(status) || 2127 sreg_dataoutp(status) || 2128 (esp->current_SC && 2129 esp->current_SC->SCp.phase == in_data_done))) { 2130 ESPHME(("<wkaround_skipped>")); 2131 } else { 2132 unsigned long fcnt = sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES; 2133 2134 /* The HME stores bytes in multiples of 2 in the fifo. */ 2135 ESPHME(("hme_fifo[fcnt=%d", (int)fcnt)); 2136 while (fcnt) { 2137 esp->hme_fifo_workaround_buffer[count++] = 2138 sbus_readb(esp->eregs + ESP_FDATA); 2139 esp->hme_fifo_workaround_buffer[count++] = 2140 sbus_readb(esp->eregs + ESP_FDATA); 2141 ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1])); 2142 fcnt--; 2143 } 2144 if (sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_F1BYTE) { 2145 ESPHME(("<poke_byte>")); 2146 sbus_writeb(0, esp->eregs + ESP_FDATA); 2147 esp->hme_fifo_workaround_buffer[count++] = 2148 sbus_readb(esp->eregs + ESP_FDATA); 2149 ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1])); 2150 ESPHME(("CMD_FLUSH")); 2151 esp_cmd(esp, ESP_CMD_FLUSH); 2152 } else { 2153 ESPHME(("no_xtra_byte")); 2154 } 2155 } 2156 ESPHME(("wkarnd_cnt=%d]", (int)count)); 2157 esp->hme_fifo_workaround_count = count; 2158} 2159 2160static inline void hme_fifo_push(struct esp *esp, u8 *bytes, u8 count) 2161{ 2162 esp_cmd(esp, ESP_CMD_FLUSH); 2163 while (count) { 2164 u8 tmp = *bytes++; 2165 sbus_writeb(tmp, esp->eregs + ESP_FDATA); 2166 sbus_writeb(0, esp->eregs + ESP_FDATA); 2167 count--; 2168 } 2169} 2170 2171/* We try to avoid some interrupts by jumping ahead and see if the ESP 2172 * has gotten far enough yet. Hence the following. 2173 */ 2174static inline int skipahead1(struct esp *esp, struct scsi_cmnd *scp, 2175 int prev_phase, int new_phase) 2176{ 2177 if (scp->SCp.sent_command != prev_phase) 2178 return 0; 2179 if (ESP_IRQ_P(esp->dregs)) { 2180 /* Yes, we are able to save an interrupt. */ 2181 if (esp->erev == fashme) 2182 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2); 2183 esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR)); 2184 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); 2185 if (esp->erev == fashme) { 2186 /* This chip is really losing. */ 2187 ESPHME(("HME[")); 2188 /* Must latch fifo before reading the interrupt 2189 * register else garbage ends up in the FIFO 2190 * which confuses the driver utterly. 2191 * Happy Meal indeed.... 2192 */ 2193 ESPHME(("fifo_workaround]")); 2194 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) || 2195 (esp->sreg2 & ESP_STAT2_F1BYTE)) 2196 hme_fifo_read(esp); 2197 } 2198 if (!(esp->ireg & ESP_INTR_SR)) 2199 return 0; 2200 else 2201 return do_reset_complete; 2202 } 2203 /* Ho hum, target is taking forever... */ 2204 scp->SCp.sent_command = new_phase; /* so we don't recurse... */ 2205 return do_intr_end; 2206} 2207 2208static inline int skipahead2(struct esp *esp, struct scsi_cmnd *scp, 2209 int prev_phase1, int prev_phase2, int new_phase) 2210{ 2211 if (scp->SCp.sent_command != prev_phase1 && 2212 scp->SCp.sent_command != prev_phase2) 2213 return 0; 2214 if (ESP_IRQ_P(esp->dregs)) { 2215 /* Yes, we are able to save an interrupt. */ 2216 if (esp->erev == fashme) 2217 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2); 2218 esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR)); 2219 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); 2220 if (esp->erev == fashme) { 2221 /* This chip is really losing. */ 2222 ESPHME(("HME[")); 2223 2224 /* Must latch fifo before reading the interrupt 2225 * register else garbage ends up in the FIFO 2226 * which confuses the driver utterly. 2227 * Happy Meal indeed.... 2228 */ 2229 ESPHME(("fifo_workaround]")); 2230 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) || 2231 (esp->sreg2 & ESP_STAT2_F1BYTE)) 2232 hme_fifo_read(esp); 2233 } 2234 if (!(esp->ireg & ESP_INTR_SR)) 2235 return 0; 2236 else 2237 return do_reset_complete; 2238 } 2239 /* Ho hum, target is taking forever... */ 2240 scp->SCp.sent_command = new_phase; /* so we don't recurse... */ 2241 return do_intr_end; 2242} 2243 2244/* Now some dma helpers. */ 2245static void dma_setup(struct esp *esp, __u32 addr, int count, int write) 2246{ 2247 u32 nreg = sbus_readl(esp->dregs + DMA_CSR); 2248 2249 if (write) 2250 nreg |= DMA_ST_WRITE; 2251 else 2252 nreg &= ~(DMA_ST_WRITE); 2253 nreg |= DMA_ENABLE; 2254 sbus_writel(nreg, esp->dregs + DMA_CSR); 2255 if (esp->dma->revision == dvmaesc1) { 2256 /* This ESC gate array sucks! */ 2257 __u32 src = addr; 2258 __u32 dest = src + count; 2259 2260 if (dest & (PAGE_SIZE - 1)) 2261 count = PAGE_ALIGN(count); 2262 sbus_writel(count, esp->dregs + DMA_COUNT); 2263 } 2264 sbus_writel(addr, esp->dregs + DMA_ADDR); 2265} 2266 2267static void dma_drain(struct esp *esp) 2268{ 2269 u32 tmp; 2270 2271 if (esp->dma->revision == dvmahme) 2272 return; 2273 if ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_FIFO_ISDRAIN) { 2274 switch (esp->dma->revision) { 2275 default: 2276 tmp |= DMA_FIFO_STDRAIN; 2277 sbus_writel(tmp, esp->dregs + DMA_CSR); 2278 2279 case dvmarev3: 2280 case dvmaesc1: 2281 while (sbus_readl(esp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) 2282 udelay(1); 2283 }; 2284 } 2285} 2286 2287static void dma_invalidate(struct esp *esp) 2288{ 2289 u32 tmp; 2290 2291 if (esp->dma->revision == dvmahme) { 2292 sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR); 2293 2294 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr | 2295 (DMA_PARITY_OFF | DMA_2CLKS | 2296 DMA_SCSI_DISAB | DMA_INT_ENAB)) & 2297 ~(DMA_ST_WRITE | DMA_ENABLE)); 2298 2299 sbus_writel(0, esp->dregs + DMA_CSR); 2300 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR); 2301 2302 /* This is necessary to avoid having the SCSI channel 2303 * engine lock up on us. 2304 */ 2305 sbus_writel(0, esp->dregs + DMA_ADDR); 2306 } else { 2307 while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ) 2308 udelay(1); 2309 2310 tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB); 2311 tmp |= DMA_FIFO_INV; 2312 sbus_writel(tmp, esp->dregs + DMA_CSR); 2313 tmp &= ~DMA_FIFO_INV; 2314 sbus_writel(tmp, esp->dregs + DMA_CSR); 2315 } 2316} 2317 2318static inline void dma_flashclear(struct esp *esp) 2319{ 2320 dma_drain(esp); 2321 dma_invalidate(esp); 2322} 2323 2324static int dma_can_transfer(struct esp *esp, struct scsi_cmnd *sp) 2325{ 2326 __u32 base, end, sz; 2327 2328 if (esp->dma->revision == dvmarev3) { 2329 sz = sp->SCp.this_residual; 2330 if (sz > 0x1000000) 2331 sz = 0x1000000; 2332 } else { 2333 base = ((__u32)((unsigned long)sp->SCp.ptr)); 2334 base &= (0x1000000 - 1); 2335 end = (base + sp->SCp.this_residual); 2336 if (end > 0x1000000) 2337 end = 0x1000000; 2338 sz = (end - base); 2339 } 2340 return sz; 2341} 2342 2343/* Misc. esp helper macros. */ 2344#define esp_setcount(__eregs, __cnt, __hme) \ 2345 sbus_writeb(((__cnt)&0xff), (__eregs) + ESP_TCLOW); \ 2346 sbus_writeb((((__cnt)>>8)&0xff), (__eregs) + ESP_TCMED); \ 2347 if (__hme) { \ 2348 sbus_writeb((((__cnt)>>16)&0xff), (__eregs) + FAS_RLO); \ 2349 sbus_writeb(0, (__eregs) + FAS_RHI); \ 2350 } 2351 2352#define esp_getcount(__eregs, __hme) \ 2353 ((sbus_readb((__eregs) + ESP_TCLOW)&0xff) | \ 2354 ((sbus_readb((__eregs) + ESP_TCMED)&0xff) << 8) | \ 2355 ((__hme) ? sbus_readb((__eregs) + FAS_RLO) << 16 : 0)) 2356 2357#define fcount(__esp) \ 2358 (((__esp)->erev == fashme) ? \ 2359 (__esp)->hme_fifo_workaround_count : \ 2360 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_FBYTES) 2361 2362#define fnzero(__esp) \ 2363 (((__esp)->erev == fashme) ? 0 : \ 2364 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_ONOTZERO) 2365 2366/* XXX speculative nops unnecessary when continuing amidst a data phase 2367 * XXX even on esp100!!! another case of flooding the bus with I/O reg 2368 * XXX writes... 2369 */ 2370#define esp_maybe_nop(__esp) \ 2371 if ((__esp)->erev == esp100) \ 2372 esp_cmd((__esp), ESP_CMD_NULL) 2373 2374#define sreg_to_dataphase(__sreg) \ 2375 ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain) 2376 2377/* The ESP100 when in synchronous data phase, can mistake a long final 2378 * REQ pulse from the target as an extra byte, it places whatever is on 2379 * the data lines into the fifo. For now, we will assume when this 2380 * happens that the target is a bit quirky and we don't want to 2381 * be talking synchronously to it anyways. Regardless, we need to 2382 * tell the ESP to eat the extraneous byte so that we can proceed 2383 * to the next phase. 2384 */ 2385static int esp100_sync_hwbug(struct esp *esp, struct scsi_cmnd *sp, int fifocnt) 2386{ 2387 /* Do not touch this piece of code. */ 2388 if ((!(esp->erev == esp100)) || 2389 (!(sreg_datainp((esp->sreg = sbus_readb(esp->eregs + ESP_STATUS))) && 2390 !fifocnt) && 2391 !(sreg_dataoutp(esp->sreg) && !fnzero(esp)))) { 2392 if (sp->SCp.phase == in_dataout) 2393 esp_cmd(esp, ESP_CMD_FLUSH); 2394 return 0; 2395 } else { 2396 /* Async mode for this guy. */ 2397 build_sync_nego_msg(esp, 0, 0); 2398 2399 /* Ack the bogus byte, but set ATN first. */ 2400 esp_cmd(esp, ESP_CMD_SATN); 2401 esp_cmd(esp, ESP_CMD_MOK); 2402 return 1; 2403 } 2404} 2405 2406/* This closes the window during a selection with a reselect pending, because 2407 * we use DMA for the selection process the FIFO should hold the correct 2408 * contents if we get reselected during this process. So we just need to 2409 * ack the possible illegal cmd interrupt pending on the esp100. 2410 */ 2411static inline int esp100_reconnect_hwbug(struct esp *esp) 2412{ 2413 u8 tmp; 2414 2415 if (esp->erev != esp100) 2416 return 0; 2417 tmp = sbus_readb(esp->eregs + ESP_INTRPT); 2418 if (tmp & ESP_INTR_SR) 2419 return 1; 2420 return 0; 2421} 2422 2423/* This verifies the BUSID bits during a reselection so that we know which 2424 * target is talking to us. 2425 */ 2426static inline int reconnect_target(struct esp *esp) 2427{ 2428 int it, me = esp->scsi_id_mask, targ = 0; 2429 2430 if (2 != fcount(esp)) 2431 return -1; 2432 if (esp->erev == fashme) { 2433 /* HME does not latch it's own BUS ID bits during 2434 * a reselection. Also the target number is given 2435 * as an unsigned char, not as a sole bit number 2436 * like the other ESP's do. 2437 * Happy Meal indeed.... 2438 */ 2439 targ = esp->hme_fifo_workaround_buffer[0]; 2440 } else { 2441 it = sbus_readb(esp->eregs + ESP_FDATA); 2442 if (!(it & me)) 2443 return -1; 2444 it &= ~me; 2445 if (it & (it - 1)) 2446 return -1; 2447 while (!(it & 1)) 2448 targ++, it >>= 1; 2449 } 2450 return targ; 2451} 2452 2453/* This verifies the identify from the target so that we know which lun is 2454 * being reconnected. 2455 */ 2456static inline int reconnect_lun(struct esp *esp) 2457{ 2458 int lun; 2459 2460 if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) 2461 return -1; 2462 if (esp->erev == fashme) 2463 lun = esp->hme_fifo_workaround_buffer[1]; 2464 else 2465 lun = sbus_readb(esp->eregs + ESP_FDATA); 2466 2467 /* Yes, you read this correctly. We report lun of zero 2468 * if we see parity error. ESP reports parity error for 2469 * the lun byte, and this is the only way to hope to recover 2470 * because the target is connected. 2471 */ 2472 if (esp->sreg & ESP_STAT_PERR) 2473 return 0; 2474 2475 /* Check for illegal bits being set in the lun. */ 2476 if ((lun & 0x40) || !(lun & 0x80)) 2477 return -1; 2478 2479 return lun & 7; 2480} 2481 2482/* This puts the driver in a state where it can revitalize a command that 2483 * is being continued due to reselection. 2484 */ 2485static inline void esp_connect(struct esp *esp, struct scsi_cmnd *sp) 2486{ 2487 struct esp_device *esp_dev = sp->device->hostdata; 2488 2489 if (esp->prev_soff != esp_dev->sync_max_offset || 2490 esp->prev_stp != esp_dev->sync_min_period || 2491 (esp->erev > esp100a && 2492 esp->prev_cfg3 != esp->config3[sp->device->id])) { 2493 esp->prev_soff = esp_dev->sync_max_offset; 2494 esp->prev_stp = esp_dev->sync_min_period; 2495 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 2496 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 2497 if (esp->erev > esp100a) { 2498 esp->prev_cfg3 = esp->config3[sp->device->id]; 2499 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 2500 } 2501 } 2502 esp->current_SC = sp; 2503} 2504 2505/* This will place the current working command back into the issue queue 2506 * if we are to receive a reselection amidst a selection attempt. 2507 */ 2508static inline void esp_reconnect(struct esp *esp, struct scsi_cmnd *sp) 2509{ 2510 if (!esp->disconnected_SC) 2511 ESPLOG(("esp%d: Weird, being reselected but disconnected " 2512 "command queue is empty.\n", esp->esp_id)); 2513 esp->snip = 0; 2514 esp->current_SC = NULL; 2515 sp->SCp.phase = not_issued; 2516 append_SC(&esp->issue_SC, sp); 2517} 2518 2519/* Begin message in phase. */ 2520static int esp_do_msgin(struct esp *esp) 2521{ 2522 /* Must be very careful with the fifo on the HME */ 2523 if ((esp->erev != fashme) || 2524 !(sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_FEMPTY)) 2525 esp_cmd(esp, ESP_CMD_FLUSH); 2526 esp_maybe_nop(esp); 2527 esp_cmd(esp, ESP_CMD_TI); 2528 esp->msgin_len = 1; 2529 esp->msgin_ctr = 0; 2530 esp_advance_phase(esp->current_SC, in_msgindone); 2531 return do_work_bus; 2532} 2533 2534/* This uses various DMA csr fields and the fifo flags count value to 2535 * determine how many bytes were successfully sent/received by the ESP. 2536 */ 2537static inline int esp_bytes_sent(struct esp *esp, int fifo_count) 2538{ 2539 int rval = sbus_readl(esp->dregs + DMA_ADDR) - esp->esp_command_dvma; 2540 2541 if (esp->dma->revision == dvmarev1) 2542 rval -= (4 - ((sbus_readl(esp->dregs + DMA_CSR) & DMA_READ_AHEAD)>>11)); 2543 return rval - fifo_count; 2544} 2545 2546static inline void advance_sg(struct scsi_cmnd *sp) 2547{ 2548 ++sp->SCp.buffer; 2549 --sp->SCp.buffers_residual; 2550 sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer); 2551 sp->SCp.ptr = (char *)((unsigned long)sg_dma_address(sp->SCp.buffer)); 2552} 2553 2554/* Please note that the way I've coded these routines is that I _always_ 2555 * check for a disconnect during any and all information transfer 2556 * phases. The SCSI standard states that the target _can_ cause a BUS 2557 * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note 2558 * that during information transfer phases the target controls every 2559 * change in phase, the only thing the initiator can do is "ask" for 2560 * a message out phase by driving ATN true. The target can, and sometimes 2561 * will, completely ignore this request so we cannot assume anything when 2562 * we try to force a message out phase to abort/reset a target. Most of 2563 * the time the target will eventually be nice and go to message out, so 2564 * we may have to hold on to our state about what we want to tell the target 2565 * for some period of time. 2566 */ 2567 2568/* I think I have things working here correctly. Even partial transfers 2569 * within a buffer or sub-buffer should not upset us at all no matter 2570 * how bad the target and/or ESP fucks things up. 2571 */ 2572static int esp_do_data(struct esp *esp) 2573{ 2574 struct scsi_cmnd *SCptr = esp->current_SC; 2575 int thisphase, hmuch; 2576 2577 ESPDATA(("esp_do_data: ")); 2578 esp_maybe_nop(esp); 2579 thisphase = sreg_to_dataphase(esp->sreg); 2580 esp_advance_phase(SCptr, thisphase); 2581 ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT")); 2582 hmuch = dma_can_transfer(esp, SCptr); 2583 if (hmuch > (64 * 1024) && (esp->erev != fashme)) 2584 hmuch = (64 * 1024); 2585 ESPDATA(("hmuch<%d> ", hmuch)); 2586 esp->current_transfer_size = hmuch; 2587 2588 if (esp->erev == fashme) { 2589 u32 tmp = esp->prev_hme_dmacsr; 2590 2591 /* Always set the ESP count registers first. */ 2592 esp_setcount(esp->eregs, hmuch, 1); 2593 2594 /* Get the DMA csr computed. */ 2595 tmp |= (DMA_SCSI_DISAB | DMA_ENABLE); 2596 if (thisphase == in_datain) 2597 tmp |= DMA_ST_WRITE; 2598 else 2599 tmp &= ~(DMA_ST_WRITE); 2600 esp->prev_hme_dmacsr = tmp; 2601 2602 ESPDATA(("DMA|TI --> do_intr_end\n")); 2603 if (thisphase == in_datain) { 2604 sbus_writel(hmuch, esp->dregs + DMA_COUNT); 2605 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 2606 } else { 2607 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 2608 sbus_writel(hmuch, esp->dregs + DMA_COUNT); 2609 } 2610 sbus_writel((__u32)((unsigned long)SCptr->SCp.ptr), esp->dregs+DMA_ADDR); 2611 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR); 2612 } else { 2613 esp_setcount(esp->eregs, hmuch, 0); 2614 dma_setup(esp, ((__u32)((unsigned long)SCptr->SCp.ptr)), 2615 hmuch, (thisphase == in_datain)); 2616 ESPDATA(("DMA|TI --> do_intr_end\n")); 2617 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 2618 } 2619 return do_intr_end; 2620} 2621 2622/* See how successful the data transfer was. */ 2623static int esp_do_data_finale(struct esp *esp) 2624{ 2625 struct scsi_cmnd *SCptr = esp->current_SC; 2626 struct esp_device *esp_dev = SCptr->device->hostdata; 2627 int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0; 2628 2629 ESPDATA(("esp_do_data_finale: ")); 2630 2631 if (SCptr->SCp.phase == in_datain) { 2632 if (esp->sreg & ESP_STAT_PERR) { 2633 /* Yuck, parity error. The ESP asserts ATN 2634 * so that we can go to message out phase 2635 * immediately and inform the target that 2636 * something bad happened. 2637 */ 2638 ESPLOG(("esp%d: data bad parity detected.\n", 2639 esp->esp_id)); 2640 esp->cur_msgout[0] = INITIATOR_ERROR; 2641 esp->msgout_len = 1; 2642 } 2643 dma_drain(esp); 2644 } 2645 dma_invalidate(esp); 2646 2647 /* This could happen for the above parity error case. */ 2648 if (esp->ireg != ESP_INTR_BSERV) { 2649 /* Please go to msgout phase, please please please... */ 2650 ESPLOG(("esp%d: !BSERV after data, probably to msgout\n", 2651 esp->esp_id)); 2652 return esp_do_phase_determine(esp); 2653 } 2654 2655 /* Check for partial transfers and other horrible events. 2656 * Note, here we read the real fifo flags register even 2657 * on HME broken adapters because we skip the HME fifo 2658 * workaround code in esp_handle() if we are doing data 2659 * phase things. We don't want to fuck directly with 2660 * the fifo like that, especially if doing synchronous 2661 * transfers! Also, will need to double the count on 2662 * HME if we are doing wide transfers, as the HME fifo 2663 * will move and count 16-bit quantities during wide data. 2664 * SMCC _and_ Qlogic can both bite me. 2665 */ 2666 fifocnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES); 2667 if (esp->erev != fashme) 2668 ecount = esp_getcount(esp->eregs, 0); 2669 bytes_sent = esp->current_transfer_size; 2670 2671 ESPDATA(("trans_sz(%d), ", bytes_sent)); 2672 if (esp->erev == fashme) { 2673 if (!(esp->sreg & ESP_STAT_TCNT)) { 2674 ecount = esp_getcount(esp->eregs, 1); 2675 bytes_sent -= ecount; 2676 } 2677 2678 /* Always subtract any cruft remaining in the FIFO. */ 2679 if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE) 2680 fifocnt <<= 1; 2681 if (SCptr->SCp.phase == in_dataout) 2682 bytes_sent -= fifocnt; 2683 2684 /* I have an IBM disk which exhibits the following 2685 * behavior during writes to it. It disconnects in 2686 * the middle of a partial transfer, the current sglist 2687 * buffer is 1024 bytes, the disk stops data transfer 2688 * at 512 bytes. 2689 * 2690 * However the FAS366 reports that 32 more bytes were 2691 * transferred than really were. This is precisely 2692 * the size of a fully loaded FIFO in wide scsi mode. 2693 * The FIFO state recorded indicates that it is empty. 2694 * 2695 * I have no idea if this is a bug in the FAS366 chip 2696 * or a bug in the firmware on this IBM disk. In any 2697 * event the following seems to be a good workaround. -DaveM 2698 */ 2699 if (bytes_sent != esp->current_transfer_size && 2700 SCptr->SCp.phase == in_dataout) { 2701 int mask = (64 - 1); 2702 2703 if ((esp->prev_cfg3 & ESP_CONFIG3_EWIDE) == 0) 2704 mask >>= 1; 2705 2706 if (bytes_sent & mask) 2707 bytes_sent -= (bytes_sent & mask); 2708 } 2709 } else { 2710 if (!(esp->sreg & ESP_STAT_TCNT)) 2711 bytes_sent -= ecount; 2712 if (SCptr->SCp.phase == in_dataout) 2713 bytes_sent -= fifocnt; 2714 } 2715 2716 ESPDATA(("bytes_sent(%d), ", bytes_sent)); 2717 2718 /* If we were in synchronous mode, check for peculiarities. */ 2719 if (esp->erev == fashme) { 2720 if (esp_dev->sync_max_offset) { 2721 if (SCptr->SCp.phase == in_dataout) 2722 esp_cmd(esp, ESP_CMD_FLUSH); 2723 } else { 2724 esp_cmd(esp, ESP_CMD_FLUSH); 2725 } 2726 } else { 2727 if (esp_dev->sync_max_offset) 2728 bogus_data = esp100_sync_hwbug(esp, SCptr, fifocnt); 2729 else 2730 esp_cmd(esp, ESP_CMD_FLUSH); 2731 } 2732 2733 /* Until we are sure of what has happened, we are certainly 2734 * in the dark. 2735 */ 2736 esp_advance_phase(SCptr, in_the_dark); 2737 2738 if (bytes_sent < 0) { 2739 /* I've seen this happen due to lost state in this 2740 * driver. No idea why it happened, but allowing 2741 * this value to be negative caused things to 2742 * lock up. This allows greater chance of recovery. 2743 * In fact every time I've seen this, it has been 2744 * a driver bug without question. 2745 */ 2746 ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id)); 2747 ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n", 2748 esp->esp_id, 2749 esp->current_transfer_size, fifocnt, ecount)); 2750 ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n", 2751 esp->esp_id, 2752 SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual)); 2753 ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id, 2754 SCptr->device->id)); 2755 SCptr->device->borken = 1; 2756 esp_dev->sync = 0; 2757 bytes_sent = 0; 2758 } 2759 2760 /* Update the state of our transfer. */ 2761 SCptr->SCp.ptr += bytes_sent; 2762 SCptr->SCp.this_residual -= bytes_sent; 2763 if (SCptr->SCp.this_residual < 0) { 2764 /* shit */ 2765 ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id)); 2766 SCptr->SCp.this_residual = 0; 2767 } 2768 2769 /* Maybe continue. */ 2770 if (!bogus_data) { 2771 ESPDATA(("!bogus_data, ")); 2772 2773 /* NO MATTER WHAT, we advance the scatterlist, 2774 * if the target should decide to disconnect 2775 * in between scatter chunks (which is common) 2776 * we could die horribly! I used to have the sg 2777 * advance occur only if we are going back into 2778 * (or are staying in) a data phase, you can 2779 * imagine the hell I went through trying to 2780 * figure this out. 2781 */ 2782 if (SCptr->use_sg && !SCptr->SCp.this_residual) 2783 advance_sg(SCptr); 2784 if (sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) { 2785 ESPDATA(("to more data\n")); 2786 return esp_do_data(esp); 2787 } 2788 ESPDATA(("to new phase\n")); 2789 return esp_do_phase_determine(esp); 2790 } 2791 /* Bogus data, just wait for next interrupt. */ 2792 ESPLOG(("esp%d: bogus_data during end of data phase\n", 2793 esp->esp_id)); 2794 return do_intr_end; 2795} 2796 2797/* We received a non-good status return at the end of 2798 * running a SCSI command. This is used to decide if 2799 * we should clear our synchronous transfer state for 2800 * such a device when that happens. 2801 * 2802 * The idea is that when spinning up a disk or rewinding 2803 * a tape, we don't want to go into a loop re-negotiating 2804 * synchronous capabilities over and over. 2805 */ 2806static int esp_should_clear_sync(struct scsi_cmnd *sp) 2807{ 2808 u8 cmd1 = sp->cmnd[0]; 2809 u8 cmd2 = sp->data_cmnd[0]; 2810 2811 /* These cases are for spinning up a disk and 2812 * waiting for that spinup to complete. 2813 */ 2814 if (cmd1 == START_STOP || 2815 cmd2 == START_STOP) 2816 return 0; 2817 2818 if (cmd1 == TEST_UNIT_READY || 2819 cmd2 == TEST_UNIT_READY) 2820 return 0; 2821 2822 /* One more special case for SCSI tape drives, 2823 * this is what is used to probe the device for 2824 * completion of a rewind or tape load operation. 2825 */ 2826 if (sp->device->type == TYPE_TAPE) { 2827 if (cmd1 == MODE_SENSE || 2828 cmd2 == MODE_SENSE) 2829 return 0; 2830 } 2831 2832 return 1; 2833} 2834 2835/* Either a command is completing or a target is dropping off the bus 2836 * to continue the command in the background so we can do other work. 2837 */ 2838static int esp_do_freebus(struct esp *esp) 2839{ 2840 struct scsi_cmnd *SCptr = esp->current_SC; 2841 struct esp_device *esp_dev = SCptr->device->hostdata; 2842 int rval; 2843 2844 rval = skipahead2(esp, SCptr, in_status, in_msgindone, in_freeing); 2845 if (rval) 2846 return rval; 2847 if (esp->ireg != ESP_INTR_DC) { 2848 ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id)); 2849 return do_reset_bus; /* target will not drop BSY... */ 2850 } 2851 esp->msgout_len = 0; 2852 esp->prevmsgout = NOP; 2853 if (esp->prevmsgin == COMMAND_COMPLETE) { 2854 /* Normal end of nexus. */ 2855 if (esp->disconnected_SC || (esp->erev == fashme)) 2856 esp_cmd(esp, ESP_CMD_ESEL); 2857 2858 if (SCptr->SCp.Status != GOOD && 2859 SCptr->SCp.Status != CONDITION_GOOD && 2860 ((1<<SCptr->device->id) & esp->targets_present) && 2861 esp_dev->sync && 2862 esp_dev->sync_max_offset) { 2863 /* SCSI standard says that the synchronous capabilities 2864 * should be renegotiated at this point. Most likely 2865 * we are about to request sense from this target 2866 * in which case we want to avoid using sync 2867 * transfers until we are sure of the current target 2868 * state. 2869 */ 2870 ESPMISC(("esp: Status <%d> for target %d lun %d\n", 2871 SCptr->SCp.Status, SCptr->device->id, SCptr->device->lun)); 2872 2873 /* But don't do this when spinning up a disk at 2874 * boot time while we poll for completion as it 2875 * fills up the console with messages. Also, tapes 2876 * can report not ready many times right after 2877 * loading up a tape. 2878 */ 2879 if (esp_should_clear_sync(SCptr) != 0) 2880 esp_dev->sync = 0; 2881 } 2882 ESPDISC(("F<%02x,%02x>", SCptr->device->id, SCptr->device->lun)); 2883 esp_done(esp, ((SCptr->SCp.Status & 0xff) | 2884 ((SCptr->SCp.Message & 0xff)<<8) | 2885 (DID_OK << 16))); 2886 } else if (esp->prevmsgin == DISCONNECT) { 2887 /* Normal disconnect. */ 2888 esp_cmd(esp, ESP_CMD_ESEL); 2889 ESPDISC(("D<%02x,%02x>", SCptr->device->id, SCptr->device->lun)); 2890 append_SC(&esp->disconnected_SC, SCptr); 2891 esp->current_SC = NULL; 2892 if (esp->issue_SC) 2893 esp_exec_cmd(esp); 2894 } else { 2895 /* Driver bug, we do not expect a disconnect here 2896 * and should not have advanced the state engine 2897 * to in_freeing. 2898 */ 2899 ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n", 2900 esp->esp_id)); 2901 return do_reset_bus; 2902 } 2903 return do_intr_end; 2904} 2905 2906/* When a reselect occurs, and we cannot find the command to 2907 * reconnect to in our queues, we do this. 2908 */ 2909static int esp_bad_reconnect(struct esp *esp) 2910{ 2911 struct scsi_cmnd *sp; 2912 2913 ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n", 2914 esp->esp_id)); 2915 ESPLOG(("QUEUE DUMP\n")); 2916 sp = esp->issue_SC; 2917 ESPLOG(("esp%d: issue_SC[", esp->esp_id)); 2918 while (sp) { 2919 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun)); 2920 sp = (struct scsi_cmnd *) sp->host_scribble; 2921 } 2922 ESPLOG(("]\n")); 2923 sp = esp->current_SC; 2924 ESPLOG(("esp%d: current_SC[", esp->esp_id)); 2925 if (sp) 2926 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun)); 2927 else 2928 ESPLOG(("<NULL>")); 2929 ESPLOG(("]\n")); 2930 sp = esp->disconnected_SC; 2931 ESPLOG(("esp%d: disconnected_SC[", esp->esp_id)); 2932 while (sp) { 2933 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun)); 2934 sp = (struct scsi_cmnd *) sp->host_scribble; 2935 } 2936 ESPLOG(("]\n")); 2937 return do_reset_bus; 2938} 2939 2940/* Do the needy when a target tries to reconnect to us. */ 2941static int esp_do_reconnect(struct esp *esp) 2942{ 2943 int lun, target; 2944 struct scsi_cmnd *SCptr; 2945 2946 /* Check for all bogus conditions first. */ 2947 target = reconnect_target(esp); 2948 if (target < 0) { 2949 ESPDISC(("bad bus bits\n")); 2950 return do_reset_bus; 2951 } 2952 lun = reconnect_lun(esp); 2953 if (lun < 0) { 2954 ESPDISC(("target=%2x, bad identify msg\n", target)); 2955 return do_reset_bus; 2956 } 2957 2958 /* Things look ok... */ 2959 ESPDISC(("R<%02x,%02x>", target, lun)); 2960 2961 /* Must not flush FIFO or DVMA on HME. */ 2962 if (esp->erev != fashme) { 2963 esp_cmd(esp, ESP_CMD_FLUSH); 2964 if (esp100_reconnect_hwbug(esp)) 2965 return do_reset_bus; 2966 esp_cmd(esp, ESP_CMD_NULL); 2967 } 2968 2969 SCptr = remove_SC(&esp->disconnected_SC, (u8) target, (u8) lun); 2970 if (!SCptr) 2971 return esp_bad_reconnect(esp); 2972 2973 esp_connect(esp, SCptr); 2974 esp_cmd(esp, ESP_CMD_MOK); 2975 2976 if (esp->erev == fashme) 2977 sbus_writeb(((SCptr->device->id & 0xf) | 2978 (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT)), 2979 esp->eregs + ESP_BUSID); 2980 2981 /* Reconnect implies a restore pointers operation. */ 2982 esp_restore_pointers(esp, SCptr); 2983 2984 esp->snip = 0; 2985 esp_advance_phase(SCptr, in_the_dark); 2986 return do_intr_end; 2987} 2988 2989/* End of NEXUS (hopefully), pick up status + message byte then leave if 2990 * all goes well. 2991 */ 2992static int esp_do_status(struct esp *esp) 2993{ 2994 struct scsi_cmnd *SCptr = esp->current_SC; 2995 int intr, rval; 2996 2997 rval = skipahead1(esp, SCptr, in_the_dark, in_status); 2998 if (rval) 2999 return rval; 3000 intr = esp->ireg; 3001 ESPSTAT(("esp_do_status: ")); 3002 if (intr != ESP_INTR_DC) { 3003 int message_out = 0; /* for parity problems */ 3004 3005 /* Ack the message. */ 3006 ESPSTAT(("ack msg, ")); 3007 esp_cmd(esp, ESP_CMD_MOK); 3008 3009 if (esp->erev != fashme) { 3010 dma_flashclear(esp); 3011 3012 /* Wait till the first bits settle. */ 3013 while (esp->esp_command[0] == 0xff) 3014 udelay(1); 3015 } else { 3016 esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0]; 3017 esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1]; 3018 } 3019 3020 ESPSTAT(("got something, ")); 3021 /* ESP chimes in with one of 3022 * 3023 * 1) function done interrupt: 3024 * both status and message in bytes 3025 * are available 3026 * 3027 * 2) bus service interrupt: 3028 * only status byte was acquired 3029 * 3030 * 3) Anything else: 3031 * can't happen, but we test for it 3032 * anyways 3033 * 3034 * ALSO: If bad parity was detected on either 3035 * the status _or_ the message byte then 3036 * the ESP has asserted ATN on the bus 3037 * and we must therefore wait for the 3038 * next phase change. 3039 */ 3040 if (intr & ESP_INTR_FDONE) { 3041 /* We got it all, hallejulia. */ 3042 ESPSTAT(("got both, ")); 3043 SCptr->SCp.Status = esp->esp_command[0]; 3044 SCptr->SCp.Message = esp->esp_command[1]; 3045 esp->prevmsgin = SCptr->SCp.Message; 3046 esp->cur_msgin[0] = SCptr->SCp.Message; 3047 if (esp->sreg & ESP_STAT_PERR) { 3048 /* There was bad parity for the 3049 * message byte, the status byte 3050 * was ok. 3051 */ 3052 message_out = MSG_PARITY_ERROR; 3053 } 3054 } else if (intr == ESP_INTR_BSERV) { 3055 /* Only got status byte. */ 3056 ESPLOG(("esp%d: got status only, ", esp->esp_id)); 3057 if (!(esp->sreg & ESP_STAT_PERR)) { 3058 SCptr->SCp.Status = esp->esp_command[0]; 3059 SCptr->SCp.Message = 0xff; 3060 } else { 3061 /* The status byte had bad parity. 3062 * we leave the scsi_pointer Status 3063 * field alone as we set it to a default 3064 * of CHECK_CONDITION in esp_queue. 3065 */ 3066 message_out = INITIATOR_ERROR; 3067 } 3068 } else { 3069 /* This shouldn't happen ever. */ 3070 ESPSTAT(("got bolixed\n")); 3071 esp_advance_phase(SCptr, in_the_dark); 3072 return esp_do_phase_determine(esp); 3073 } 3074 3075 if (!message_out) { 3076 ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status, 3077 SCptr->SCp.Message)); 3078 if (SCptr->SCp.Message == COMMAND_COMPLETE) { 3079 ESPSTAT(("and was COMMAND_COMPLETE\n")); 3080 esp_advance_phase(SCptr, in_freeing); 3081 return esp_do_freebus(esp); 3082 } else { 3083 ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n", 3084 esp->esp_id)); 3085 esp->msgin_len = esp->msgin_ctr = 1; 3086 esp_advance_phase(SCptr, in_msgindone); 3087 return esp_do_msgindone(esp); 3088 } 3089 } else { 3090 /* With luck we'll be able to let the target 3091 * know that bad parity happened, it will know 3092 * which byte caused the problems and send it 3093 * again. For the case where the status byte 3094 * receives bad parity, I do not believe most 3095 * targets recover very well. We'll see. 3096 */ 3097 ESPLOG(("esp%d: bad parity somewhere mout=%2x\n", 3098 esp->esp_id, message_out)); 3099 esp->cur_msgout[0] = message_out; 3100 esp->msgout_len = esp->msgout_ctr = 1; 3101 esp_advance_phase(SCptr, in_the_dark); 3102 return esp_do_phase_determine(esp); 3103 } 3104 } else { 3105 /* If we disconnect now, all hell breaks loose. */ 3106 ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id)); 3107 esp_advance_phase(SCptr, in_the_dark); 3108 return esp_do_phase_determine(esp); 3109 } 3110} 3111 3112static int esp_enter_status(struct esp *esp) 3113{ 3114 u8 thecmd = ESP_CMD_ICCSEQ; 3115 3116 esp_cmd(esp, ESP_CMD_FLUSH); 3117 if (esp->erev != fashme) { 3118 u32 tmp; 3119 3120 esp->esp_command[0] = esp->esp_command[1] = 0xff; 3121 sbus_writeb(2, esp->eregs + ESP_TCLOW); 3122 sbus_writeb(0, esp->eregs + ESP_TCMED); 3123 tmp = sbus_readl(esp->dregs + DMA_CSR); 3124 tmp |= (DMA_ST_WRITE | DMA_ENABLE); 3125 sbus_writel(tmp, esp->dregs + DMA_CSR); 3126 if (esp->dma->revision == dvmaesc1) 3127 sbus_writel(0x100, esp->dregs + DMA_COUNT); 3128 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR); 3129 thecmd |= ESP_CMD_DMA; 3130 } 3131 esp_cmd(esp, thecmd); 3132 esp_advance_phase(esp->current_SC, in_status); 3133 3134 return esp_do_status(esp); 3135} 3136 3137static int esp_disconnect_amidst_phases(struct esp *esp) 3138{ 3139 struct scsi_cmnd *sp = esp->current_SC; 3140 struct esp_device *esp_dev = sp->device->hostdata; 3141 3142 /* This means real problems if we see this 3143 * here. Unless we were actually trying 3144 * to force the device to abort/reset. 3145 */ 3146 ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id)); 3147 ESPLOG(("pphase<%s> cphase<%s>, ", 3148 phase_string(sp->SCp.phase), 3149 phase_string(sp->SCp.sent_command))); 3150 3151 if (esp->disconnected_SC != NULL || (esp->erev == fashme)) 3152 esp_cmd(esp, ESP_CMD_ESEL); 3153 3154 switch (esp->cur_msgout[0]) { 3155 default: 3156 /* We didn't expect this to happen at all. */ 3157 ESPLOG(("device is bolixed\n")); 3158 esp_advance_phase(sp, in_tgterror); 3159 esp_done(esp, (DID_ERROR << 16)); 3160 break; 3161 3162 case BUS_DEVICE_RESET: 3163 ESPLOG(("device reset successful\n")); 3164 esp_dev->sync_max_offset = 0; 3165 esp_dev->sync_min_period = 0; 3166 esp_dev->sync = 0; 3167 esp_advance_phase(sp, in_resetdev); 3168 esp_done(esp, (DID_RESET << 16)); 3169 break; 3170 3171 case ABORT: 3172 ESPLOG(("device abort successful\n")); 3173 esp_advance_phase(sp, in_abortone); 3174 esp_done(esp, (DID_ABORT << 16)); 3175 break; 3176 3177 }; 3178 return do_intr_end; 3179} 3180 3181static int esp_enter_msgout(struct esp *esp) 3182{ 3183 esp_advance_phase(esp->current_SC, in_msgout); 3184 return esp_do_msgout(esp); 3185} 3186 3187static int esp_enter_msgin(struct esp *esp) 3188{ 3189 esp_advance_phase(esp->current_SC, in_msgin); 3190 return esp_do_msgin(esp); 3191} 3192 3193static int esp_enter_cmd(struct esp *esp) 3194{ 3195 esp_advance_phase(esp->current_SC, in_cmdbegin); 3196 return esp_do_cmdbegin(esp); 3197} 3198 3199static int esp_enter_badphase(struct esp *esp) 3200{ 3201 ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id, 3202 esp->sreg & ESP_STAT_PMASK)); 3203 return do_reset_bus; 3204} 3205 3206typedef int (*espfunc_t)(struct esp *); 3207 3208static espfunc_t phase_vector[] = { 3209 esp_do_data, /* ESP_DOP */ 3210 esp_do_data, /* ESP_DIP */ 3211 esp_enter_cmd, /* ESP_CMDP */ 3212 esp_enter_status, /* ESP_STATP */ 3213 esp_enter_badphase, /* ESP_STAT_PMSG */ 3214 esp_enter_badphase, /* ESP_STAT_PMSG | ESP_STAT_PIO */ 3215 esp_enter_msgout, /* ESP_MOP */ 3216 esp_enter_msgin, /* ESP_MIP */ 3217}; 3218 3219/* The target has control of the bus and we have to see where it has 3220 * taken us. 3221 */ 3222static int esp_do_phase_determine(struct esp *esp) 3223{ 3224 if ((esp->ireg & ESP_INTR_DC) != 0) 3225 return esp_disconnect_amidst_phases(esp); 3226 return phase_vector[esp->sreg & ESP_STAT_PMASK](esp); 3227} 3228 3229/* First interrupt after exec'ing a cmd comes here. */ 3230static int esp_select_complete(struct esp *esp) 3231{ 3232 struct scsi_cmnd *SCptr = esp->current_SC; 3233 struct esp_device *esp_dev = SCptr->device->hostdata; 3234 int cmd_bytes_sent, fcnt; 3235 3236 if (esp->erev != fashme) 3237 esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS); 3238 3239 if (esp->erev == fashme) 3240 fcnt = esp->hme_fifo_workaround_count; 3241 else 3242 fcnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES); 3243 3244 cmd_bytes_sent = esp_bytes_sent(esp, fcnt); 3245 dma_invalidate(esp); 3246 3247 /* Let's check to see if a reselect happened 3248 * while we we're trying to select. This must 3249 * be checked first. 3250 */ 3251 if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) { 3252 esp_reconnect(esp, SCptr); 3253 return esp_do_reconnect(esp); 3254 } 3255 3256 /* Looks like things worked, we should see a bus service & 3257 * a function complete interrupt at this point. Note we 3258 * are doing a direct comparison because we don't want to 3259 * be fooled into thinking selection was successful if 3260 * ESP_INTR_DC is set, see below. 3261 */ 3262 if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) { 3263 /* target speaks... */ 3264 esp->targets_present |= (1<<SCptr->device->id); 3265 3266 /* What if the target ignores the sdtr? */ 3267 if (esp->snip) 3268 esp_dev->sync = 1; 3269 3270 /* See how far, if at all, we got in getting 3271 * the information out to the target. 3272 */ 3273 switch (esp->seqreg) { 3274 default: 3275 3276 case ESP_STEP_ASEL: 3277 /* Arbitration won, target selected, but 3278 * we are in some phase which is not command 3279 * phase nor is it message out phase. 3280 * 3281 * XXX We've confused the target, obviously. 3282 * XXX So clear it's state, but we also end 3283 * XXX up clearing everyone elses. That isn't 3284 * XXX so nice. I'd like to just reset this 3285 * XXX target, but if I cannot even get it's 3286 * XXX attention and finish selection to talk 3287 * XXX to it, there is not much more I can do. 3288 * XXX If we have a loaded bus we're going to 3289 * XXX spend the next second or so renegotiating 3290 * XXX for synchronous transfers. 3291 */ 3292 ESPLOG(("esp%d: STEP_ASEL for tgt %d\n", 3293 esp->esp_id, SCptr->device->id)); 3294 3295 case ESP_STEP_SID: 3296 /* Arbitration won, target selected, went 3297 * to message out phase, sent one message 3298 * byte, then we stopped. ATN is asserted 3299 * on the SCSI bus and the target is still 3300 * there hanging on. This is a legal 3301 * sequence step if we gave the ESP a select 3302 * and stop command. 3303 * 3304 * XXX See above, I could set the borken flag 3305 * XXX in the device struct and retry the 3306 * XXX command. But would that help for 3307 * XXX tagged capable targets? 3308 */ 3309 3310 case ESP_STEP_NCMD: 3311 /* Arbitration won, target selected, maybe 3312 * sent the one message byte in message out 3313 * phase, but we did not go to command phase 3314 * in the end. Actually, we could have sent 3315 * only some of the message bytes if we tried 3316 * to send out the entire identify and tag 3317 * message using ESP_CMD_SA3. 3318 */ 3319 cmd_bytes_sent = 0; 3320 break; 3321 3322 case ESP_STEP_PPC: 3323 /* No, not the powerPC pinhead. Arbitration 3324 * won, all message bytes sent if we went to 3325 * message out phase, went to command phase 3326 * but only part of the command was sent. 3327 * 3328 * XXX I've seen this, but usually in conjunction 3329 * XXX with a gross error which appears to have 3330 * XXX occurred between the time I told the 3331 * XXX ESP to arbitrate and when I got the 3332 * XXX interrupt. Could I have misloaded the 3333 * XXX command bytes into the fifo? Actually, 3334 * XXX I most likely missed a phase, and therefore 3335 * XXX went into never never land and didn't even 3336 * XXX know it. That was the old driver though. 3337 * XXX What is even more peculiar is that the ESP 3338 * XXX showed the proper function complete and 3339 * XXX bus service bits in the interrupt register. 3340 */ 3341 3342 case ESP_STEP_FINI4: 3343 case ESP_STEP_FINI5: 3344 case ESP_STEP_FINI6: 3345 case ESP_STEP_FINI7: 3346 /* Account for the identify message */ 3347 if (SCptr->SCp.phase == in_slct_norm) 3348 cmd_bytes_sent -= 1; 3349 }; 3350 3351 if (esp->erev != fashme) 3352 esp_cmd(esp, ESP_CMD_NULL); 3353 3354 /* Be careful, we could really get fucked during synchronous 3355 * data transfers if we try to flush the fifo now. 3356 */ 3357 if ((esp->erev != fashme) && /* not a Happy Meal and... */ 3358 !fcnt && /* Fifo is empty and... */ 3359 /* either we are not doing synchronous transfers or... */ 3360 (!esp_dev->sync_max_offset || 3361 /* We are not going into data in phase. */ 3362 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP))) 3363 esp_cmd(esp, ESP_CMD_FLUSH); /* flush is safe */ 3364 3365 /* See how far we got if this is not a slow command. */ 3366 if (!esp->esp_slowcmd) { 3367 if (cmd_bytes_sent < 0) 3368 cmd_bytes_sent = 0; 3369 if (cmd_bytes_sent != SCptr->cmd_len) { 3370 /* Crapola, mark it as a slowcmd 3371 * so that we have some chance of 3372 * keeping the command alive with 3373 * good luck. 3374 * 3375 * XXX Actually, if we didn't send it all 3376 * XXX this means either we didn't set things 3377 * XXX up properly (driver bug) or the target 3378 * XXX or the ESP detected parity on one of 3379 * XXX the command bytes. This makes much 3380 * XXX more sense, and therefore this code 3381 * XXX should be changed to send out a 3382 * XXX parity error message or if the status 3383 * XXX register shows no parity error then 3384 * XXX just expect the target to bring the 3385 * XXX bus into message in phase so that it 3386 * XXX can send us the parity error message. 3387 * XXX SCSI sucks... 3388 */ 3389 esp->esp_slowcmd = 1; 3390 esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]); 3391 esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent); 3392 } 3393 } 3394 3395 /* Now figure out where we went. */ 3396 esp_advance_phase(SCptr, in_the_dark); 3397 return esp_do_phase_determine(esp); 3398 } 3399 3400 /* Did the target even make it? */ 3401 if (esp->ireg == ESP_INTR_DC) { 3402 /* wheee... nobody there or they didn't like 3403 * what we told it to do, clean up. 3404 */ 3405 3406 /* If anyone is off the bus, but working on 3407 * a command in the background for us, tell 3408 * the ESP to listen for them. 3409 */ 3410 if (esp->disconnected_SC) 3411 esp_cmd(esp, ESP_CMD_ESEL); 3412 3413 if (((1<<SCptr->device->id) & esp->targets_present) && 3414 esp->seqreg != 0 && 3415 (esp->cur_msgout[0] == EXTENDED_MESSAGE) && 3416 (SCptr->SCp.phase == in_slct_msg || 3417 SCptr->SCp.phase == in_slct_stop)) { 3418 /* shit */ 3419 esp->snip = 0; 3420 ESPLOG(("esp%d: Failed synchronous negotiation for target %d " 3421 "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun)); 3422 esp_dev->sync_max_offset = 0; 3423 esp_dev->sync_min_period = 0; 3424 esp_dev->sync = 1; /* so we don't negotiate again */ 3425 3426 /* Run the command again, this time though we 3427 * won't try to negotiate for synchronous transfers. 3428 * 3429 * XXX I'd like to do something like send an 3430 * XXX INITIATOR_ERROR or ABORT message to the 3431 * XXX target to tell it, "Sorry I confused you, 3432 * XXX please come back and I will be nicer next 3433 * XXX time". But that requires having the target 3434 * XXX on the bus, and it has dropped BSY on us. 3435 */ 3436 esp->current_SC = NULL; 3437 esp_advance_phase(SCptr, not_issued); 3438 prepend_SC(&esp->issue_SC, SCptr); 3439 esp_exec_cmd(esp); 3440 return do_intr_end; 3441 } 3442 3443 /* Ok, this is normal, this is what we see during boot 3444 * or whenever when we are scanning the bus for targets. 3445 * But first make sure that is really what is happening. 3446 */ 3447 if (((1<<SCptr->device->id) & esp->targets_present)) { 3448 ESPLOG(("esp%d: Warning, live target %d not responding to " 3449 "selection.\n", esp->esp_id, SCptr->device->id)); 3450 3451 /* This _CAN_ happen. The SCSI standard states that 3452 * the target is to _not_ respond to selection if 3453 * _it_ detects bad parity on the bus for any reason. 3454 * Therefore, we assume that if we've talked successfully 3455 * to this target before, bad parity is the problem. 3456 */ 3457 esp_done(esp, (DID_PARITY << 16)); 3458 } else { 3459 /* Else, there really isn't anyone there. */ 3460 ESPMISC(("esp: selection failure, maybe nobody there?\n")); 3461 ESPMISC(("esp: target %d lun %d\n", 3462 SCptr->device->id, SCptr->device->lun)); 3463 esp_done(esp, (DID_BAD_TARGET << 16)); 3464 } 3465 return do_intr_end; 3466 } 3467 3468 ESPLOG(("esp%d: Selection failure.\n", esp->esp_id)); 3469 printk("esp%d: Currently -- ", esp->esp_id); 3470 esp_print_ireg(esp->ireg); printk(" "); 3471 esp_print_statreg(esp->sreg); printk(" "); 3472 esp_print_seqreg(esp->seqreg); printk("\n"); 3473 printk("esp%d: New -- ", esp->esp_id); 3474 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS); 3475 esp->seqreg = sbus_readb(esp->eregs + ESP_SSTEP); 3476 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); 3477 esp_print_ireg(esp->ireg); printk(" "); 3478 esp_print_statreg(esp->sreg); printk(" "); 3479 esp_print_seqreg(esp->seqreg); printk("\n"); 3480 ESPLOG(("esp%d: resetting bus\n", esp->esp_id)); 3481 return do_reset_bus; /* ugh... */ 3482} 3483 3484/* Continue reading bytes for msgin phase. */ 3485static int esp_do_msgincont(struct esp *esp) 3486{ 3487 if (esp->ireg & ESP_INTR_BSERV) { 3488 /* in the right phase too? */ 3489 if ((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) { 3490 /* phew... */ 3491 esp_cmd(esp, ESP_CMD_TI); 3492 esp_advance_phase(esp->current_SC, in_msgindone); 3493 return do_intr_end; 3494 } 3495 3496 /* We changed phase but ESP shows bus service, 3497 * in this case it is most likely that we, the 3498 * hacker who has been up for 20hrs straight 3499 * staring at the screen, drowned in coffee 3500 * smelling like retched cigarette ashes 3501 * have miscoded something..... so, try to 3502 * recover as best we can. 3503 */ 3504 ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id)); 3505 } 3506 esp_advance_phase(esp->current_SC, in_the_dark); 3507 return do_phase_determine; 3508} 3509 3510static int check_singlebyte_msg(struct esp *esp) 3511{ 3512 esp->prevmsgin = esp->cur_msgin[0]; 3513 if (esp->cur_msgin[0] & 0x80) { 3514 /* wheee... */ 3515 ESPLOG(("esp%d: target sends identify amidst phases\n", 3516 esp->esp_id)); 3517 esp_advance_phase(esp->current_SC, in_the_dark); 3518 return 0; 3519 } else if (((esp->cur_msgin[0] & 0xf0) == 0x20) || 3520 (esp->cur_msgin[0] == EXTENDED_MESSAGE)) { 3521 esp->msgin_len = 2; 3522 esp_advance_phase(esp->current_SC, in_msgincont); 3523 return 0; 3524 } 3525 esp_advance_phase(esp->current_SC, in_the_dark); 3526 switch (esp->cur_msgin[0]) { 3527 default: 3528 /* We don't want to hear about it. */ 3529 ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id, 3530 esp->cur_msgin[0])); 3531 return MESSAGE_REJECT; 3532 3533 case NOP: 3534 ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id, 3535 esp->current_SC->device->id)); 3536 return 0; 3537 3538 case RESTORE_POINTERS: 3539 /* In this case we might also have to backup the 3540 * "slow command" pointer. It is rare to get such 3541 * a save/restore pointer sequence so early in the 3542 * bus transition sequences, but cover it. 3543 */ 3544 if (esp->esp_slowcmd) { 3545 esp->esp_scmdleft = esp->current_SC->cmd_len; 3546 esp->esp_scmdp = &esp->current_SC->cmnd[0]; 3547 } 3548 esp_restore_pointers(esp, esp->current_SC); 3549 return 0; 3550 3551 case SAVE_POINTERS: 3552 esp_save_pointers(esp, esp->current_SC); 3553 return 0; 3554 3555 case COMMAND_COMPLETE: 3556 case DISCONNECT: 3557 /* Freeing the bus, let it go. */ 3558 esp->current_SC->SCp.phase = in_freeing; 3559 return 0; 3560 3561 case MESSAGE_REJECT: 3562 ESPMISC(("msg reject, ")); 3563 if (esp->prevmsgout == EXTENDED_MESSAGE) { 3564 struct esp_device *esp_dev = esp->current_SC->device->hostdata; 3565 3566 /* Doesn't look like this target can 3567 * do synchronous or WIDE transfers. 3568 */ 3569 ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n")); 3570 esp_dev->sync = 1; 3571 esp_dev->wide = 1; 3572 esp_dev->sync_min_period = 0; 3573 esp_dev->sync_max_offset = 0; 3574 return 0; 3575 } else { 3576 ESPMISC(("not sync nego, sending ABORT\n")); 3577 return ABORT; 3578 } 3579 }; 3580} 3581 3582/* Target negotiates for synchronous transfers before we do, this 3583 * is legal although very strange. What is even funnier is that 3584 * the SCSI2 standard specifically recommends against targets doing 3585 * this because so many initiators cannot cope with this occurring. 3586 */ 3587static int target_with_ants_in_pants(struct esp *esp, 3588 struct scsi_cmnd *SCptr, 3589 struct esp_device *esp_dev) 3590{ 3591 if (esp_dev->sync || SCptr->device->borken) { 3592 /* sorry, no can do */ 3593 ESPSDTR(("forcing to async, ")); 3594 build_sync_nego_msg(esp, 0, 0); 3595 esp_dev->sync = 1; 3596 esp->snip = 1; 3597 ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id)); 3598 esp_advance_phase(SCptr, in_the_dark); 3599 return EXTENDED_MESSAGE; 3600 } 3601 3602 /* Ok, we'll check them out... */ 3603 return 0; 3604} 3605 3606static void sync_report(struct esp *esp) 3607{ 3608 int msg3, msg4; 3609 char *type; 3610 3611 msg3 = esp->cur_msgin[3]; 3612 msg4 = esp->cur_msgin[4]; 3613 if (msg4) { 3614 int hz = 1000000000 / (msg3 * 4); 3615 int integer = hz / 1000000; 3616 int fraction = (hz - (integer * 1000000)) / 10000; 3617 if ((esp->erev == fashme) && 3618 (esp->config3[esp->current_SC->device->id] & ESP_CONFIG3_EWIDE)) { 3619 type = "FAST-WIDE"; 3620 integer <<= 1; 3621 fraction <<= 1; 3622 } else if ((msg3 * 4) < 200) { 3623 type = "FAST"; 3624 } else { 3625 type = "synchronous"; 3626 } 3627 3628 /* Do not transform this back into one big printk 3629 * again, it triggers a bug in our sparc64-gcc272 3630 * sibling call optimization. -DaveM 3631 */ 3632 ESPLOG((KERN_INFO "esp%d: target %d ", 3633 esp->esp_id, esp->current_SC->device->id)); 3634 ESPLOG(("[period %dns offset %d %d.%02dMHz ", 3635 (int) msg3 * 4, (int) msg4, 3636 integer, fraction)); 3637 ESPLOG(("%s SCSI%s]\n", type, 3638 (((msg3 * 4) < 200) ? "-II" : ""))); 3639 } else { 3640 ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n", 3641 esp->esp_id, esp->current_SC->device->id)); 3642 } 3643} 3644 3645static int check_multibyte_msg(struct esp *esp) 3646{ 3647 struct scsi_cmnd *SCptr = esp->current_SC; 3648 struct esp_device *esp_dev = SCptr->device->hostdata; 3649 u8 regval = 0; 3650 int message_out = 0; 3651 3652 ESPSDTR(("chk multibyte msg: ")); 3653 if (esp->cur_msgin[2] == EXTENDED_SDTR) { 3654 int period = esp->cur_msgin[3]; 3655 int offset = esp->cur_msgin[4]; 3656 3657 ESPSDTR(("is sync nego response, ")); 3658 if (!esp->snip) { 3659 int rval; 3660 3661 /* Target negotiates first! */ 3662 ESPSDTR(("target jumps the gun, ")); 3663 message_out = EXTENDED_MESSAGE; /* we must respond */ 3664 rval = target_with_ants_in_pants(esp, SCptr, esp_dev); 3665 if (rval) 3666 return rval; 3667 } 3668 3669 ESPSDTR(("examining sdtr, ")); 3670 3671 /* Offset cannot be larger than ESP fifo size. */ 3672 if (offset > 15) { 3673 ESPSDTR(("offset too big %2x, ", offset)); 3674 offset = 15; 3675 ESPSDTR(("sending back new offset\n")); 3676 build_sync_nego_msg(esp, period, offset); 3677 return EXTENDED_MESSAGE; 3678 } 3679 3680 if (offset && period > esp->max_period) { 3681 /* Yeee, async for this slow device. */ 3682 ESPSDTR(("period too long %2x, ", period)); 3683 build_sync_nego_msg(esp, 0, 0); 3684 ESPSDTR(("hoping for msgout\n")); 3685 esp_advance_phase(esp->current_SC, in_the_dark); 3686 return EXTENDED_MESSAGE; 3687 } else if (offset && period < esp->min_period) { 3688 ESPSDTR(("period too short %2x, ", period)); 3689 period = esp->min_period; 3690 if (esp->erev > esp236) 3691 regval = 4; 3692 else 3693 regval = 5; 3694 } else if (offset) { 3695 int tmp; 3696 3697 ESPSDTR(("period is ok, ")); 3698 tmp = esp->ccycle / 1000; 3699 regval = (((period << 2) + tmp - 1) / tmp); 3700 if (regval && ((esp->erev == fas100a || 3701 esp->erev == fas236 || 3702 esp->erev == fashme))) { 3703 if (period >= 50) 3704 regval--; 3705 } 3706 } 3707 3708 if (offset) { 3709 u8 bit; 3710 3711 esp_dev->sync_min_period = (regval & 0x1f); 3712 esp_dev->sync_max_offset = (offset | esp->radelay); 3713 if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) { 3714 if ((esp->erev == fas100a) || (esp->erev == fashme)) 3715 bit = ESP_CONFIG3_FAST; 3716 else 3717 bit = ESP_CONFIG3_FSCSI; 3718 if (period < 50) { 3719 /* On FAS366, if using fast-20 synchronous transfers 3720 * we need to make sure the REQ/ACK assert/deassert 3721 * control bits are clear. 3722 */ 3723 if (esp->erev == fashme) 3724 esp_dev->sync_max_offset &= ~esp->radelay; 3725 esp->config3[SCptr->device->id] |= bit; 3726 } else { 3727 esp->config3[SCptr->device->id] &= ~bit; 3728 } 3729 esp->prev_cfg3 = esp->config3[SCptr->device->id]; 3730 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 3731 } 3732 esp->prev_soff = esp_dev->sync_max_offset; 3733 esp->prev_stp = esp_dev->sync_min_period; 3734 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 3735 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 3736 ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n", 3737 esp_dev->sync_max_offset, 3738 esp_dev->sync_min_period, 3739 esp->config3[SCptr->device->id])); 3740 3741 esp->snip = 0; 3742 } else if (esp_dev->sync_max_offset) { 3743 u8 bit; 3744 3745 /* back to async mode */ 3746 ESPSDTR(("unaccaptable sync nego, forcing async\n")); 3747 esp_dev->sync_max_offset = 0; 3748 esp_dev->sync_min_period = 0; 3749 esp->prev_soff = 0; 3750 esp->prev_stp = 0; 3751 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF); 3752 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP); 3753 if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) { 3754 if ((esp->erev == fas100a) || (esp->erev == fashme)) 3755 bit = ESP_CONFIG3_FAST; 3756 else 3757 bit = ESP_CONFIG3_FSCSI; 3758 esp->config3[SCptr->device->id] &= ~bit; 3759 esp->prev_cfg3 = esp->config3[SCptr->device->id]; 3760 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 3761 } 3762 } 3763 3764 sync_report(esp); 3765 3766 ESPSDTR(("chk multibyte msg: sync is known, ")); 3767 esp_dev->sync = 1; 3768 3769 if (message_out) { 3770 ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n", 3771 esp->esp_id)); 3772 build_sync_nego_msg(esp, period, offset); 3773 esp_advance_phase(SCptr, in_the_dark); 3774 return EXTENDED_MESSAGE; 3775 } 3776 3777 ESPSDTR(("returning zero\n")); 3778 esp_advance_phase(SCptr, in_the_dark); /* ...or else! */ 3779 return 0; 3780 } else if (esp->cur_msgin[2] == EXTENDED_WDTR) { 3781 int size = 8 << esp->cur_msgin[3]; 3782 3783 esp->wnip = 0; 3784 if (esp->erev != fashme) { 3785 ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n", 3786 esp->esp_id)); 3787 message_out = MESSAGE_REJECT; 3788 } else if (size > 16) { 3789 ESPLOG(("esp%d: AIEEE wide transfer for %d size " 3790 "not supported.\n", esp->esp_id, size)); 3791 message_out = MESSAGE_REJECT; 3792 } else { 3793 /* Things look good; let's see what we got. */ 3794 if (size == 16) { 3795 /* Set config 3 register for this target. */ 3796 esp->config3[SCptr->device->id] |= ESP_CONFIG3_EWIDE; 3797 } else { 3798 /* Just make sure it was one byte sized. */ 3799 if (size != 8) { 3800 ESPLOG(("esp%d: Aieee, wide nego of %d size.\n", 3801 esp->esp_id, size)); 3802 message_out = MESSAGE_REJECT; 3803 goto finish; 3804 } 3805 /* Pure paranoia. */ 3806 esp->config3[SCptr->device->id] &= ~(ESP_CONFIG3_EWIDE); 3807 } 3808 esp->prev_cfg3 = esp->config3[SCptr->device->id]; 3809 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3); 3810 3811 /* Regardless, next try for sync transfers. */ 3812 build_sync_nego_msg(esp, esp->sync_defp, 15); 3813 esp_dev->sync = 1; 3814 esp->snip = 1; 3815 message_out = EXTENDED_MESSAGE; 3816 } 3817 } else if (esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) { 3818 ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id)); 3819 message_out = MESSAGE_REJECT; 3820 } 3821finish: 3822 esp_advance_phase(SCptr, in_the_dark); 3823 return message_out; 3824} 3825 3826static int esp_do_msgindone(struct esp *esp) 3827{ 3828 struct scsi_cmnd *SCptr = esp->current_SC; 3829 int message_out = 0, it = 0, rval; 3830 3831 rval = skipahead1(esp, SCptr, in_msgin, in_msgindone); 3832 if (rval) 3833 return rval; 3834 if (SCptr->SCp.sent_command != in_status) { 3835 if (!(esp->ireg & ESP_INTR_DC)) { 3836 if (esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) { 3837 message_out = MSG_PARITY_ERROR; 3838 esp_cmd(esp, ESP_CMD_FLUSH); 3839 } else if (esp->erev != fashme && 3840 (it = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES)) != 1) { 3841 /* We certainly dropped the ball somewhere. */ 3842 message_out = INITIATOR_ERROR; 3843 esp_cmd(esp, ESP_CMD_FLUSH); 3844 } else if (!esp->msgin_len) { 3845 if (esp->erev == fashme) 3846 it = esp->hme_fifo_workaround_buffer[0]; 3847 else 3848 it = sbus_readb(esp->eregs + ESP_FDATA); 3849 esp_advance_phase(SCptr, in_msgincont); 3850 } else { 3851 /* it is ok and we want it */ 3852 if (esp->erev == fashme) 3853 it = esp->cur_msgin[esp->msgin_ctr] = 3854 esp->hme_fifo_workaround_buffer[0]; 3855 else 3856 it = esp->cur_msgin[esp->msgin_ctr] = 3857 sbus_readb(esp->eregs + ESP_FDATA); 3858 esp->msgin_ctr++; 3859 } 3860 } else { 3861 esp_advance_phase(SCptr, in_the_dark); 3862 return do_work_bus; 3863 } 3864 } else { 3865 it = esp->cur_msgin[0]; 3866 } 3867 if (!message_out && esp->msgin_len) { 3868 if (esp->msgin_ctr < esp->msgin_len) { 3869 esp_advance_phase(SCptr, in_msgincont); 3870 } else if (esp->msgin_len == 1) { 3871 message_out = check_singlebyte_msg(esp); 3872 } else if (esp->msgin_len == 2) { 3873 if (esp->cur_msgin[0] == EXTENDED_MESSAGE) { 3874 if ((it + 2) >= 15) { 3875 message_out = MESSAGE_REJECT; 3876 } else { 3877 esp->msgin_len = (it + 2); 3878 esp_advance_phase(SCptr, in_msgincont); 3879 } 3880 } else { 3881 message_out = MESSAGE_REJECT; /* foo on you */ 3882 } 3883 } else { 3884 message_out = check_multibyte_msg(esp); 3885 } 3886 } 3887 if (message_out < 0) { 3888 return -message_out; 3889 } else if (message_out) { 3890 if (((message_out != 1) && 3891 ((message_out < 0x20) || (message_out & 0x80)))) 3892 esp->msgout_len = 1; 3893 esp->cur_msgout[0] = message_out; 3894 esp_cmd(esp, ESP_CMD_SATN); 3895 esp_advance_phase(SCptr, in_the_dark); 3896 esp->msgin_len = 0; 3897 } 3898 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS); 3899 esp->sreg &= ~(ESP_STAT_INTR); 3900 if ((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD)) 3901 esp_cmd(esp, ESP_CMD_MOK); 3902 if ((SCptr->SCp.sent_command == in_msgindone) && 3903 (SCptr->SCp.phase == in_freeing)) 3904 return esp_do_freebus(esp); 3905 return do_intr_end; 3906} 3907 3908static int esp_do_cmdbegin(struct esp *esp) 3909{ 3910 struct scsi_cmnd *SCptr = esp->current_SC; 3911 3912 esp_advance_phase(SCptr, in_cmdend); 3913 if (esp->erev == fashme) { 3914 u32 tmp = sbus_readl(esp->dregs + DMA_CSR); 3915 int i; 3916 3917 for (i = 0; i < esp->esp_scmdleft; i++) 3918 esp->esp_command[i] = *esp->esp_scmdp++; 3919 esp->esp_scmdleft = 0; 3920 esp_cmd(esp, ESP_CMD_FLUSH); 3921 esp_setcount(esp->eregs, i, 1); 3922 esp_cmd(esp, (ESP_CMD_DMA | ESP_CMD_TI)); 3923 tmp |= (DMA_SCSI_DISAB | DMA_ENABLE); 3924 tmp &= ~(DMA_ST_WRITE); 3925 sbus_writel(i, esp->dregs + DMA_COUNT); 3926 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR); 3927 sbus_writel(tmp, esp->dregs + DMA_CSR); 3928 } else { 3929 u8 tmp; 3930 3931 esp_cmd(esp, ESP_CMD_FLUSH); 3932 tmp = *esp->esp_scmdp++; 3933 esp->esp_scmdleft--; 3934 sbus_writeb(tmp, esp->eregs + ESP_FDATA); 3935 esp_cmd(esp, ESP_CMD_TI); 3936 } 3937 return do_intr_end; 3938} 3939 3940static int esp_do_cmddone(struct esp *esp) 3941{ 3942 if (esp->erev == fashme) 3943 dma_invalidate(esp); 3944 else 3945 esp_cmd(esp, ESP_CMD_NULL); 3946 3947 if (esp->ireg & ESP_INTR_BSERV) { 3948 esp_advance_phase(esp->current_SC, in_the_dark); 3949 return esp_do_phase_determine(esp); 3950 } 3951 3952 ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n", 3953 esp->esp_id)); 3954 return do_reset_bus; 3955} 3956 3957static int esp_do_msgout(struct esp *esp) 3958{ 3959 esp_cmd(esp, ESP_CMD_FLUSH); 3960 switch (esp->msgout_len) { 3961 case 1: 3962 if (esp->erev == fashme) 3963 hme_fifo_push(esp, &esp->cur_msgout[0], 1); 3964 else 3965 sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA); 3966 3967 esp_cmd(esp, ESP_CMD_TI); 3968 break; 3969 3970 case 2: 3971 esp->esp_command[0] = esp->cur_msgout[0]; 3972 esp->esp_command[1] = esp->cur_msgout[1]; 3973 3974 if (esp->erev == fashme) { 3975 hme_fifo_push(esp, &esp->cur_msgout[0], 2); 3976 esp_cmd(esp, ESP_CMD_TI); 3977 } else { 3978 dma_setup(esp, esp->esp_command_dvma, 2, 0); 3979 esp_setcount(esp->eregs, 2, 0); 3980 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 3981 } 3982 break; 3983 3984 case 4: 3985 esp->esp_command[0] = esp->cur_msgout[0]; 3986 esp->esp_command[1] = esp->cur_msgout[1]; 3987 esp->esp_command[2] = esp->cur_msgout[2]; 3988 esp->esp_command[3] = esp->cur_msgout[3]; 3989 esp->snip = 1; 3990 3991 if (esp->erev == fashme) { 3992 hme_fifo_push(esp, &esp->cur_msgout[0], 4); 3993 esp_cmd(esp, ESP_CMD_TI); 3994 } else { 3995 dma_setup(esp, esp->esp_command_dvma, 4, 0); 3996 esp_setcount(esp->eregs, 4, 0); 3997 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 3998 } 3999 break; 4000 4001 case 5: 4002 esp->esp_command[0] = esp->cur_msgout[0]; 4003 esp->esp_command[1] = esp->cur_msgout[1]; 4004 esp->esp_command[2] = esp->cur_msgout[2]; 4005 esp->esp_command[3] = esp->cur_msgout[3]; 4006 esp->esp_command[4] = esp->cur_msgout[4]; 4007 esp->snip = 1; 4008 4009 if (esp->erev == fashme) { 4010 hme_fifo_push(esp, &esp->cur_msgout[0], 5); 4011 esp_cmd(esp, ESP_CMD_TI); 4012 } else { 4013 dma_setup(esp, esp->esp_command_dvma, 5, 0); 4014 esp_setcount(esp->eregs, 5, 0); 4015 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI); 4016 } 4017 break; 4018 4019 default: 4020 /* whoops */ 4021 ESPMISC(("bogus msgout sending NOP\n")); 4022 esp->cur_msgout[0] = NOP; 4023 4024 if (esp->erev == fashme) { 4025 hme_fifo_push(esp, &esp->cur_msgout[0], 1); 4026 } else { 4027 sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA); 4028 } 4029 4030 esp->msgout_len = 1; 4031 esp_cmd(esp, ESP_CMD_TI); 4032 break; 4033 }; 4034 4035 esp_advance_phase(esp->current_SC, in_msgoutdone); 4036 return do_intr_end; 4037} 4038 4039static int esp_do_msgoutdone(struct esp *esp) 4040{ 4041 if (esp->msgout_len > 1) { 4042 /* XXX HME/FAS ATN deassert workaround required, 4043 * XXX no DMA flushing, only possible ESP_CMD_FLUSH 4044 * XXX to kill the fifo. 4045 */ 4046 if (esp->erev != fashme) { 4047 u32 tmp; 4048 4049 while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ) 4050 udelay(1); 4051 tmp &= ~DMA_ENABLE; 4052 sbus_writel(tmp, esp->dregs + DMA_CSR); 4053 dma_invalidate(esp); 4054 } else { 4055 esp_cmd(esp, ESP_CMD_FLUSH); 4056 } 4057 } 4058 if (!(esp->ireg & ESP_INTR_DC)) { 4059 if (esp->erev != fashme) 4060 esp_cmd(esp, ESP_CMD_NULL); 4061 switch (esp->sreg & ESP_STAT_PMASK) { 4062 case ESP_MOP: 4063 /* whoops, parity error */ 4064 ESPLOG(("esp%d: still in msgout, parity error assumed\n", 4065 esp->esp_id)); 4066 if (esp->msgout_len > 1) 4067 esp_cmd(esp, ESP_CMD_SATN); 4068 esp_advance_phase(esp->current_SC, in_msgout); 4069 return do_work_bus; 4070 4071 case ESP_DIP: 4072 break; 4073 4074 default: 4075 /* Happy Meal fifo is touchy... */ 4076 if ((esp->erev != fashme) && 4077 !fcount(esp) && 4078 !(((struct esp_device *)esp->current_SC->device->hostdata)->sync_max_offset)) 4079 esp_cmd(esp, ESP_CMD_FLUSH); 4080 break; 4081 4082 }; 4083 } else { 4084 ESPLOG(("esp%d: disconnect, resetting bus\n", esp->esp_id)); 4085 return do_reset_bus; 4086 } 4087 4088 /* If we sent out a synchronous negotiation message, update 4089 * our state. 4090 */ 4091 if (esp->cur_msgout[2] == EXTENDED_MESSAGE && 4092 esp->cur_msgout[4] == EXTENDED_SDTR) { 4093 esp->snip = 1; /* anal retentiveness... */ 4094 } 4095 4096 esp->prevmsgout = esp->cur_msgout[0]; 4097 esp->msgout_len = 0; 4098 esp_advance_phase(esp->current_SC, in_the_dark); 4099 return esp_do_phase_determine(esp); 4100} 4101 4102static int esp_bus_unexpected(struct esp *esp) 4103{ 4104 ESPLOG(("esp%d: command in weird state %2x\n", 4105 esp->esp_id, esp->current_SC->SCp.phase)); 4106 return do_reset_bus; 4107} 4108 4109static espfunc_t bus_vector[] = { 4110 esp_do_data_finale, 4111 esp_do_data_finale, 4112 esp_bus_unexpected, 4113 esp_do_msgin, 4114 esp_do_msgincont, 4115 esp_do_msgindone, 4116 esp_do_msgout, 4117 esp_do_msgoutdone, 4118 esp_do_cmdbegin, 4119 esp_do_cmddone, 4120 esp_do_status, 4121 esp_do_freebus, 4122 esp_do_phase_determine, 4123 esp_bus_unexpected, 4124 esp_bus_unexpected, 4125 esp_bus_unexpected, 4126}; 4127 4128/* This is the second tier in our dual-level SCSI state machine. */ 4129static int esp_work_bus(struct esp *esp) 4130{ 4131 struct scsi_cmnd *SCptr = esp->current_SC; 4132 unsigned int phase; 4133 4134 ESPBUS(("esp_work_bus: ")); 4135 if (!SCptr) { 4136 ESPBUS(("reconnect\n")); 4137 return esp_do_reconnect(esp); 4138 } 4139 phase = SCptr->SCp.phase; 4140 if ((phase & 0xf0) == in_phases_mask) 4141 return bus_vector[(phase & 0x0f)](esp); 4142 else if ((phase & 0xf0) == in_slct_mask) 4143 return esp_select_complete(esp); 4144 else 4145 return esp_bus_unexpected(esp); 4146} 4147 4148static espfunc_t isvc_vector[] = { 4149 NULL, 4150 esp_do_phase_determine, 4151 esp_do_resetbus, 4152 esp_finish_reset, 4153 esp_work_bus 4154}; 4155 4156/* Main interrupt handler for an esp adapter. */ 4157static void esp_handle(struct esp *esp) 4158{ 4159 struct scsi_cmnd *SCptr; 4160 int what_next = do_intr_end; 4161 4162 SCptr = esp->current_SC; 4163 4164 /* Check for errors. */ 4165 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS); 4166 esp->sreg &= (~ESP_STAT_INTR); 4167 if (esp->erev == fashme) { 4168 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2); 4169 esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS); 4170 } 4171 4172 if (esp->sreg & (ESP_STAT_SPAM)) { 4173 /* Gross error, could be due to one of: 4174 * 4175 * - top of fifo overwritten, could be because 4176 * we tried to do a synchronous transfer with 4177 * an offset greater than ESP fifo size 4178 * 4179 * - top of command register overwritten 4180 * 4181 * - DMA setup to go in one direction, SCSI 4182 * bus points in the other, whoops 4183 * 4184 * - weird phase change during asynchronous 4185 * data phase while we are initiator 4186 */ 4187 ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg)); 4188 4189 /* If a command is live on the bus we cannot safely 4190 * reset the bus, so we'll just let the pieces fall 4191 * where they may. Here we are hoping that the 4192 * target will be able to cleanly go away soon 4193 * so we can safely reset things. 4194 */ 4195 if (!SCptr) { 4196 ESPLOG(("esp%d: No current cmd during gross error, " 4197 "resetting bus\n", esp->esp_id)); 4198 what_next = do_reset_bus; 4199 goto state_machine; 4200 } 4201 } 4202 4203 if (sbus_readl(esp->dregs + DMA_CSR) & DMA_HNDL_ERROR) { 4204 /* A DMA gate array error. Here we must 4205 * be seeing one of two things. Either the 4206 * virtual to physical address translation 4207 * on the SBUS could not occur, else the 4208 * translation it did get pointed to a bogus 4209 * page. Ho hum... 4210 */ 4211 ESPLOG(("esp%d: DMA error %08x\n", esp->esp_id, 4212 sbus_readl(esp->dregs + DMA_CSR))); 4213 4214 /* DMA gate array itself must be reset to clear the 4215 * error condition. 4216 */ 4217 esp_reset_dma(esp); 4218 4219 what_next = do_reset_bus; 4220 goto state_machine; 4221 } 4222 4223 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); /* Unlatch intr reg */ 4224 4225 if (esp->erev == fashme) { 4226 /* This chip is really losing. */ 4227 ESPHME(("HME[")); 4228 4229 ESPHME(("sreg2=%02x,", esp->sreg2)); 4230 /* Must latch fifo before reading the interrupt 4231 * register else garbage ends up in the FIFO 4232 * which confuses the driver utterly. 4233 */ 4234 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) || 4235 (esp->sreg2 & ESP_STAT2_F1BYTE)) { 4236 ESPHME(("fifo_workaround]")); 4237 hme_fifo_read(esp); 4238 } else { 4239 ESPHME(("no_fifo_workaround]")); 4240 } 4241 } 4242 4243 /* No current cmd is only valid at this point when there are 4244 * commands off the bus or we are trying a reset. 4245 */ 4246 if (!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) { 4247 /* Panic is safe, since current_SC is null. */ 4248 ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id)); 4249 panic("esp_handle: current_SC == penguin within interrupt!"); 4250 } 4251 4252 if (esp->ireg & (ESP_INTR_IC)) { 4253 /* Illegal command fed to ESP. Outside of obvious 4254 * software bugs that could cause this, there is 4255 * a condition with esp100 where we can confuse the 4256 * ESP into an erroneous illegal command interrupt 4257 * because it does not scrape the FIFO properly 4258 * for reselection. See esp100_reconnect_hwbug() 4259 * to see how we try very hard to avoid this. 4260 */ 4261 ESPLOG(("esp%d: invalid command\n", esp->esp_id)); 4262 4263 esp_dump_state(esp); 4264 4265 if (SCptr != NULL) { 4266 /* Devices with very buggy firmware can drop BSY 4267 * during a scatter list interrupt when using sync 4268 * mode transfers. We continue the transfer as 4269 * expected, the target drops the bus, the ESP 4270 * gets confused, and we get a illegal command 4271 * interrupt because the bus is in the disconnected 4272 * state now and ESP_CMD_TI is only allowed when 4273 * a nexus is alive on the bus. 4274 */ 4275 ESPLOG(("esp%d: Forcing async and disabling disconnect for " 4276 "target %d\n", esp->esp_id, SCptr->device->id)); 4277 SCptr->device->borken = 1; /* foo on you */ 4278 } 4279 4280 what_next = do_reset_bus; 4281 } else if (!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) { 4282 if (SCptr) { 4283 unsigned int phase = SCptr->SCp.phase; 4284 4285 if (phase & in_phases_mask) { 4286 what_next = esp_work_bus(esp); 4287 } else if (phase & in_slct_mask) { 4288 what_next = esp_select_complete(esp); 4289 } else { 4290 ESPLOG(("esp%d: interrupt for no good reason...\n", 4291 esp->esp_id)); 4292 what_next = do_intr_end; 4293 } 4294 } else { 4295 ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n", 4296 esp->esp_id)); 4297 what_next = do_reset_bus; 4298 } 4299 } else if (esp->ireg & ESP_INTR_SR) { 4300 ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id)); 4301 what_next = do_reset_complete; 4302 } else if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) { 4303 ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n", 4304 esp->esp_id)); 4305 what_next = do_reset_bus; 4306 } else if (esp->ireg & ESP_INTR_RSEL) { 4307 if (SCptr == NULL) { 4308 /* This is ok. */ 4309 what_next = esp_do_reconnect(esp); 4310 } else if (SCptr->SCp.phase & in_slct_mask) { 4311 /* Only selection code knows how to clean 4312 * up properly. 4313 */ 4314 ESPDISC(("Reselected during selection attempt\n")); 4315 what_next = esp_select_complete(esp); 4316 } else { 4317 ESPLOG(("esp%d: Reselected while bus is busy\n", 4318 esp->esp_id)); 4319 what_next = do_reset_bus; 4320 } 4321 } 4322 4323 /* This is tier-one in our dual level SCSI state machine. */ 4324state_machine: 4325 while (what_next != do_intr_end) { 4326 if (what_next >= do_phase_determine && 4327 what_next < do_intr_end) { 4328 what_next = isvc_vector[what_next](esp); 4329 } else { 4330 /* state is completely lost ;-( */ 4331 ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n", 4332 esp->esp_id)); 4333 what_next = do_reset_bus; 4334 } 4335 } 4336} 4337 4338/* Service only the ESP described by dev_id. */ 4339static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs) 4340{ 4341 struct esp *esp = dev_id; 4342 unsigned long flags; 4343 4344 spin_lock_irqsave(esp->ehost->host_lock, flags); 4345 if (ESP_IRQ_P(esp->dregs)) { 4346 ESP_INTSOFF(esp->dregs); 4347 4348 ESPIRQ(("I[%d:%d](", smp_processor_id(), esp->esp_id)); 4349 esp_handle(esp); 4350 ESPIRQ((")")); 4351 4352 ESP_INTSON(esp->dregs); 4353 } 4354 spin_unlock_irqrestore(esp->ehost->host_lock, flags); 4355 4356 return IRQ_HANDLED; 4357} 4358 4359static int esp_slave_alloc(struct scsi_device *SDptr) 4360{ 4361 struct esp_device *esp_dev = 4362 kmalloc(sizeof(struct esp_device), GFP_ATOMIC); 4363 4364 if (!esp_dev) 4365 return -ENOMEM; 4366 memset(esp_dev, 0, sizeof(struct esp_device)); 4367 SDptr->hostdata = esp_dev; 4368 return 0; 4369} 4370 4371static void esp_slave_destroy(struct scsi_device *SDptr) 4372{ 4373 struct esp *esp = (struct esp *) SDptr->host->hostdata; 4374 4375 esp->targets_present &= ~(1 << SDptr->id); 4376 kfree(SDptr->hostdata); 4377 SDptr->hostdata = NULL; 4378} 4379 4380static struct scsi_host_template driver_template = { 4381 .proc_name = "esp", 4382 .proc_info = esp_proc_info, 4383 .name = "Sun ESP 100/100a/200", 4384 .detect = esp_detect, 4385 .slave_alloc = esp_slave_alloc, 4386 .slave_destroy = esp_slave_destroy, 4387 .release = esp_release, 4388 .info = esp_info, 4389 .queuecommand = esp_queue, 4390 .eh_abort_handler = esp_abort, 4391 .eh_bus_reset_handler = esp_reset, 4392 .can_queue = 7, 4393 .this_id = 7, 4394 .sg_tablesize = SG_ALL, 4395 .cmd_per_lun = 1, 4396 .use_clustering = ENABLE_CLUSTERING, 4397}; 4398 4399#include "scsi_module.c" 4400 4401MODULE_DESCRIPTION("EnhancedScsiProcessor Sun SCSI driver"); 4402MODULE_AUTHOR("David S. Miller (davem@redhat.com)"); 4403MODULE_LICENSE("GPL"); 4404MODULE_VERSION(DRV_VERSION); 4405