at v2.6.16-rc4 52 lines 883 B view raw
1/* 2 * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved. 3 * 4 */ 5 6#ifndef _RTLX_H 7#define _RTLX_H_ 8 9#define LX_NODE_BASE 10 10 11#define MIPSCPU_INT_BASE 16 12#define MIPS_CPU_RTLX_IRQ 0 13 14#define RTLX_VERSION 1 15#define RTLX_xID 0x12345600 16#define RTLX_ID (RTLX_xID | RTLX_VERSION) 17#define RTLX_CHANNELS 8 18 19#define RTLX_BUFFER_SIZE 1024 20 21/* 22 * lx_state bits 23 */ 24#define RTLX_STATE_OPENED 1UL 25 26/* each channel supports read and write. 27 linux (vpe0) reads lx_buffer and writes rt_buffer 28 SP (vpe1) reads rt_buffer and writes lx_buffer 29*/ 30struct rtlx_channel { 31 unsigned long lx_state; 32 33 int buffer_size; 34 35 /* read and write indexes per buffer */ 36 int rt_write, rt_read; 37 char *rt_buffer; 38 39 int lx_write, lx_read; 40 char *lx_buffer; 41 42 void *queues; 43 44}; 45 46struct rtlx_info { 47 unsigned long id; 48 49 struct rtlx_channel channel[RTLX_CHANNELS]; 50}; 51 52#endif /* _RTLX_H_ */