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1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 Waldorf GMBH 7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle 8 * Copyright (C) 1996 Paul M. Antoine 9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 10 */ 11#ifndef _ASM_PROCESSOR_H 12#define _ASM_PROCESSOR_H 13 14#include <linux/config.h> 15#include <linux/threads.h> 16 17#include <asm/cachectl.h> 18#include <asm/cpu.h> 19#include <asm/cpu-info.h> 20#include <asm/mipsregs.h> 21#include <asm/prefetch.h> 22#include <asm/system.h> 23 24/* 25 * Return current * instruction pointer ("program counter"). 26 */ 27#define current_text_addr() ({ __label__ _l; _l: &&_l;}) 28 29/* 30 * System setup and hardware flags.. 31 */ 32extern void (*cpu_wait)(void); 33 34extern unsigned int vced_count, vcei_count; 35 36#ifdef CONFIG_32BIT 37/* 38 * User space process size: 2GB. This is hardcoded into a few places, 39 * so don't change it unless you know what you are doing. 40 */ 41#define TASK_SIZE 0x7fff8000UL 42 43/* 44 * This decides where the kernel will search for a free chunk of vm 45 * space during mmap's. 46 */ 47#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3)) 48#endif 49 50#ifdef CONFIG_64BIT 51/* 52 * User space process size: 1TB. This is hardcoded into a few places, 53 * so don't change it unless you know what you are doing. TASK_SIZE 54 * is limited to 1TB by the R4000 architecture; R10000 and better can 55 * support 16TB; the architectural reserve for future expansion is 56 * 8192EB ... 57 */ 58#define TASK_SIZE32 0x7fff8000UL 59#define TASK_SIZE 0x10000000000UL 60 61/* 62 * This decides where the kernel will search for a free chunk of vm 63 * space during mmap's. 64 */ 65#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \ 66 PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3)) 67#endif 68 69#define NUM_FPU_REGS 32 70 71typedef __u64 fpureg_t; 72 73struct mips_fpu_hard_struct { 74 fpureg_t fpr[NUM_FPU_REGS]; 75 unsigned int fcr31; 76}; 77 78/* 79 * It would be nice to add some more fields for emulator statistics, but there 80 * are a number of fixed offsets in offset.h and elsewhere that would have to 81 * be recalculated by hand. So the additional information will be private to 82 * the FPU emulator for now. See asm-mips/fpu_emulator.h. 83 */ 84 85struct mips_fpu_soft_struct { 86 fpureg_t fpr[NUM_FPU_REGS]; 87 unsigned int fcr31; 88}; 89 90union mips_fpu_union { 91 struct mips_fpu_hard_struct hard; 92 struct mips_fpu_soft_struct soft; 93}; 94 95#define INIT_FPU { \ 96 {{0,},} \ 97} 98 99#define NUM_DSP_REGS 6 100 101typedef __u32 dspreg_t; 102 103struct mips_dsp_state { 104 dspreg_t dspr[NUM_DSP_REGS]; 105 unsigned int dspcontrol; 106 unsigned short used_dsp; 107}; 108 109#define INIT_DSP {{0,},} 110 111typedef struct { 112 unsigned long seg; 113} mm_segment_t; 114 115#define ARCH_MIN_TASKALIGN 8 116 117struct mips_abi; 118 119/* 120 * If you change thread_struct remember to change the #defines below too! 121 */ 122struct thread_struct { 123 /* Saved main processor registers. */ 124 unsigned long reg16; 125 unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23; 126 unsigned long reg29, reg30, reg31; 127 128 /* Saved cp0 stuff. */ 129 unsigned long cp0_status; 130 131 /* Saved fpu/fpu emulator stuff. */ 132 union mips_fpu_union fpu; 133 134 /* Saved state of the DSP ASE, if available. */ 135 struct mips_dsp_state dsp; 136 137 /* Other stuff associated with the thread. */ 138 unsigned long cp0_badvaddr; /* Last user fault */ 139 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ 140 unsigned long error_code; 141 unsigned long trap_no; 142#define MF_FIXADE 1 /* Fix address errors in software */ 143#define MF_LOGADE 2 /* Log address errors to syslog */ 144#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */ 145#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */ 146 unsigned long mflags; 147 unsigned long irix_trampoline; /* Wheee... */ 148 unsigned long irix_oldctx; 149 struct mips_abi *abi; 150}; 151 152#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR) 153#define MF_O32 (MF_32BIT_REGS | MF_32BIT_ADDR) 154#define MF_N32 MF_32BIT_ADDR 155#define MF_N64 0 156 157#define INIT_THREAD { \ 158 /* \ 159 * saved main processor registers \ 160 */ \ 161 0, 0, 0, 0, 0, 0, 0, 0, \ 162 0, 0, 0, \ 163 /* \ 164 * saved cp0 stuff \ 165 */ \ 166 0, \ 167 /* \ 168 * saved fpu/fpu emulator stuff \ 169 */ \ 170 INIT_FPU, \ 171 /* \ 172 * saved dsp/dsp emulator stuff \ 173 */ \ 174 INIT_DSP, \ 175 /* \ 176 * Other stuff associated with the process \ 177 */ \ 178 0, 0, 0, 0, \ 179 /* \ 180 * For now the default is to fix address errors \ 181 */ \ 182 MF_FIXADE, 0, 0 \ 183} 184 185struct task_struct; 186 187/* Free all resources held by a thread. */ 188#define release_thread(thread) do { } while(0) 189 190/* Prepare to copy thread state - unlazy all lazy status */ 191#define prepare_to_copy(tsk) do { } while (0) 192 193extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 194 195extern unsigned long thread_saved_pc(struct task_struct *tsk); 196 197/* 198 * Do necessary setup to start up a newly executed thread. 199 */ 200extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp); 201 202unsigned long get_wchan(struct task_struct *p); 203 204#define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs)) 205#define __KSTK_TOS(tsk) ((unsigned long)(tsk->thread_info) + THREAD_SIZE - 32) 206#define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc))) 207#define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29]))) 208#define KSTK_STATUS(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_status))) 209 210#define cpu_relax() barrier() 211 212/* 213 * Return_address is a replacement for __builtin_return_address(count) 214 * which on certain architectures cannot reasonably be implemented in GCC 215 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386). 216 * Note that __builtin_return_address(x>=1) is forbidden because GCC 217 * aborts compilation on some CPUs. It's simply not possible to unwind 218 * some CPU's stackframes. 219 * 220 * __builtin_return_address works only for non-leaf functions. We avoid the 221 * overhead of a function call by forcing the compiler to save the return 222 * address register on the stack. 223 */ 224#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);}) 225 226#ifdef CONFIG_CPU_HAS_PREFETCH 227 228#define ARCH_HAS_PREFETCH 229 230extern inline void prefetch(const void *addr) 231{ 232 __asm__ __volatile__( 233 " .set mips4 \n" 234 " pref %0, (%1) \n" 235 " .set mips0 \n" 236 : 237 : "i" (Pref_Load), "r" (addr)); 238} 239 240#endif 241 242#endif /* _ASM_PROCESSOR_H */