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1/*
2 * File: mca.h
3 * Purpose: Machine check handling specific defines
4 *
5 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
6 * Copyright (C) Vijay Chander (vijay@engr.sgi.com)
7 * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
8 * Copyright (C) Russ Anderson (rja@sgi.com)
9 */
10
11#ifndef _ASM_IA64_MCA_H
12#define _ASM_IA64_MCA_H
13
14#if !defined(__ASSEMBLY__)
15
16#include <linux/interrupt.h>
17#include <linux/types.h>
18
19#include <asm/param.h>
20#include <asm/sal.h>
21#include <asm/processor.h>
22#include <asm/mca_asm.h>
23
24#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
25
26typedef struct ia64_fptr {
27 unsigned long fp;
28 unsigned long gp;
29} ia64_fptr_t;
30
31typedef union cmcv_reg_u {
32 u64 cmcv_regval;
33 struct {
34 u64 cmcr_vector : 8;
35 u64 cmcr_reserved1 : 4;
36 u64 cmcr_ignored1 : 1;
37 u64 cmcr_reserved2 : 3;
38 u64 cmcr_mask : 1;
39 u64 cmcr_ignored2 : 47;
40 } cmcv_reg_s;
41
42} cmcv_reg_t;
43
44#define cmcv_mask cmcv_reg_s.cmcr_mask
45#define cmcv_vector cmcv_reg_s.cmcr_vector
46
47enum {
48 IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
49 IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
50 IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
51};
52
53/* Information maintained by the MC infrastructure */
54typedef struct ia64_mc_info_s {
55 u64 imi_mca_handler;
56 size_t imi_mca_handler_size;
57 u64 imi_monarch_init_handler;
58 size_t imi_monarch_init_handler_size;
59 u64 imi_slave_init_handler;
60 size_t imi_slave_init_handler_size;
61 u8 imi_rendez_checkin[NR_CPUS];
62
63} ia64_mc_info_t;
64
65/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
66 * Besides the handover state, it also contains some saved registers from the
67 * time of the event.
68 * Note: mca_asm.S depends on the precise layout of this structure.
69 */
70
71struct ia64_sal_os_state {
72 /* SAL to OS, must be at offset 0 */
73 u64 os_gp; /* GP of the os registered with the SAL, physical */
74 u64 pal_proc; /* PAL_PROC entry point, physical */
75 u64 sal_proc; /* SAL_PROC entry point, physical */
76 u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */
77 u64 proc_state_param; /* from R18 */
78 u64 monarch; /* 1 for a monarch event, 0 for a slave */
79 /* common, must follow SAL to OS */
80 u64 sal_ra; /* Return address in SAL, physical */
81 u64 sal_gp; /* GP of the SAL - physical */
82 pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
83 /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
84 * Note: if the MCA/INIT recovery code wants to resume to a new context
85 * then it must change these values to reflect the new kernel stack.
86 */
87 u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
88 u64 prev_IA64_KR_CURRENT_STACK;
89 struct task_struct *prev_task; /* previous task, NULL if it is not useful */
90 /* Some interrupt registers are not saved in minstate, pt_regs or
91 * switch_stack. Because MCA/INIT can occur when interrupts are
92 * disabled, we need to save the additional interrupt registers over
93 * MCA/INIT and resume.
94 */
95 u64 isr;
96 u64 ifa;
97 u64 itir;
98 u64 iipa;
99 u64 iim;
100 u64 iha;
101 /* OS to SAL, must follow common */
102 u64 os_status; /* OS status to SAL, enum below */
103 u64 context; /* 0 if return to same context
104 1 if return to new context */
105};
106
107enum {
108 IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
109 IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
110 IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
111 IA64_MCA_HALT = -3 /* System to be halted by SAL */
112};
113
114enum {
115 IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
116 IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
117};
118
119enum {
120 IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
121 IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
122};
123
124/* Per-CPU MCA state that is too big for normal per-CPU variables. */
125
126struct ia64_mca_cpu {
127 u64 mca_stack[KERNEL_STACK_SIZE/8];
128 u64 init_stack[KERNEL_STACK_SIZE/8];
129};
130
131/* Array of physical addresses of each CPU's MCA area. */
132extern unsigned long __per_cpu_mca[NR_CPUS];
133
134extern void ia64_mca_init(void);
135extern void ia64_mca_cpu_init(void *);
136extern void ia64_os_mca_dispatch(void);
137extern void ia64_os_mca_dispatch_end(void);
138extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
139extern void ia64_init_handler(struct pt_regs *,
140 struct switch_stack *,
141 struct ia64_sal_os_state *);
142extern void ia64_monarch_init_handler(void);
143extern void ia64_slave_init_handler(void);
144extern void ia64_mca_cmc_vector_setup(void);
145extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
146extern void ia64_unreg_MCA_extension(void);
147extern u64 ia64_get_rnat(u64 *);
148
149#else /* __ASSEMBLY__ */
150
151#define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
152#define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
153#define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
154#define IA64_MCA_HALT -3 /* System to be halted by SAL */
155
156#define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
157#define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
158
159#define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
160#define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
161
162#endif /* !__ASSEMBLY__ */
163#endif /* _ASM_IA64_MCA_H */