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1/* 2 * linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver 3 * 4 * Copyright (C) 2004-2005 Pierre Ossman, All Rights Reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * 11 * Warning! 12 * 13 * Changes to the FIFO system should be done with extreme care since 14 * the hardware is full of bugs related to the FIFO. Known issues are: 15 * 16 * - FIFO size field in FSR is always zero. 17 * 18 * - FIFO interrupts tend not to work as they should. Interrupts are 19 * triggered only for full/empty events, not for threshold values. 20 * 21 * - On APIC systems the FIFO empty interrupt is sometimes lost. 22 */ 23 24#include <linux/config.h> 25#include <linux/module.h> 26#include <linux/moduleparam.h> 27#include <linux/init.h> 28#include <linux/ioport.h> 29#include <linux/platform_device.h> 30#include <linux/interrupt.h> 31#include <linux/dma-mapping.h> 32#include <linux/delay.h> 33#include <linux/pnp.h> 34#include <linux/highmem.h> 35#include <linux/mmc/host.h> 36#include <linux/mmc/protocol.h> 37 38#include <asm/io.h> 39#include <asm/dma.h> 40#include <asm/scatterlist.h> 41 42#include "wbsd.h" 43 44#define DRIVER_NAME "wbsd" 45#define DRIVER_VERSION "1.5" 46 47#ifdef CONFIG_MMC_DEBUG 48#define DBG(x...) \ 49 printk(KERN_DEBUG DRIVER_NAME ": " x) 50#define DBGF(f, x...) \ 51 printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__ , ##x) 52#else 53#define DBG(x...) do { } while (0) 54#define DBGF(x...) do { } while (0) 55#endif 56 57/* 58 * Device resources 59 */ 60 61#ifdef CONFIG_PNP 62 63static const struct pnp_device_id pnp_dev_table[] = { 64 { "WEC0517", 0 }, 65 { "WEC0518", 0 }, 66 { "", 0 }, 67}; 68 69MODULE_DEVICE_TABLE(pnp, pnp_dev_table); 70 71#endif /* CONFIG_PNP */ 72 73static const int config_ports[] = { 0x2E, 0x4E }; 74static const int unlock_codes[] = { 0x83, 0x87 }; 75 76static const int valid_ids[] = { 77 0x7112, 78 }; 79 80#ifdef CONFIG_PNP 81static unsigned int nopnp = 0; 82#else 83static const unsigned int nopnp = 1; 84#endif 85static unsigned int io = 0x248; 86static unsigned int irq = 6; 87static int dma = 2; 88 89/* 90 * Basic functions 91 */ 92 93static inline void wbsd_unlock_config(struct wbsd_host* host) 94{ 95 BUG_ON(host->config == 0); 96 97 outb(host->unlock_code, host->config); 98 outb(host->unlock_code, host->config); 99} 100 101static inline void wbsd_lock_config(struct wbsd_host* host) 102{ 103 BUG_ON(host->config == 0); 104 105 outb(LOCK_CODE, host->config); 106} 107 108static inline void wbsd_write_config(struct wbsd_host* host, u8 reg, u8 value) 109{ 110 BUG_ON(host->config == 0); 111 112 outb(reg, host->config); 113 outb(value, host->config + 1); 114} 115 116static inline u8 wbsd_read_config(struct wbsd_host* host, u8 reg) 117{ 118 BUG_ON(host->config == 0); 119 120 outb(reg, host->config); 121 return inb(host->config + 1); 122} 123 124static inline void wbsd_write_index(struct wbsd_host* host, u8 index, u8 value) 125{ 126 outb(index, host->base + WBSD_IDXR); 127 outb(value, host->base + WBSD_DATAR); 128} 129 130static inline u8 wbsd_read_index(struct wbsd_host* host, u8 index) 131{ 132 outb(index, host->base + WBSD_IDXR); 133 return inb(host->base + WBSD_DATAR); 134} 135 136/* 137 * Common routines 138 */ 139 140static void wbsd_init_device(struct wbsd_host* host) 141{ 142 u8 setup, ier; 143 144 /* 145 * Reset chip (SD/MMC part) and fifo. 146 */ 147 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 148 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; 149 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 150 151 /* 152 * Set DAT3 to input 153 */ 154 setup &= ~WBSD_DAT3_H; 155 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 156 host->flags &= ~WBSD_FIGNORE_DETECT; 157 158 /* 159 * Read back default clock. 160 */ 161 host->clk = wbsd_read_index(host, WBSD_IDX_CLK); 162 163 /* 164 * Power down port. 165 */ 166 outb(WBSD_POWER_N, host->base + WBSD_CSR); 167 168 /* 169 * Set maximum timeout. 170 */ 171 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); 172 173 /* 174 * Test for card presence 175 */ 176 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT) 177 host->flags |= WBSD_FCARD_PRESENT; 178 else 179 host->flags &= ~WBSD_FCARD_PRESENT; 180 181 /* 182 * Enable interesting interrupts. 183 */ 184 ier = 0; 185 ier |= WBSD_EINT_CARD; 186 ier |= WBSD_EINT_FIFO_THRE; 187 ier |= WBSD_EINT_CCRC; 188 ier |= WBSD_EINT_TIMEOUT; 189 ier |= WBSD_EINT_CRC; 190 ier |= WBSD_EINT_TC; 191 192 outb(ier, host->base + WBSD_EIR); 193 194 /* 195 * Clear interrupts. 196 */ 197 inb(host->base + WBSD_ISR); 198} 199 200static void wbsd_reset(struct wbsd_host* host) 201{ 202 u8 setup; 203 204 printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc)); 205 206 /* 207 * Soft reset of chip (SD/MMC part). 208 */ 209 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 210 setup |= WBSD_SOFT_RESET; 211 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 212} 213 214static void wbsd_request_end(struct wbsd_host* host, struct mmc_request* mrq) 215{ 216 unsigned long dmaflags; 217 218 DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode); 219 220 if (host->dma >= 0) 221 { 222 /* 223 * Release ISA DMA controller. 224 */ 225 dmaflags = claim_dma_lock(); 226 disable_dma(host->dma); 227 clear_dma_ff(host->dma); 228 release_dma_lock(dmaflags); 229 230 /* 231 * Disable DMA on host. 232 */ 233 wbsd_write_index(host, WBSD_IDX_DMA, 0); 234 } 235 236 host->mrq = NULL; 237 238 /* 239 * MMC layer might call back into the driver so first unlock. 240 */ 241 spin_unlock(&host->lock); 242 mmc_request_done(host->mmc, mrq); 243 spin_lock(&host->lock); 244} 245 246/* 247 * Scatter/gather functions 248 */ 249 250static inline void wbsd_init_sg(struct wbsd_host* host, struct mmc_data* data) 251{ 252 /* 253 * Get info. about SG list from data structure. 254 */ 255 host->cur_sg = data->sg; 256 host->num_sg = data->sg_len; 257 258 host->offset = 0; 259 host->remain = host->cur_sg->length; 260} 261 262static inline int wbsd_next_sg(struct wbsd_host* host) 263{ 264 /* 265 * Skip to next SG entry. 266 */ 267 host->cur_sg++; 268 host->num_sg--; 269 270 /* 271 * Any entries left? 272 */ 273 if (host->num_sg > 0) 274 { 275 host->offset = 0; 276 host->remain = host->cur_sg->length; 277 } 278 279 return host->num_sg; 280} 281 282static inline char* wbsd_kmap_sg(struct wbsd_host* host) 283{ 284 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) + 285 host->cur_sg->offset; 286 return host->mapped_sg; 287} 288 289static inline void wbsd_kunmap_sg(struct wbsd_host* host) 290{ 291 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ); 292} 293 294static inline void wbsd_sg_to_dma(struct wbsd_host* host, struct mmc_data* data) 295{ 296 unsigned int len, i, size; 297 struct scatterlist* sg; 298 char* dmabuf = host->dma_buffer; 299 char* sgbuf; 300 301 size = host->size; 302 303 sg = data->sg; 304 len = data->sg_len; 305 306 /* 307 * Just loop through all entries. Size might not 308 * be the entire list though so make sure that 309 * we do not transfer too much. 310 */ 311 for (i = 0;i < len;i++) 312 { 313 sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset; 314 if (size < sg[i].length) 315 memcpy(dmabuf, sgbuf, size); 316 else 317 memcpy(dmabuf, sgbuf, sg[i].length); 318 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); 319 dmabuf += sg[i].length; 320 321 if (size < sg[i].length) 322 size = 0; 323 else 324 size -= sg[i].length; 325 326 if (size == 0) 327 break; 328 } 329 330 /* 331 * Check that we didn't get a request to transfer 332 * more data than can fit into the SG list. 333 */ 334 335 BUG_ON(size != 0); 336 337 host->size -= size; 338} 339 340static inline void wbsd_dma_to_sg(struct wbsd_host* host, struct mmc_data* data) 341{ 342 unsigned int len, i, size; 343 struct scatterlist* sg; 344 char* dmabuf = host->dma_buffer; 345 char* sgbuf; 346 347 size = host->size; 348 349 sg = data->sg; 350 len = data->sg_len; 351 352 /* 353 * Just loop through all entries. Size might not 354 * be the entire list though so make sure that 355 * we do not transfer too much. 356 */ 357 for (i = 0;i < len;i++) 358 { 359 sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset; 360 if (size < sg[i].length) 361 memcpy(sgbuf, dmabuf, size); 362 else 363 memcpy(sgbuf, dmabuf, sg[i].length); 364 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); 365 dmabuf += sg[i].length; 366 367 if (size < sg[i].length) 368 size = 0; 369 else 370 size -= sg[i].length; 371 372 if (size == 0) 373 break; 374 } 375 376 /* 377 * Check that we didn't get a request to transfer 378 * more data than can fit into the SG list. 379 */ 380 381 BUG_ON(size != 0); 382 383 host->size -= size; 384} 385 386/* 387 * Command handling 388 */ 389 390static inline void wbsd_get_short_reply(struct wbsd_host* host, 391 struct mmc_command* cmd) 392{ 393 /* 394 * Correct response type? 395 */ 396 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) 397 { 398 cmd->error = MMC_ERR_INVALID; 399 return; 400 } 401 402 cmd->resp[0] = 403 wbsd_read_index(host, WBSD_IDX_RESP12) << 24; 404 cmd->resp[0] |= 405 wbsd_read_index(host, WBSD_IDX_RESP13) << 16; 406 cmd->resp[0] |= 407 wbsd_read_index(host, WBSD_IDX_RESP14) << 8; 408 cmd->resp[0] |= 409 wbsd_read_index(host, WBSD_IDX_RESP15) << 0; 410 cmd->resp[1] = 411 wbsd_read_index(host, WBSD_IDX_RESP16) << 24; 412} 413 414static inline void wbsd_get_long_reply(struct wbsd_host* host, 415 struct mmc_command* cmd) 416{ 417 int i; 418 419 /* 420 * Correct response type? 421 */ 422 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) 423 { 424 cmd->error = MMC_ERR_INVALID; 425 return; 426 } 427 428 for (i = 0;i < 4;i++) 429 { 430 cmd->resp[i] = 431 wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24; 432 cmd->resp[i] |= 433 wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16; 434 cmd->resp[i] |= 435 wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8; 436 cmd->resp[i] |= 437 wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0; 438 } 439} 440 441static void wbsd_send_command(struct wbsd_host* host, struct mmc_command* cmd) 442{ 443 int i; 444 u8 status, isr; 445 446 DBGF("Sending cmd (%x)\n", cmd->opcode); 447 448 /* 449 * Clear accumulated ISR. The interrupt routine 450 * will fill this one with events that occur during 451 * transfer. 452 */ 453 host->isr = 0; 454 455 /* 456 * Send the command (CRC calculated by host). 457 */ 458 outb(cmd->opcode, host->base + WBSD_CMDR); 459 for (i = 3;i >= 0;i--) 460 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); 461 462 cmd->error = MMC_ERR_NONE; 463 464 /* 465 * Wait for the request to complete. 466 */ 467 do { 468 status = wbsd_read_index(host, WBSD_IDX_STATUS); 469 } while (status & WBSD_CARDTRAFFIC); 470 471 /* 472 * Do we expect a reply? 473 */ 474 if ((cmd->flags & MMC_RSP_MASK) != MMC_RSP_NONE) 475 { 476 /* 477 * Read back status. 478 */ 479 isr = host->isr; 480 481 /* Card removed? */ 482 if (isr & WBSD_INT_CARD) 483 cmd->error = MMC_ERR_TIMEOUT; 484 /* Timeout? */ 485 else if (isr & WBSD_INT_TIMEOUT) 486 cmd->error = MMC_ERR_TIMEOUT; 487 /* CRC? */ 488 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC)) 489 cmd->error = MMC_ERR_BADCRC; 490 /* All ok */ 491 else 492 { 493 if ((cmd->flags & MMC_RSP_MASK) == MMC_RSP_SHORT) 494 wbsd_get_short_reply(host, cmd); 495 else 496 wbsd_get_long_reply(host, cmd); 497 } 498 } 499 500 DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error); 501} 502 503/* 504 * Data functions 505 */ 506 507static void wbsd_empty_fifo(struct wbsd_host* host) 508{ 509 struct mmc_data* data = host->mrq->cmd->data; 510 char* buffer; 511 int i, fsr, fifo; 512 513 /* 514 * Handle excessive data. 515 */ 516 if (data->bytes_xfered == host->size) 517 return; 518 519 buffer = wbsd_kmap_sg(host) + host->offset; 520 521 /* 522 * Drain the fifo. This has a tendency to loop longer 523 * than the FIFO length (usually one block). 524 */ 525 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) 526 { 527 /* 528 * The size field in the FSR is broken so we have to 529 * do some guessing. 530 */ 531 if (fsr & WBSD_FIFO_FULL) 532 fifo = 16; 533 else if (fsr & WBSD_FIFO_FUTHRE) 534 fifo = 8; 535 else 536 fifo = 1; 537 538 for (i = 0;i < fifo;i++) 539 { 540 *buffer = inb(host->base + WBSD_DFR); 541 buffer++; 542 host->offset++; 543 host->remain--; 544 545 data->bytes_xfered++; 546 547 /* 548 * Transfer done? 549 */ 550 if (data->bytes_xfered == host->size) 551 { 552 wbsd_kunmap_sg(host); 553 return; 554 } 555 556 /* 557 * End of scatter list entry? 558 */ 559 if (host->remain == 0) 560 { 561 wbsd_kunmap_sg(host); 562 563 /* 564 * Get next entry. Check if last. 565 */ 566 if (!wbsd_next_sg(host)) 567 { 568 /* 569 * We should never reach this point. 570 * It means that we're trying to 571 * transfer more blocks than can fit 572 * into the scatter list. 573 */ 574 BUG_ON(1); 575 576 host->size = data->bytes_xfered; 577 578 return; 579 } 580 581 buffer = wbsd_kmap_sg(host); 582 } 583 } 584 } 585 586 wbsd_kunmap_sg(host); 587 588 /* 589 * This is a very dirty hack to solve a 590 * hardware problem. The chip doesn't trigger 591 * FIFO threshold interrupts properly. 592 */ 593 if ((host->size - data->bytes_xfered) < 16) 594 tasklet_schedule(&host->fifo_tasklet); 595} 596 597static void wbsd_fill_fifo(struct wbsd_host* host) 598{ 599 struct mmc_data* data = host->mrq->cmd->data; 600 char* buffer; 601 int i, fsr, fifo; 602 603 /* 604 * Check that we aren't being called after the 605 * entire buffer has been transfered. 606 */ 607 if (data->bytes_xfered == host->size) 608 return; 609 610 buffer = wbsd_kmap_sg(host) + host->offset; 611 612 /* 613 * Fill the fifo. This has a tendency to loop longer 614 * than the FIFO length (usually one block). 615 */ 616 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) 617 { 618 /* 619 * The size field in the FSR is broken so we have to 620 * do some guessing. 621 */ 622 if (fsr & WBSD_FIFO_EMPTY) 623 fifo = 0; 624 else if (fsr & WBSD_FIFO_EMTHRE) 625 fifo = 8; 626 else 627 fifo = 15; 628 629 for (i = 16;i > fifo;i--) 630 { 631 outb(*buffer, host->base + WBSD_DFR); 632 buffer++; 633 host->offset++; 634 host->remain--; 635 636 data->bytes_xfered++; 637 638 /* 639 * Transfer done? 640 */ 641 if (data->bytes_xfered == host->size) 642 { 643 wbsd_kunmap_sg(host); 644 return; 645 } 646 647 /* 648 * End of scatter list entry? 649 */ 650 if (host->remain == 0) 651 { 652 wbsd_kunmap_sg(host); 653 654 /* 655 * Get next entry. Check if last. 656 */ 657 if (!wbsd_next_sg(host)) 658 { 659 /* 660 * We should never reach this point. 661 * It means that we're trying to 662 * transfer more blocks than can fit 663 * into the scatter list. 664 */ 665 BUG_ON(1); 666 667 host->size = data->bytes_xfered; 668 669 return; 670 } 671 672 buffer = wbsd_kmap_sg(host); 673 } 674 } 675 } 676 677 wbsd_kunmap_sg(host); 678 679 /* 680 * The controller stops sending interrupts for 681 * 'FIFO empty' under certain conditions. So we 682 * need to be a bit more pro-active. 683 */ 684 tasklet_schedule(&host->fifo_tasklet); 685} 686 687static void wbsd_prepare_data(struct wbsd_host* host, struct mmc_data* data) 688{ 689 u16 blksize; 690 u8 setup; 691 unsigned long dmaflags; 692 693 DBGF("blksz %04x blks %04x flags %08x\n", 694 1 << data->blksz_bits, data->blocks, data->flags); 695 DBGF("tsac %d ms nsac %d clk\n", 696 data->timeout_ns / 1000000, data->timeout_clks); 697 698 /* 699 * Calculate size. 700 */ 701 host->size = data->blocks << data->blksz_bits; 702 703 /* 704 * Check timeout values for overflow. 705 * (Yes, some cards cause this value to overflow). 706 */ 707 if (data->timeout_ns > 127000000) 708 wbsd_write_index(host, WBSD_IDX_TAAC, 127); 709 else 710 wbsd_write_index(host, WBSD_IDX_TAAC, data->timeout_ns/1000000); 711 712 if (data->timeout_clks > 255) 713 wbsd_write_index(host, WBSD_IDX_NSAC, 255); 714 else 715 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); 716 717 /* 718 * Inform the chip of how large blocks will be 719 * sent. It needs this to determine when to 720 * calculate CRC. 721 * 722 * Space for CRC must be included in the size. 723 * Two bytes are needed for each data line. 724 */ 725 if (host->bus_width == MMC_BUS_WIDTH_1) 726 { 727 blksize = (1 << data->blksz_bits) + 2; 728 729 wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0); 730 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); 731 } 732 else if (host->bus_width == MMC_BUS_WIDTH_4) 733 { 734 blksize = (1 << data->blksz_bits) + 2 * 4; 735 736 wbsd_write_index(host, WBSD_IDX_PBSMSB, ((blksize >> 4) & 0xF0) 737 | WBSD_DATA_WIDTH); 738 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); 739 } 740 else 741 { 742 data->error = MMC_ERR_INVALID; 743 return; 744 } 745 746 /* 747 * Clear the FIFO. This is needed even for DMA 748 * transfers since the chip still uses the FIFO 749 * internally. 750 */ 751 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 752 setup |= WBSD_FIFO_RESET; 753 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 754 755 /* 756 * DMA transfer? 757 */ 758 if (host->dma >= 0) 759 { 760 /* 761 * The buffer for DMA is only 64 kB. 762 */ 763 BUG_ON(host->size > 0x10000); 764 if (host->size > 0x10000) 765 { 766 data->error = MMC_ERR_INVALID; 767 return; 768 } 769 770 /* 771 * Transfer data from the SG list to 772 * the DMA buffer. 773 */ 774 if (data->flags & MMC_DATA_WRITE) 775 wbsd_sg_to_dma(host, data); 776 777 /* 778 * Initialise the ISA DMA controller. 779 */ 780 dmaflags = claim_dma_lock(); 781 disable_dma(host->dma); 782 clear_dma_ff(host->dma); 783 if (data->flags & MMC_DATA_READ) 784 set_dma_mode(host->dma, DMA_MODE_READ & ~0x40); 785 else 786 set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40); 787 set_dma_addr(host->dma, host->dma_addr); 788 set_dma_count(host->dma, host->size); 789 790 enable_dma(host->dma); 791 release_dma_lock(dmaflags); 792 793 /* 794 * Enable DMA on the host. 795 */ 796 wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE); 797 } 798 else 799 { 800 /* 801 * This flag is used to keep printk 802 * output to a minimum. 803 */ 804 host->firsterr = 1; 805 806 /* 807 * Initialise the SG list. 808 */ 809 wbsd_init_sg(host, data); 810 811 /* 812 * Turn off DMA. 813 */ 814 wbsd_write_index(host, WBSD_IDX_DMA, 0); 815 816 /* 817 * Set up FIFO threshold levels (and fill 818 * buffer if doing a write). 819 */ 820 if (data->flags & MMC_DATA_READ) 821 { 822 wbsd_write_index(host, WBSD_IDX_FIFOEN, 823 WBSD_FIFOEN_FULL | 8); 824 } 825 else 826 { 827 wbsd_write_index(host, WBSD_IDX_FIFOEN, 828 WBSD_FIFOEN_EMPTY | 8); 829 wbsd_fill_fifo(host); 830 } 831 } 832 833 data->error = MMC_ERR_NONE; 834} 835 836static void wbsd_finish_data(struct wbsd_host* host, struct mmc_data* data) 837{ 838 unsigned long dmaflags; 839 int count; 840 u8 status; 841 842 WARN_ON(host->mrq == NULL); 843 844 /* 845 * Send a stop command if needed. 846 */ 847 if (data->stop) 848 wbsd_send_command(host, data->stop); 849 850 /* 851 * Wait for the controller to leave data 852 * transfer state. 853 */ 854 do 855 { 856 status = wbsd_read_index(host, WBSD_IDX_STATUS); 857 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); 858 859 /* 860 * DMA transfer? 861 */ 862 if (host->dma >= 0) 863 { 864 /* 865 * Disable DMA on the host. 866 */ 867 wbsd_write_index(host, WBSD_IDX_DMA, 0); 868 869 /* 870 * Turn of ISA DMA controller. 871 */ 872 dmaflags = claim_dma_lock(); 873 disable_dma(host->dma); 874 clear_dma_ff(host->dma); 875 count = get_dma_residue(host->dma); 876 release_dma_lock(dmaflags); 877 878 /* 879 * Any leftover data? 880 */ 881 if (count) 882 { 883 printk(KERN_ERR "%s: Incomplete DMA transfer. " 884 "%d bytes left.\n", 885 mmc_hostname(host->mmc), count); 886 887 data->error = MMC_ERR_FAILED; 888 } 889 else 890 { 891 /* 892 * Transfer data from DMA buffer to 893 * SG list. 894 */ 895 if (data->flags & MMC_DATA_READ) 896 wbsd_dma_to_sg(host, data); 897 898 data->bytes_xfered = host->size; 899 } 900 } 901 902 DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered); 903 904 wbsd_request_end(host, host->mrq); 905} 906 907/*****************************************************************************\ 908 * * 909 * MMC layer callbacks * 910 * * 911\*****************************************************************************/ 912 913static void wbsd_request(struct mmc_host* mmc, struct mmc_request* mrq) 914{ 915 struct wbsd_host* host = mmc_priv(mmc); 916 struct mmc_command* cmd; 917 918 /* 919 * Disable tasklets to avoid a deadlock. 920 */ 921 spin_lock_bh(&host->lock); 922 923 BUG_ON(host->mrq != NULL); 924 925 cmd = mrq->cmd; 926 927 host->mrq = mrq; 928 929 /* 930 * If there is no card in the slot then 931 * timeout immediatly. 932 */ 933 if (!(host->flags & WBSD_FCARD_PRESENT)) 934 { 935 cmd->error = MMC_ERR_TIMEOUT; 936 goto done; 937 } 938 939 /* 940 * Does the request include data? 941 */ 942 if (cmd->data) 943 { 944 wbsd_prepare_data(host, cmd->data); 945 946 if (cmd->data->error != MMC_ERR_NONE) 947 goto done; 948 } 949 950 wbsd_send_command(host, cmd); 951 952 /* 953 * If this is a data transfer the request 954 * will be finished after the data has 955 * transfered. 956 */ 957 if (cmd->data && (cmd->error == MMC_ERR_NONE)) 958 { 959 /* 960 * Dirty fix for hardware bug. 961 */ 962 if (host->dma == -1) 963 tasklet_schedule(&host->fifo_tasklet); 964 965 spin_unlock_bh(&host->lock); 966 967 return; 968 } 969 970done: 971 wbsd_request_end(host, mrq); 972 973 spin_unlock_bh(&host->lock); 974} 975 976static void wbsd_set_ios(struct mmc_host* mmc, struct mmc_ios* ios) 977{ 978 struct wbsd_host* host = mmc_priv(mmc); 979 u8 clk, setup, pwr; 980 981 DBGF("clock %uHz busmode %u powermode %u cs %u Vdd %u width %u\n", 982 ios->clock, ios->bus_mode, ios->power_mode, ios->chip_select, 983 ios->vdd, ios->bus_width); 984 985 spin_lock_bh(&host->lock); 986 987 /* 988 * Reset the chip on each power off. 989 * Should clear out any weird states. 990 */ 991 if (ios->power_mode == MMC_POWER_OFF) 992 wbsd_init_device(host); 993 994 if (ios->clock >= 24000000) 995 clk = WBSD_CLK_24M; 996 else if (ios->clock >= 16000000) 997 clk = WBSD_CLK_16M; 998 else if (ios->clock >= 12000000) 999 clk = WBSD_CLK_12M; 1000 else 1001 clk = WBSD_CLK_375K; 1002 1003 /* 1004 * Only write to the clock register when 1005 * there is an actual change. 1006 */ 1007 if (clk != host->clk) 1008 { 1009 wbsd_write_index(host, WBSD_IDX_CLK, clk); 1010 host->clk = clk; 1011 } 1012 1013 /* 1014 * Power up card. 1015 */ 1016 if (ios->power_mode != MMC_POWER_OFF) 1017 { 1018 pwr = inb(host->base + WBSD_CSR); 1019 pwr &= ~WBSD_POWER_N; 1020 outb(pwr, host->base + WBSD_CSR); 1021 } 1022 1023 /* 1024 * MMC cards need to have pin 1 high during init. 1025 * It wreaks havoc with the card detection though so 1026 * that needs to be disabled. 1027 */ 1028 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 1029 if (ios->chip_select == MMC_CS_HIGH) 1030 { 1031 BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1); 1032 setup |= WBSD_DAT3_H; 1033 host->flags |= WBSD_FIGNORE_DETECT; 1034 } 1035 else 1036 { 1037 if (setup & WBSD_DAT3_H) 1038 { 1039 setup &= ~WBSD_DAT3_H; 1040 1041 /* 1042 * We cannot resume card detection immediatly 1043 * because of capacitance and delays in the chip. 1044 */ 1045 mod_timer(&host->ignore_timer, jiffies + HZ/100); 1046 } 1047 } 1048 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 1049 1050 /* 1051 * Store bus width for later. Will be used when 1052 * setting up the data transfer. 1053 */ 1054 host->bus_width = ios->bus_width; 1055 1056 spin_unlock_bh(&host->lock); 1057} 1058 1059static int wbsd_get_ro(struct mmc_host* mmc) 1060{ 1061 struct wbsd_host* host = mmc_priv(mmc); 1062 u8 csr; 1063 1064 spin_lock_bh(&host->lock); 1065 1066 csr = inb(host->base + WBSD_CSR); 1067 csr |= WBSD_MSLED; 1068 outb(csr, host->base + WBSD_CSR); 1069 1070 mdelay(1); 1071 1072 csr = inb(host->base + WBSD_CSR); 1073 csr &= ~WBSD_MSLED; 1074 outb(csr, host->base + WBSD_CSR); 1075 1076 spin_unlock_bh(&host->lock); 1077 1078 return csr & WBSD_WRPT; 1079} 1080 1081static struct mmc_host_ops wbsd_ops = { 1082 .request = wbsd_request, 1083 .set_ios = wbsd_set_ios, 1084 .get_ro = wbsd_get_ro, 1085}; 1086 1087/*****************************************************************************\ 1088 * * 1089 * Interrupt handling * 1090 * * 1091\*****************************************************************************/ 1092 1093/* 1094 * Helper function to reset detection ignore 1095 */ 1096 1097static void wbsd_reset_ignore(unsigned long data) 1098{ 1099 struct wbsd_host *host = (struct wbsd_host*)data; 1100 1101 BUG_ON(host == NULL); 1102 1103 DBG("Resetting card detection ignore\n"); 1104 1105 spin_lock_bh(&host->lock); 1106 1107 host->flags &= ~WBSD_FIGNORE_DETECT; 1108 1109 /* 1110 * Card status might have changed during the 1111 * blackout. 1112 */ 1113 tasklet_schedule(&host->card_tasklet); 1114 1115 spin_unlock_bh(&host->lock); 1116} 1117 1118/* 1119 * Tasklets 1120 */ 1121 1122static inline struct mmc_data* wbsd_get_data(struct wbsd_host* host) 1123{ 1124 WARN_ON(!host->mrq); 1125 if (!host->mrq) 1126 return NULL; 1127 1128 WARN_ON(!host->mrq->cmd); 1129 if (!host->mrq->cmd) 1130 return NULL; 1131 1132 WARN_ON(!host->mrq->cmd->data); 1133 if (!host->mrq->cmd->data) 1134 return NULL; 1135 1136 return host->mrq->cmd->data; 1137} 1138 1139static void wbsd_tasklet_card(unsigned long param) 1140{ 1141 struct wbsd_host* host = (struct wbsd_host*)param; 1142 u8 csr; 1143 int delay = -1; 1144 1145 spin_lock(&host->lock); 1146 1147 if (host->flags & WBSD_FIGNORE_DETECT) 1148 { 1149 spin_unlock(&host->lock); 1150 return; 1151 } 1152 1153 csr = inb(host->base + WBSD_CSR); 1154 WARN_ON(csr == 0xff); 1155 1156 if (csr & WBSD_CARDPRESENT) 1157 { 1158 if (!(host->flags & WBSD_FCARD_PRESENT)) 1159 { 1160 DBG("Card inserted\n"); 1161 host->flags |= WBSD_FCARD_PRESENT; 1162 1163 delay = 500; 1164 } 1165 } 1166 else if (host->flags & WBSD_FCARD_PRESENT) 1167 { 1168 DBG("Card removed\n"); 1169 host->flags &= ~WBSD_FCARD_PRESENT; 1170 1171 if (host->mrq) 1172 { 1173 printk(KERN_ERR "%s: Card removed during transfer!\n", 1174 mmc_hostname(host->mmc)); 1175 wbsd_reset(host); 1176 1177 host->mrq->cmd->error = MMC_ERR_FAILED; 1178 tasklet_schedule(&host->finish_tasklet); 1179 } 1180 1181 delay = 0; 1182 } 1183 1184 /* 1185 * Unlock first since we might get a call back. 1186 */ 1187 1188 spin_unlock(&host->lock); 1189 1190 if (delay != -1) 1191 mmc_detect_change(host->mmc, msecs_to_jiffies(delay)); 1192} 1193 1194static void wbsd_tasklet_fifo(unsigned long param) 1195{ 1196 struct wbsd_host* host = (struct wbsd_host*)param; 1197 struct mmc_data* data; 1198 1199 spin_lock(&host->lock); 1200 1201 if (!host->mrq) 1202 goto end; 1203 1204 data = wbsd_get_data(host); 1205 if (!data) 1206 goto end; 1207 1208 if (data->flags & MMC_DATA_WRITE) 1209 wbsd_fill_fifo(host); 1210 else 1211 wbsd_empty_fifo(host); 1212 1213 /* 1214 * Done? 1215 */ 1216 if (host->size == data->bytes_xfered) 1217 { 1218 wbsd_write_index(host, WBSD_IDX_FIFOEN, 0); 1219 tasklet_schedule(&host->finish_tasklet); 1220 } 1221 1222end: 1223 spin_unlock(&host->lock); 1224} 1225 1226static void wbsd_tasklet_crc(unsigned long param) 1227{ 1228 struct wbsd_host* host = (struct wbsd_host*)param; 1229 struct mmc_data* data; 1230 1231 spin_lock(&host->lock); 1232 1233 if (!host->mrq) 1234 goto end; 1235 1236 data = wbsd_get_data(host); 1237 if (!data) 1238 goto end; 1239 1240 DBGF("CRC error\n"); 1241 1242 data->error = MMC_ERR_BADCRC; 1243 1244 tasklet_schedule(&host->finish_tasklet); 1245 1246end: 1247 spin_unlock(&host->lock); 1248} 1249 1250static void wbsd_tasklet_timeout(unsigned long param) 1251{ 1252 struct wbsd_host* host = (struct wbsd_host*)param; 1253 struct mmc_data* data; 1254 1255 spin_lock(&host->lock); 1256 1257 if (!host->mrq) 1258 goto end; 1259 1260 data = wbsd_get_data(host); 1261 if (!data) 1262 goto end; 1263 1264 DBGF("Timeout\n"); 1265 1266 data->error = MMC_ERR_TIMEOUT; 1267 1268 tasklet_schedule(&host->finish_tasklet); 1269 1270end: 1271 spin_unlock(&host->lock); 1272} 1273 1274static void wbsd_tasklet_finish(unsigned long param) 1275{ 1276 struct wbsd_host* host = (struct wbsd_host*)param; 1277 struct mmc_data* data; 1278 1279 spin_lock(&host->lock); 1280 1281 WARN_ON(!host->mrq); 1282 if (!host->mrq) 1283 goto end; 1284 1285 data = wbsd_get_data(host); 1286 if (!data) 1287 goto end; 1288 1289 wbsd_finish_data(host, data); 1290 1291end: 1292 spin_unlock(&host->lock); 1293} 1294 1295static void wbsd_tasklet_block(unsigned long param) 1296{ 1297 struct wbsd_host* host = (struct wbsd_host*)param; 1298 struct mmc_data* data; 1299 1300 spin_lock(&host->lock); 1301 1302 if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) != 1303 WBSD_CRC_OK) 1304 { 1305 data = wbsd_get_data(host); 1306 if (!data) 1307 goto end; 1308 1309 DBGF("CRC error\n"); 1310 1311 data->error = MMC_ERR_BADCRC; 1312 1313 tasklet_schedule(&host->finish_tasklet); 1314 } 1315 1316end: 1317 spin_unlock(&host->lock); 1318} 1319 1320/* 1321 * Interrupt handling 1322 */ 1323 1324static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs) 1325{ 1326 struct wbsd_host* host = dev_id; 1327 int isr; 1328 1329 isr = inb(host->base + WBSD_ISR); 1330 1331 /* 1332 * Was it actually our hardware that caused the interrupt? 1333 */ 1334 if (isr == 0xff || isr == 0x00) 1335 return IRQ_NONE; 1336 1337 host->isr |= isr; 1338 1339 /* 1340 * Schedule tasklets as needed. 1341 */ 1342 if (isr & WBSD_INT_CARD) 1343 tasklet_schedule(&host->card_tasklet); 1344 if (isr & WBSD_INT_FIFO_THRE) 1345 tasklet_schedule(&host->fifo_tasklet); 1346 if (isr & WBSD_INT_CRC) 1347 tasklet_hi_schedule(&host->crc_tasklet); 1348 if (isr & WBSD_INT_TIMEOUT) 1349 tasklet_hi_schedule(&host->timeout_tasklet); 1350 if (isr & WBSD_INT_BUSYEND) 1351 tasklet_hi_schedule(&host->block_tasklet); 1352 if (isr & WBSD_INT_TC) 1353 tasklet_schedule(&host->finish_tasklet); 1354 1355 return IRQ_HANDLED; 1356} 1357 1358/*****************************************************************************\ 1359 * * 1360 * Device initialisation and shutdown * 1361 * * 1362\*****************************************************************************/ 1363 1364/* 1365 * Allocate/free MMC structure. 1366 */ 1367 1368static int __devinit wbsd_alloc_mmc(struct device* dev) 1369{ 1370 struct mmc_host* mmc; 1371 struct wbsd_host* host; 1372 1373 /* 1374 * Allocate MMC structure. 1375 */ 1376 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); 1377 if (!mmc) 1378 return -ENOMEM; 1379 1380 host = mmc_priv(mmc); 1381 host->mmc = mmc; 1382 1383 host->dma = -1; 1384 1385 /* 1386 * Set host parameters. 1387 */ 1388 mmc->ops = &wbsd_ops; 1389 mmc->f_min = 375000; 1390 mmc->f_max = 24000000; 1391 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 1392 mmc->caps = MMC_CAP_4_BIT_DATA; 1393 1394 spin_lock_init(&host->lock); 1395 1396 /* 1397 * Set up timers 1398 */ 1399 init_timer(&host->ignore_timer); 1400 host->ignore_timer.data = (unsigned long)host; 1401 host->ignore_timer.function = wbsd_reset_ignore; 1402 1403 /* 1404 * Maximum number of segments. Worst case is one sector per segment 1405 * so this will be 64kB/512. 1406 */ 1407 mmc->max_hw_segs = 128; 1408 mmc->max_phys_segs = 128; 1409 1410 /* 1411 * Maximum number of sectors in one transfer. Also limited by 64kB 1412 * buffer. 1413 */ 1414 mmc->max_sectors = 128; 1415 1416 /* 1417 * Maximum segment size. Could be one segment with the maximum number 1418 * of segments. 1419 */ 1420 mmc->max_seg_size = mmc->max_sectors * 512; 1421 1422 dev_set_drvdata(dev, mmc); 1423 1424 return 0; 1425} 1426 1427static void __devexit wbsd_free_mmc(struct device* dev) 1428{ 1429 struct mmc_host* mmc; 1430 struct wbsd_host* host; 1431 1432 mmc = dev_get_drvdata(dev); 1433 if (!mmc) 1434 return; 1435 1436 host = mmc_priv(mmc); 1437 BUG_ON(host == NULL); 1438 1439 del_timer_sync(&host->ignore_timer); 1440 1441 mmc_free_host(mmc); 1442 1443 dev_set_drvdata(dev, NULL); 1444} 1445 1446/* 1447 * Scan for known chip id:s 1448 */ 1449 1450static int __devinit wbsd_scan(struct wbsd_host* host) 1451{ 1452 int i, j, k; 1453 int id; 1454 1455 /* 1456 * Iterate through all ports, all codes to 1457 * find hardware that is in our known list. 1458 */ 1459 for (i = 0;i < sizeof(config_ports)/sizeof(int);i++) 1460 { 1461 if (!request_region(config_ports[i], 2, DRIVER_NAME)) 1462 continue; 1463 1464 for (j = 0;j < sizeof(unlock_codes)/sizeof(int);j++) 1465 { 1466 id = 0xFFFF; 1467 1468 host->config = config_ports[i]; 1469 host->unlock_code = unlock_codes[j]; 1470 1471 wbsd_unlock_config(host); 1472 1473 outb(WBSD_CONF_ID_HI, config_ports[i]); 1474 id = inb(config_ports[i] + 1) << 8; 1475 1476 outb(WBSD_CONF_ID_LO, config_ports[i]); 1477 id |= inb(config_ports[i] + 1); 1478 1479 wbsd_lock_config(host); 1480 1481 for (k = 0;k < sizeof(valid_ids)/sizeof(int);k++) 1482 { 1483 if (id == valid_ids[k]) 1484 { 1485 host->chip_id = id; 1486 1487 return 0; 1488 } 1489 } 1490 1491 if (id != 0xFFFF) 1492 { 1493 DBG("Unknown hardware (id %x) found at %x\n", 1494 id, config_ports[i]); 1495 } 1496 } 1497 1498 release_region(config_ports[i], 2); 1499 } 1500 1501 host->config = 0; 1502 host->unlock_code = 0; 1503 1504 return -ENODEV; 1505} 1506 1507/* 1508 * Allocate/free io port ranges 1509 */ 1510 1511static int __devinit wbsd_request_region(struct wbsd_host* host, int base) 1512{ 1513 if (io & 0x7) 1514 return -EINVAL; 1515 1516 if (!request_region(base, 8, DRIVER_NAME)) 1517 return -EIO; 1518 1519 host->base = io; 1520 1521 return 0; 1522} 1523 1524static void __devexit wbsd_release_regions(struct wbsd_host* host) 1525{ 1526 if (host->base) 1527 release_region(host->base, 8); 1528 1529 host->base = 0; 1530 1531 if (host->config) 1532 release_region(host->config, 2); 1533 1534 host->config = 0; 1535} 1536 1537/* 1538 * Allocate/free DMA port and buffer 1539 */ 1540 1541static void __devinit wbsd_request_dma(struct wbsd_host* host, int dma) 1542{ 1543 if (dma < 0) 1544 return; 1545 1546 if (request_dma(dma, DRIVER_NAME)) 1547 goto err; 1548 1549 /* 1550 * We need to allocate a special buffer in 1551 * order for ISA to be able to DMA to it. 1552 */ 1553 host->dma_buffer = kmalloc(WBSD_DMA_SIZE, 1554 GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN); 1555 if (!host->dma_buffer) 1556 goto free; 1557 1558 /* 1559 * Translate the address to a physical address. 1560 */ 1561 host->dma_addr = dma_map_single(host->mmc->dev, host->dma_buffer, 1562 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); 1563 1564 /* 1565 * ISA DMA must be aligned on a 64k basis. 1566 */ 1567 if ((host->dma_addr & 0xffff) != 0) 1568 goto kfree; 1569 /* 1570 * ISA cannot access memory above 16 MB. 1571 */ 1572 else if (host->dma_addr >= 0x1000000) 1573 goto kfree; 1574 1575 host->dma = dma; 1576 1577 return; 1578 1579kfree: 1580 /* 1581 * If we've gotten here then there is some kind of alignment bug 1582 */ 1583 BUG_ON(1); 1584 1585 dma_unmap_single(host->mmc->dev, host->dma_addr, WBSD_DMA_SIZE, 1586 DMA_BIDIRECTIONAL); 1587 host->dma_addr = (dma_addr_t)NULL; 1588 1589 kfree(host->dma_buffer); 1590 host->dma_buffer = NULL; 1591 1592free: 1593 free_dma(dma); 1594 1595err: 1596 printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. " 1597 "Falling back on FIFO.\n", dma); 1598} 1599 1600static void __devexit wbsd_release_dma(struct wbsd_host* host) 1601{ 1602 if (host->dma_addr) 1603 dma_unmap_single(host->mmc->dev, host->dma_addr, WBSD_DMA_SIZE, 1604 DMA_BIDIRECTIONAL); 1605 kfree(host->dma_buffer); 1606 if (host->dma >= 0) 1607 free_dma(host->dma); 1608 1609 host->dma = -1; 1610 host->dma_buffer = NULL; 1611 host->dma_addr = (dma_addr_t)NULL; 1612} 1613 1614/* 1615 * Allocate/free IRQ. 1616 */ 1617 1618static int __devinit wbsd_request_irq(struct wbsd_host* host, int irq) 1619{ 1620 int ret; 1621 1622 /* 1623 * Allocate interrupt. 1624 */ 1625 1626 ret = request_irq(irq, wbsd_irq, SA_SHIRQ, DRIVER_NAME, host); 1627 if (ret) 1628 return ret; 1629 1630 host->irq = irq; 1631 1632 /* 1633 * Set up tasklets. 1634 */ 1635 tasklet_init(&host->card_tasklet, wbsd_tasklet_card, (unsigned long)host); 1636 tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, (unsigned long)host); 1637 tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, (unsigned long)host); 1638 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, (unsigned long)host); 1639 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, (unsigned long)host); 1640 tasklet_init(&host->block_tasklet, wbsd_tasklet_block, (unsigned long)host); 1641 1642 return 0; 1643} 1644 1645static void __devexit wbsd_release_irq(struct wbsd_host* host) 1646{ 1647 if (!host->irq) 1648 return; 1649 1650 free_irq(host->irq, host); 1651 1652 host->irq = 0; 1653 1654 tasklet_kill(&host->card_tasklet); 1655 tasklet_kill(&host->fifo_tasklet); 1656 tasklet_kill(&host->crc_tasklet); 1657 tasklet_kill(&host->timeout_tasklet); 1658 tasklet_kill(&host->finish_tasklet); 1659 tasklet_kill(&host->block_tasklet); 1660} 1661 1662/* 1663 * Allocate all resources for the host. 1664 */ 1665 1666static int __devinit wbsd_request_resources(struct wbsd_host* host, 1667 int base, int irq, int dma) 1668{ 1669 int ret; 1670 1671 /* 1672 * Allocate I/O ports. 1673 */ 1674 ret = wbsd_request_region(host, base); 1675 if (ret) 1676 return ret; 1677 1678 /* 1679 * Allocate interrupt. 1680 */ 1681 ret = wbsd_request_irq(host, irq); 1682 if (ret) 1683 return ret; 1684 1685 /* 1686 * Allocate DMA. 1687 */ 1688 wbsd_request_dma(host, dma); 1689 1690 return 0; 1691} 1692 1693/* 1694 * Release all resources for the host. 1695 */ 1696 1697static void __devexit wbsd_release_resources(struct wbsd_host* host) 1698{ 1699 wbsd_release_dma(host); 1700 wbsd_release_irq(host); 1701 wbsd_release_regions(host); 1702} 1703 1704/* 1705 * Configure the resources the chip should use. 1706 */ 1707 1708static void wbsd_chip_config(struct wbsd_host* host) 1709{ 1710 wbsd_unlock_config(host); 1711 1712 /* 1713 * Reset the chip. 1714 */ 1715 wbsd_write_config(host, WBSD_CONF_SWRST, 1); 1716 wbsd_write_config(host, WBSD_CONF_SWRST, 0); 1717 1718 /* 1719 * Select SD/MMC function. 1720 */ 1721 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); 1722 1723 /* 1724 * Set up card detection. 1725 */ 1726 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); 1727 1728 /* 1729 * Configure chip 1730 */ 1731 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); 1732 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); 1733 1734 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); 1735 1736 if (host->dma >= 0) 1737 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); 1738 1739 /* 1740 * Enable and power up chip. 1741 */ 1742 wbsd_write_config(host, WBSD_CONF_ENABLE, 1); 1743 wbsd_write_config(host, WBSD_CONF_POWER, 0x20); 1744 1745 wbsd_lock_config(host); 1746} 1747 1748/* 1749 * Check that configured resources are correct. 1750 */ 1751 1752static int wbsd_chip_validate(struct wbsd_host* host) 1753{ 1754 int base, irq, dma; 1755 1756 wbsd_unlock_config(host); 1757 1758 /* 1759 * Select SD/MMC function. 1760 */ 1761 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); 1762 1763 /* 1764 * Read configuration. 1765 */ 1766 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; 1767 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); 1768 1769 irq = wbsd_read_config(host, WBSD_CONF_IRQ); 1770 1771 dma = wbsd_read_config(host, WBSD_CONF_DRQ); 1772 1773 wbsd_lock_config(host); 1774 1775 /* 1776 * Validate against given configuration. 1777 */ 1778 if (base != host->base) 1779 return 0; 1780 if (irq != host->irq) 1781 return 0; 1782 if ((dma != host->dma) && (host->dma != -1)) 1783 return 0; 1784 1785 return 1; 1786} 1787 1788/* 1789 * Powers down the SD function 1790 */ 1791 1792static void wbsd_chip_poweroff(struct wbsd_host* host) 1793{ 1794 wbsd_unlock_config(host); 1795 1796 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); 1797 wbsd_write_config(host, WBSD_CONF_ENABLE, 0); 1798 1799 wbsd_lock_config(host); 1800} 1801 1802/*****************************************************************************\ 1803 * * 1804 * Devices setup and shutdown * 1805 * * 1806\*****************************************************************************/ 1807 1808static int __devinit wbsd_init(struct device* dev, int base, int irq, int dma, 1809 int pnp) 1810{ 1811 struct wbsd_host* host = NULL; 1812 struct mmc_host* mmc = NULL; 1813 int ret; 1814 1815 ret = wbsd_alloc_mmc(dev); 1816 if (ret) 1817 return ret; 1818 1819 mmc = dev_get_drvdata(dev); 1820 host = mmc_priv(mmc); 1821 1822 /* 1823 * Scan for hardware. 1824 */ 1825 ret = wbsd_scan(host); 1826 if (ret) 1827 { 1828 if (pnp && (ret == -ENODEV)) 1829 { 1830 printk(KERN_WARNING DRIVER_NAME 1831 ": Unable to confirm device presence. You may " 1832 "experience lock-ups.\n"); 1833 } 1834 else 1835 { 1836 wbsd_free_mmc(dev); 1837 return ret; 1838 } 1839 } 1840 1841 /* 1842 * Request resources. 1843 */ 1844 ret = wbsd_request_resources(host, io, irq, dma); 1845 if (ret) 1846 { 1847 wbsd_release_resources(host); 1848 wbsd_free_mmc(dev); 1849 return ret; 1850 } 1851 1852 /* 1853 * See if chip needs to be configured. 1854 */ 1855 if (pnp) 1856 { 1857 if ((host->config != 0) && !wbsd_chip_validate(host)) 1858 { 1859 printk(KERN_WARNING DRIVER_NAME 1860 ": PnP active but chip not configured! " 1861 "You probably have a buggy BIOS. " 1862 "Configuring chip manually.\n"); 1863 wbsd_chip_config(host); 1864 } 1865 } 1866 else 1867 wbsd_chip_config(host); 1868 1869 /* 1870 * Power Management stuff. No idea how this works. 1871 * Not tested. 1872 */ 1873#ifdef CONFIG_PM 1874 if (host->config) 1875 { 1876 wbsd_unlock_config(host); 1877 wbsd_write_config(host, WBSD_CONF_PME, 0xA0); 1878 wbsd_lock_config(host); 1879 } 1880#endif 1881 /* 1882 * Allow device to initialise itself properly. 1883 */ 1884 mdelay(5); 1885 1886 /* 1887 * Reset the chip into a known state. 1888 */ 1889 wbsd_init_device(host); 1890 1891 mmc_add_host(mmc); 1892 1893 printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc)); 1894 if (host->chip_id != 0) 1895 printk(" id %x", (int)host->chip_id); 1896 printk(" at 0x%x irq %d", (int)host->base, (int)host->irq); 1897 if (host->dma >= 0) 1898 printk(" dma %d", (int)host->dma); 1899 else 1900 printk(" FIFO"); 1901 if (pnp) 1902 printk(" PnP"); 1903 printk("\n"); 1904 1905 return 0; 1906} 1907 1908static void __devexit wbsd_shutdown(struct device* dev, int pnp) 1909{ 1910 struct mmc_host* mmc = dev_get_drvdata(dev); 1911 struct wbsd_host* host; 1912 1913 if (!mmc) 1914 return; 1915 1916 host = mmc_priv(mmc); 1917 1918 mmc_remove_host(mmc); 1919 1920 /* 1921 * Power down the SD/MMC function. 1922 */ 1923 if (!pnp) 1924 wbsd_chip_poweroff(host); 1925 1926 wbsd_release_resources(host); 1927 1928 wbsd_free_mmc(dev); 1929} 1930 1931/* 1932 * Non-PnP 1933 */ 1934 1935static int __devinit wbsd_probe(struct platform_device* dev) 1936{ 1937 return wbsd_init(&dev->dev, io, irq, dma, 0); 1938} 1939 1940static int __devexit wbsd_remove(struct platform_device* dev) 1941{ 1942 wbsd_shutdown(&dev->dev, 0); 1943 1944 return 0; 1945} 1946 1947/* 1948 * PnP 1949 */ 1950 1951#ifdef CONFIG_PNP 1952 1953static int __devinit 1954wbsd_pnp_probe(struct pnp_dev * pnpdev, const struct pnp_device_id *dev_id) 1955{ 1956 int io, irq, dma; 1957 1958 /* 1959 * Get resources from PnP layer. 1960 */ 1961 io = pnp_port_start(pnpdev, 0); 1962 irq = pnp_irq(pnpdev, 0); 1963 if (pnp_dma_valid(pnpdev, 0)) 1964 dma = pnp_dma(pnpdev, 0); 1965 else 1966 dma = -1; 1967 1968 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); 1969 1970 return wbsd_init(&pnpdev->dev, io, irq, dma, 1); 1971} 1972 1973static void __devexit wbsd_pnp_remove(struct pnp_dev * dev) 1974{ 1975 wbsd_shutdown(&dev->dev, 1); 1976} 1977 1978#endif /* CONFIG_PNP */ 1979 1980/* 1981 * Power management 1982 */ 1983 1984#ifdef CONFIG_PM 1985 1986static int wbsd_suspend(struct platform_device *dev, pm_message_t state) 1987{ 1988 struct mmc_host *mmc = platform_get_drvdata(dev); 1989 struct wbsd_host *host; 1990 int ret; 1991 1992 if (!mmc) 1993 return 0; 1994 1995 DBG("Suspending...\n"); 1996 1997 ret = mmc_suspend_host(mmc, state); 1998 if (!ret) 1999 return ret; 2000 2001 host = mmc_priv(mmc); 2002 2003 wbsd_chip_poweroff(host); 2004 2005 return 0; 2006} 2007 2008static int wbsd_resume(struct platform_device *dev) 2009{ 2010 struct mmc_host *mmc = platform_get_drvdata(dev); 2011 struct wbsd_host *host; 2012 2013 if (!mmc) 2014 return 0; 2015 2016 DBG("Resuming...\n"); 2017 2018 host = mmc_priv(mmc); 2019 2020 wbsd_chip_config(host); 2021 2022 /* 2023 * Allow device to initialise itself properly. 2024 */ 2025 mdelay(5); 2026 2027 wbsd_init_device(host); 2028 2029 return mmc_resume_host(mmc); 2030} 2031 2032#else /* CONFIG_PM */ 2033 2034#define wbsd_suspend NULL 2035#define wbsd_resume NULL 2036 2037#endif /* CONFIG_PM */ 2038 2039static struct platform_device *wbsd_device; 2040 2041static struct platform_driver wbsd_driver = { 2042 .probe = wbsd_probe, 2043 .remove = __devexit_p(wbsd_remove), 2044 2045 .suspend = wbsd_suspend, 2046 .resume = wbsd_resume, 2047 .driver = { 2048 .name = DRIVER_NAME, 2049 }, 2050}; 2051 2052#ifdef CONFIG_PNP 2053 2054static struct pnp_driver wbsd_pnp_driver = { 2055 .name = DRIVER_NAME, 2056 .id_table = pnp_dev_table, 2057 .probe = wbsd_pnp_probe, 2058 .remove = __devexit_p(wbsd_pnp_remove), 2059}; 2060 2061#endif /* CONFIG_PNP */ 2062 2063/* 2064 * Module loading/unloading 2065 */ 2066 2067static int __init wbsd_drv_init(void) 2068{ 2069 int result; 2070 2071 printk(KERN_INFO DRIVER_NAME 2072 ": Winbond W83L51xD SD/MMC card interface driver, " 2073 DRIVER_VERSION "\n"); 2074 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); 2075 2076#ifdef CONFIG_PNP 2077 2078 if (!nopnp) 2079 { 2080 result = pnp_register_driver(&wbsd_pnp_driver); 2081 if (result < 0) 2082 return result; 2083 } 2084 2085#endif /* CONFIG_PNP */ 2086 2087 if (nopnp) 2088 { 2089 result = platform_driver_register(&wbsd_driver); 2090 if (result < 0) 2091 return result; 2092 2093 wbsd_device = platform_device_register_simple(DRIVER_NAME, -1, 2094 NULL, 0); 2095 if (IS_ERR(wbsd_device)) 2096 return PTR_ERR(wbsd_device); 2097 } 2098 2099 return 0; 2100} 2101 2102static void __exit wbsd_drv_exit(void) 2103{ 2104#ifdef CONFIG_PNP 2105 2106 if (!nopnp) 2107 pnp_unregister_driver(&wbsd_pnp_driver); 2108 2109#endif /* CONFIG_PNP */ 2110 2111 if (nopnp) 2112 { 2113 platform_device_unregister(wbsd_device); 2114 2115 platform_driver_unregister(&wbsd_driver); 2116 } 2117 2118 DBG("unloaded\n"); 2119} 2120 2121module_init(wbsd_drv_init); 2122module_exit(wbsd_drv_exit); 2123#ifdef CONFIG_PNP 2124module_param(nopnp, uint, 0444); 2125#endif 2126module_param(io, uint, 0444); 2127module_param(irq, uint, 0444); 2128module_param(dma, int, 0444); 2129 2130MODULE_LICENSE("GPL"); 2131MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); 2132MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver"); 2133MODULE_VERSION(DRIVER_VERSION); 2134 2135#ifdef CONFIG_PNP 2136MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)"); 2137#endif 2138MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)"); 2139MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)"); 2140MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");