tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
4 * Copyright (C) 1999 SuSE GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef _PARISC_ASSEMBLY_H
22#define _PARISC_ASSEMBLY_H
23
24#define CALLEE_FLOAT_FRAME_SIZE 80
25
26#ifdef CONFIG_64BIT
27#define LDREG ldd
28#define STREG std
29#define LDREGX ldd,s
30#define LDREGM ldd,mb
31#define STREGM std,ma
32#define SHRREG shrd
33#define RP_OFFSET 16
34#define FRAME_SIZE 128
35#define CALLEE_REG_FRAME_SIZE 144
36#else /* CONFIG_64BIT */
37#define LDREG ldw
38#define STREG stw
39#define LDREGX ldwx,s
40#define LDREGM ldwm
41#define STREGM stwm
42#define SHRREG shr
43#define RP_OFFSET 20
44#define FRAME_SIZE 64
45#define CALLEE_REG_FRAME_SIZE 128
46#endif
47
48#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
49
50#ifdef CONFIG_PA20
51#define BL b,l
52# ifdef CONFIG_64BIT
53# define LEVEL 2.0w
54# else
55# define LEVEL 2.0
56# endif
57#else
58#define BL bl
59#define LEVEL 1.1
60#endif
61
62#ifdef __ASSEMBLY__
63
64#ifdef __LP64__
65/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
66 * work around that for now... */
67 .level 2.0w
68#endif
69
70#include <asm/asm-offsets.h>
71#include <asm/page.h>
72
73#include <asm/asmregs.h>
74
75 sp = 30
76 gp = 27
77 ipsw = 22
78
79 /*
80 * We provide two versions of each macro to convert from physical
81 * to virtual and vice versa. The "_r1" versions take one argument
82 * register, but trashes r1 to do the conversion. The other
83 * version takes two arguments: a src and destination register.
84 * However, the source and destination registers can not be
85 * the same register.
86 */
87
88 .macro tophys grvirt, grphys
89 ldil L%(__PAGE_OFFSET), \grphys
90 sub \grvirt, \grphys, \grphys
91 .endm
92
93 .macro tovirt grphys, grvirt
94 ldil L%(__PAGE_OFFSET), \grvirt
95 add \grphys, \grvirt, \grvirt
96 .endm
97
98 .macro tophys_r1 gr
99 ldil L%(__PAGE_OFFSET), %r1
100 sub \gr, %r1, \gr
101 .endm
102
103 .macro tovirt_r1 gr
104 ldil L%(__PAGE_OFFSET), %r1
105 add \gr, %r1, \gr
106 .endm
107
108 .macro delay value
109 ldil L%\value, 1
110 ldo R%\value(1), 1
111 addib,UV,n -1,1,.
112 addib,NUV,n -1,1,.+8
113 nop
114 .endm
115
116 .macro debug value
117 .endm
118
119
120 /* Shift Left - note the r and t can NOT be the same! */
121 .macro shl r, sa, t
122 dep,z \r, 31-\sa, 32-\sa, \t
123 .endm
124
125 /* The PA 2.0 shift left */
126 .macro shlw r, sa, t
127 depw,z \r, 31-\sa, 32-\sa, \t
128 .endm
129
130 /* And the PA 2.0W shift left */
131 .macro shld r, sa, t
132 depd,z \r, 63-\sa, 64-\sa, \t
133 .endm
134
135 /* Shift Right - note the r and t can NOT be the same! */
136 .macro shr r, sa, t
137 extru \r, 31-\sa, 32-\sa, \t
138 .endm
139
140 /* pa20w version of shift right */
141 .macro shrd r, sa, t
142 extrd,u \r, 63-\sa, 64-\sa, \t
143 .endm
144
145 /* load 32-bit 'value' into 'reg' compensating for the ldil
146 * sign-extension when running in wide mode.
147 * WARNING!! neither 'value' nor 'reg' can be expressions
148 * containing '.'!!!! */
149 .macro load32 value, reg
150 ldil L%\value, \reg
151 ldo R%\value(\reg), \reg
152 .endm
153
154 .macro loadgp
155#ifdef __LP64__
156 ldil L%__gp, %r27
157 ldo R%__gp(%r27), %r27
158#else
159 ldil L%$global$, %r27
160 ldo R%$global$(%r27), %r27
161#endif
162 .endm
163
164#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
165#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
166#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
167#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
168
169 .macro save_general regs
170 STREG %r1, PT_GR1 (\regs)
171 STREG %r2, PT_GR2 (\regs)
172 STREG %r3, PT_GR3 (\regs)
173 STREG %r4, PT_GR4 (\regs)
174 STREG %r5, PT_GR5 (\regs)
175 STREG %r6, PT_GR6 (\regs)
176 STREG %r7, PT_GR7 (\regs)
177 STREG %r8, PT_GR8 (\regs)
178 STREG %r9, PT_GR9 (\regs)
179 STREG %r10, PT_GR10(\regs)
180 STREG %r11, PT_GR11(\regs)
181 STREG %r12, PT_GR12(\regs)
182 STREG %r13, PT_GR13(\regs)
183 STREG %r14, PT_GR14(\regs)
184 STREG %r15, PT_GR15(\regs)
185 STREG %r16, PT_GR16(\regs)
186 STREG %r17, PT_GR17(\regs)
187 STREG %r18, PT_GR18(\regs)
188 STREG %r19, PT_GR19(\regs)
189 STREG %r20, PT_GR20(\regs)
190 STREG %r21, PT_GR21(\regs)
191 STREG %r22, PT_GR22(\regs)
192 STREG %r23, PT_GR23(\regs)
193 STREG %r24, PT_GR24(\regs)
194 STREG %r25, PT_GR25(\regs)
195 /* r26 is saved in get_stack and used to preserve a value across virt_map */
196 STREG %r27, PT_GR27(\regs)
197 STREG %r28, PT_GR28(\regs)
198 /* r29 is saved in get_stack and used to point to saved registers */
199 /* r30 stack pointer saved in get_stack */
200 STREG %r31, PT_GR31(\regs)
201 .endm
202
203 .macro rest_general regs
204 /* r1 used as a temp in rest_stack and is restored there */
205 LDREG PT_GR2 (\regs), %r2
206 LDREG PT_GR3 (\regs), %r3
207 LDREG PT_GR4 (\regs), %r4
208 LDREG PT_GR5 (\regs), %r5
209 LDREG PT_GR6 (\regs), %r6
210 LDREG PT_GR7 (\regs), %r7
211 LDREG PT_GR8 (\regs), %r8
212 LDREG PT_GR9 (\regs), %r9
213 LDREG PT_GR10(\regs), %r10
214 LDREG PT_GR11(\regs), %r11
215 LDREG PT_GR12(\regs), %r12
216 LDREG PT_GR13(\regs), %r13
217 LDREG PT_GR14(\regs), %r14
218 LDREG PT_GR15(\regs), %r15
219 LDREG PT_GR16(\regs), %r16
220 LDREG PT_GR17(\regs), %r17
221 LDREG PT_GR18(\regs), %r18
222 LDREG PT_GR19(\regs), %r19
223 LDREG PT_GR20(\regs), %r20
224 LDREG PT_GR21(\regs), %r21
225 LDREG PT_GR22(\regs), %r22
226 LDREG PT_GR23(\regs), %r23
227 LDREG PT_GR24(\regs), %r24
228 LDREG PT_GR25(\regs), %r25
229 LDREG PT_GR26(\regs), %r26
230 LDREG PT_GR27(\regs), %r27
231 LDREG PT_GR28(\regs), %r28
232 /* r29 points to register save area, and is restored in rest_stack */
233 /* r30 stack pointer restored in rest_stack */
234 LDREG PT_GR31(\regs), %r31
235 .endm
236
237 .macro save_fp regs
238 fstd,ma %fr0, 8(\regs)
239 fstd,ma %fr1, 8(\regs)
240 fstd,ma %fr2, 8(\regs)
241 fstd,ma %fr3, 8(\regs)
242 fstd,ma %fr4, 8(\regs)
243 fstd,ma %fr5, 8(\regs)
244 fstd,ma %fr6, 8(\regs)
245 fstd,ma %fr7, 8(\regs)
246 fstd,ma %fr8, 8(\regs)
247 fstd,ma %fr9, 8(\regs)
248 fstd,ma %fr10, 8(\regs)
249 fstd,ma %fr11, 8(\regs)
250 fstd,ma %fr12, 8(\regs)
251 fstd,ma %fr13, 8(\regs)
252 fstd,ma %fr14, 8(\regs)
253 fstd,ma %fr15, 8(\regs)
254 fstd,ma %fr16, 8(\regs)
255 fstd,ma %fr17, 8(\regs)
256 fstd,ma %fr18, 8(\regs)
257 fstd,ma %fr19, 8(\regs)
258 fstd,ma %fr20, 8(\regs)
259 fstd,ma %fr21, 8(\regs)
260 fstd,ma %fr22, 8(\regs)
261 fstd,ma %fr23, 8(\regs)
262 fstd,ma %fr24, 8(\regs)
263 fstd,ma %fr25, 8(\regs)
264 fstd,ma %fr26, 8(\regs)
265 fstd,ma %fr27, 8(\regs)
266 fstd,ma %fr28, 8(\regs)
267 fstd,ma %fr29, 8(\regs)
268 fstd,ma %fr30, 8(\regs)
269 fstd %fr31, 0(\regs)
270 .endm
271
272 .macro rest_fp regs
273 fldd 0(\regs), %fr31
274 fldd,mb -8(\regs), %fr30
275 fldd,mb -8(\regs), %fr29
276 fldd,mb -8(\regs), %fr28
277 fldd,mb -8(\regs), %fr27
278 fldd,mb -8(\regs), %fr26
279 fldd,mb -8(\regs), %fr25
280 fldd,mb -8(\regs), %fr24
281 fldd,mb -8(\regs), %fr23
282 fldd,mb -8(\regs), %fr22
283 fldd,mb -8(\regs), %fr21
284 fldd,mb -8(\regs), %fr20
285 fldd,mb -8(\regs), %fr19
286 fldd,mb -8(\regs), %fr18
287 fldd,mb -8(\regs), %fr17
288 fldd,mb -8(\regs), %fr16
289 fldd,mb -8(\regs), %fr15
290 fldd,mb -8(\regs), %fr14
291 fldd,mb -8(\regs), %fr13
292 fldd,mb -8(\regs), %fr12
293 fldd,mb -8(\regs), %fr11
294 fldd,mb -8(\regs), %fr10
295 fldd,mb -8(\regs), %fr9
296 fldd,mb -8(\regs), %fr8
297 fldd,mb -8(\regs), %fr7
298 fldd,mb -8(\regs), %fr6
299 fldd,mb -8(\regs), %fr5
300 fldd,mb -8(\regs), %fr4
301 fldd,mb -8(\regs), %fr3
302 fldd,mb -8(\regs), %fr2
303 fldd,mb -8(\regs), %fr1
304 fldd,mb -8(\regs), %fr0
305 .endm
306
307 .macro callee_save_float
308 fstd,ma %fr12, 8(%r30)
309 fstd,ma %fr13, 8(%r30)
310 fstd,ma %fr14, 8(%r30)
311 fstd,ma %fr15, 8(%r30)
312 fstd,ma %fr16, 8(%r30)
313 fstd,ma %fr17, 8(%r30)
314 fstd,ma %fr18, 8(%r30)
315 fstd,ma %fr19, 8(%r30)
316 fstd,ma %fr20, 8(%r30)
317 fstd,ma %fr21, 8(%r30)
318 .endm
319
320 .macro callee_rest_float
321 fldd,mb -8(%r30), %fr21
322 fldd,mb -8(%r30), %fr20
323 fldd,mb -8(%r30), %fr19
324 fldd,mb -8(%r30), %fr18
325 fldd,mb -8(%r30), %fr17
326 fldd,mb -8(%r30), %fr16
327 fldd,mb -8(%r30), %fr15
328 fldd,mb -8(%r30), %fr14
329 fldd,mb -8(%r30), %fr13
330 fldd,mb -8(%r30), %fr12
331 .endm
332
333#ifdef __LP64__
334 .macro callee_save
335 std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
336 mfctl %cr27, %r3
337 std %r4, -136(%r30)
338 std %r5, -128(%r30)
339 std %r6, -120(%r30)
340 std %r7, -112(%r30)
341 std %r8, -104(%r30)
342 std %r9, -96(%r30)
343 std %r10, -88(%r30)
344 std %r11, -80(%r30)
345 std %r12, -72(%r30)
346 std %r13, -64(%r30)
347 std %r14, -56(%r30)
348 std %r15, -48(%r30)
349 std %r16, -40(%r30)
350 std %r17, -32(%r30)
351 std %r18, -24(%r30)
352 std %r3, -16(%r30)
353 .endm
354
355 .macro callee_rest
356 ldd -16(%r30), %r3
357 ldd -24(%r30), %r18
358 ldd -32(%r30), %r17
359 ldd -40(%r30), %r16
360 ldd -48(%r30), %r15
361 ldd -56(%r30), %r14
362 ldd -64(%r30), %r13
363 ldd -72(%r30), %r12
364 ldd -80(%r30), %r11
365 ldd -88(%r30), %r10
366 ldd -96(%r30), %r9
367 ldd -104(%r30), %r8
368 ldd -112(%r30), %r7
369 ldd -120(%r30), %r6
370 ldd -128(%r30), %r5
371 ldd -136(%r30), %r4
372 mtctl %r3, %cr27
373 ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
374 .endm
375
376#else /* ! __LP64__ */
377
378 .macro callee_save
379 stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
380 mfctl %cr27, %r3
381 stw %r4, -124(%r30)
382 stw %r5, -120(%r30)
383 stw %r6, -116(%r30)
384 stw %r7, -112(%r30)
385 stw %r8, -108(%r30)
386 stw %r9, -104(%r30)
387 stw %r10, -100(%r30)
388 stw %r11, -96(%r30)
389 stw %r12, -92(%r30)
390 stw %r13, -88(%r30)
391 stw %r14, -84(%r30)
392 stw %r15, -80(%r30)
393 stw %r16, -76(%r30)
394 stw %r17, -72(%r30)
395 stw %r18, -68(%r30)
396 stw %r3, -64(%r30)
397 .endm
398
399 .macro callee_rest
400 ldw -64(%r30), %r3
401 ldw -68(%r30), %r18
402 ldw -72(%r30), %r17
403 ldw -76(%r30), %r16
404 ldw -80(%r30), %r15
405 ldw -84(%r30), %r14
406 ldw -88(%r30), %r13
407 ldw -92(%r30), %r12
408 ldw -96(%r30), %r11
409 ldw -100(%r30), %r10
410 ldw -104(%r30), %r9
411 ldw -108(%r30), %r8
412 ldw -112(%r30), %r7
413 ldw -116(%r30), %r6
414 ldw -120(%r30), %r5
415 ldw -124(%r30), %r4
416 mtctl %r3, %cr27
417 ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
418 .endm
419#endif /* ! __LP64__ */
420
421 .macro save_specials regs
422
423 SAVE_SP (%sr0, PT_SR0 (\regs))
424 SAVE_SP (%sr1, PT_SR1 (\regs))
425 SAVE_SP (%sr2, PT_SR2 (\regs))
426 SAVE_SP (%sr3, PT_SR3 (\regs))
427 SAVE_SP (%sr4, PT_SR4 (\regs))
428 SAVE_SP (%sr5, PT_SR5 (\regs))
429 SAVE_SP (%sr6, PT_SR6 (\regs))
430 SAVE_SP (%sr7, PT_SR7 (\regs))
431
432 SAVE_CR (%cr17, PT_IASQ0(\regs))
433 mtctl %r0, %cr17
434 SAVE_CR (%cr17, PT_IASQ1(\regs))
435
436 SAVE_CR (%cr18, PT_IAOQ0(\regs))
437 mtctl %r0, %cr18
438 SAVE_CR (%cr18, PT_IAOQ1(\regs))
439
440#ifdef __LP64__
441 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
442 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
443 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
444 * we lose the 6th bit on a save/restore over interrupt.
445 */
446 mfctl,w %cr11, %r1
447 STREG %r1, PT_SAR (\regs)
448#else
449 SAVE_CR (%cr11, PT_SAR (\regs))
450#endif
451 SAVE_CR (%cr19, PT_IIR (\regs))
452
453 /*
454 * Code immediately following this macro (in intr_save) relies
455 * on r8 containing ipsw.
456 */
457 mfctl %cr22, %r8
458 STREG %r8, PT_PSW(\regs)
459 .endm
460
461 .macro rest_specials regs
462
463 REST_SP (%sr0, PT_SR0 (\regs))
464 REST_SP (%sr1, PT_SR1 (\regs))
465 REST_SP (%sr2, PT_SR2 (\regs))
466 REST_SP (%sr3, PT_SR3 (\regs))
467 REST_SP (%sr4, PT_SR4 (\regs))
468 REST_SP (%sr5, PT_SR5 (\regs))
469 REST_SP (%sr6, PT_SR6 (\regs))
470 REST_SP (%sr7, PT_SR7 (\regs))
471
472 REST_CR (%cr17, PT_IASQ0(\regs))
473 REST_CR (%cr17, PT_IASQ1(\regs))
474
475 REST_CR (%cr18, PT_IAOQ0(\regs))
476 REST_CR (%cr18, PT_IAOQ1(\regs))
477
478 REST_CR (%cr11, PT_SAR (\regs))
479
480 REST_CR (%cr22, PT_PSW (\regs))
481 .endm
482
483
484 /* First step to create a "relied upon translation"
485 * See PA 2.0 Arch. page F-4 and F-5.
486 *
487 * The ssm was originally necessary due to a "PCxT bug".
488 * But someone decided it needed to be added to the architecture
489 * and this "feature" went into rev3 of PA-RISC 1.1 Arch Manual.
490 * It's been carried forward into PA 2.0 Arch as well. :^(
491 *
492 * "ssm 0,%r0" is a NOP with side effects (prefetch barrier).
493 * rsm/ssm prevents the ifetch unit from speculatively fetching
494 * instructions past this line in the code stream.
495 * PA 2.0 processor will single step all insn in the same QUAD (4 insn).
496 */
497 .macro pcxt_ssm_bug
498 rsm PSW_SM_I,%r0
499 nop /* 1 */
500 nop /* 2 */
501 nop /* 3 */
502 nop /* 4 */
503 nop /* 5 */
504 nop /* 6 */
505 nop /* 7 */
506 .endm
507
508#endif /* __ASSEMBLY__ */
509#endif