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1/****************************************************************************** 2 * ixj.h 3 * 4 * 5 * Device Driver for Quicknet Technologies, Inc.'s Telephony cards 6 * including the Internet PhoneJACK, Internet PhoneJACK Lite, 7 * Internet PhoneJACK PCI, Internet LineJACK, Internet PhoneCARD and 8 * SmartCABLE 9 * 10 * (c) Copyright 1999-2001 Quicknet Technologies, Inc. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License 14 * as published by the Free Software Foundation; either version 15 * 2 of the License, or (at your option) any later version. 16 * 17 * Author: Ed Okerson, <eokerson@quicknet.net> 18 * 19 * Contributors: Greg Herlein, <gherlein@quicknet.net> 20 * David W. Erhart, <derhart@quicknet.net> 21 * John Sellers, <jsellers@quicknet.net> 22 * Mike Preston, <mpreston@quicknet.net> 23 * 24 * More information about the hardware related to this driver can be found 25 * at our website: http://www.quicknet.net 26 * 27 * Fixes: 28 * 29 * IN NO EVENT SHALL QUICKNET TECHNOLOGIES, INC. BE LIABLE TO ANY PARTY FOR 30 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT 31 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF QUICKNET 32 * TECHNOLOGIES, INC.HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * QUICKNET TECHNOLOGIES, INC. SPECIFICALLY DISCLAIMS ANY WARRANTIES, 35 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 36 * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 37 * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION 38 * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. 39 * 40 *****************************************************************************/ 41#define IXJ_VERSION 3031 42 43#include <linux/types.h> 44 45#include <linux/ixjuser.h> 46#include <linux/phonedev.h> 47 48typedef __u16 WORD; 49typedef __u32 DWORD; 50typedef __u8 BYTE; 51typedef __u8 BOOL; 52 53#ifndef IXJMAX 54#define IXJMAX 16 55#endif 56 57#define TRUE 1 58#define FALSE 0 59 60/****************************************************************************** 61* 62* This structure when unioned with the structures below makes simple byte 63* access to the registers easier. 64* 65******************************************************************************/ 66typedef struct { 67 unsigned char low; 68 unsigned char high; 69} BYTES; 70 71typedef union { 72 BYTES bytes; 73 short word; 74} IXJ_WORD; 75 76typedef struct{ 77 unsigned int b0:1; 78 unsigned int b1:1; 79 unsigned int b2:1; 80 unsigned int b3:1; 81 unsigned int b4:1; 82 unsigned int b5:1; 83 unsigned int b6:1; 84 unsigned int b7:1; 85} IXJ_CBITS; 86 87typedef union{ 88 IXJ_CBITS cbits; 89 char cbyte; 90} IXJ_CBYTE; 91 92/****************************************************************************** 93* 94* This structure represents the Hardware Control Register of the CT8020/8021 95* The CT8020 is used in the Internet PhoneJACK, and the 8021 in the 96* Internet LineJACK 97* 98******************************************************************************/ 99typedef struct { 100 unsigned int rxrdy:1; 101 unsigned int txrdy:1; 102 unsigned int status:1; 103 unsigned int auxstatus:1; 104 unsigned int rxdma:1; 105 unsigned int txdma:1; 106 unsigned int rxburst:1; 107 unsigned int txburst:1; 108 unsigned int dmadir:1; 109 unsigned int cont:1; 110 unsigned int irqn:1; 111 unsigned int t:5; 112} HCRBIT; 113 114typedef union { 115 HCRBIT bits; 116 BYTES bytes; 117} HCR; 118 119/****************************************************************************** 120* 121* This structure represents the Hardware Status Register of the CT8020/8021 122* The CT8020 is used in the Internet PhoneJACK, and the 8021 in the 123* Internet LineJACK 124* 125******************************************************************************/ 126typedef struct { 127 unsigned int controlrdy:1; 128 unsigned int auxctlrdy:1; 129 unsigned int statusrdy:1; 130 unsigned int auxstatusrdy:1; 131 unsigned int rxrdy:1; 132 unsigned int txrdy:1; 133 unsigned int restart:1; 134 unsigned int irqn:1; 135 unsigned int rxdma:1; 136 unsigned int txdma:1; 137 unsigned int cohostshutdown:1; 138 unsigned int t:5; 139} HSRBIT; 140 141typedef union { 142 HSRBIT bits; 143 BYTES bytes; 144} HSR; 145 146/****************************************************************************** 147* 148* This structure represents the General Purpose IO Register of the CT8020/8021 149* The CT8020 is used in the Internet PhoneJACK, and the 8021 in the 150* Internet LineJACK 151* 152******************************************************************************/ 153typedef struct { 154 unsigned int x:1; 155 unsigned int gpio1:1; 156 unsigned int gpio2:1; 157 unsigned int gpio3:1; 158 unsigned int gpio4:1; 159 unsigned int gpio5:1; 160 unsigned int gpio6:1; 161 unsigned int gpio7:1; 162 unsigned int xread:1; 163 unsigned int gpio1read:1; 164 unsigned int gpio2read:1; 165 unsigned int gpio3read:1; 166 unsigned int gpio4read:1; 167 unsigned int gpio5read:1; 168 unsigned int gpio6read:1; 169 unsigned int gpio7read:1; 170} GPIOBIT; 171 172typedef union { 173 GPIOBIT bits; 174 BYTES bytes; 175 unsigned short word; 176} GPIO; 177 178/****************************************************************************** 179* 180* This structure represents the Line Monitor status response 181* 182******************************************************************************/ 183typedef struct { 184 unsigned int digit:4; 185 unsigned int cpf_valid:1; 186 unsigned int dtmf_valid:1; 187 unsigned int peak:1; 188 unsigned int z:1; 189 unsigned int f0:1; 190 unsigned int f1:1; 191 unsigned int f2:1; 192 unsigned int f3:1; 193 unsigned int frame:4; 194} LMON; 195 196typedef union { 197 LMON bits; 198 BYTES bytes; 199} DTMF; 200 201typedef struct { 202 unsigned int z:7; 203 unsigned int dtmf_en:1; 204 unsigned int y:4; 205 unsigned int F3:1; 206 unsigned int F2:1; 207 unsigned int F1:1; 208 unsigned int F0:1; 209} CP; 210 211typedef union { 212 CP bits; 213 BYTES bytes; 214} CPTF; 215 216/****************************************************************************** 217* 218* This structure represents the Status Control Register on the Internet 219* LineJACK 220* 221******************************************************************************/ 222typedef struct { 223 unsigned int c0:1; 224 unsigned int c1:1; 225 unsigned int stereo:1; 226 unsigned int daafsyncen:1; 227 unsigned int led1:1; 228 unsigned int led2:1; 229 unsigned int led3:1; 230 unsigned int led4:1; 231} PSCRWI; /* Internet LineJACK and Internet PhoneJACK Lite */ 232 233typedef struct { 234 unsigned int eidp:1; 235 unsigned int eisd:1; 236 unsigned int x:6; 237} PSCRWP; /* Internet PhoneJACK PCI */ 238 239typedef union { 240 PSCRWI bits; 241 PSCRWP pcib; 242 char byte; 243} PLD_SCRW; 244 245typedef struct { 246 unsigned int c0:1; 247 unsigned int c1:1; 248 unsigned int x:1; 249 unsigned int d0ee:1; 250 unsigned int mixerbusy:1; 251 unsigned int sci:1; 252 unsigned int dspflag:1; 253 unsigned int daaflag:1; 254} PSCRRI; 255 256typedef struct { 257 unsigned int eidp:1; 258 unsigned int eisd:1; 259 unsigned int x:4; 260 unsigned int dspflag:1; 261 unsigned int det:1; 262} PSCRRP; 263 264typedef union { 265 PSCRRI bits; 266 PSCRRP pcib; 267 char byte; 268} PLD_SCRR; 269 270/****************************************************************************** 271* 272* These structures represents the SLIC Control Register on the 273* Internet LineJACK 274* 275******************************************************************************/ 276typedef struct { 277 unsigned int c1:1; 278 unsigned int c2:1; 279 unsigned int c3:1; 280 unsigned int b2en:1; 281 unsigned int spken:1; 282 unsigned int rly1:1; 283 unsigned int rly2:1; 284 unsigned int rly3:1; 285} PSLICWRITE; 286 287typedef struct { 288 unsigned int state:3; 289 unsigned int b2en:1; 290 unsigned int spken:1; 291 unsigned int c3:1; 292 unsigned int potspstn:1; 293 unsigned int det:1; 294} PSLICREAD; 295 296typedef struct { 297 unsigned int c1:1; 298 unsigned int c2:1; 299 unsigned int c3:1; 300 unsigned int b2en:1; 301 unsigned int e1:1; 302 unsigned int mic:1; 303 unsigned int spk:1; 304 unsigned int x:1; 305} PSLICPCI; 306 307typedef union { 308 PSLICPCI pcib; 309 PSLICWRITE bits; 310 PSLICREAD slic; 311 char byte; 312} PLD_SLICW; 313 314typedef union { 315 PSLICPCI pcib; 316 PSLICREAD bits; 317 char byte; 318} PLD_SLICR; 319 320/****************************************************************************** 321* 322* These structures represents the Clock Control Register on the 323* Internet LineJACK 324* 325******************************************************************************/ 326typedef struct { 327 unsigned int clk0:1; 328 unsigned int clk1:1; 329 unsigned int clk2:1; 330 unsigned int x0:1; 331 unsigned int slic_e1:1; 332 unsigned int x1:1; 333 unsigned int x2:1; 334 unsigned int x3:1; 335} PCLOCK; 336 337typedef union { 338 PCLOCK bits; 339 char byte; 340} PLD_CLOCK; 341 342/****************************************************************************** 343* 344* These structures deal with the mixer on the Internet LineJACK 345* 346******************************************************************************/ 347 348typedef struct { 349 unsigned short vol[10]; 350 unsigned int recsrc; 351 unsigned int modcnt; 352 unsigned short micpreamp; 353} MIX; 354 355/****************************************************************************** 356* 357* These structures deal with the control logic on the Internet PhoneCARD 358* 359******************************************************************************/ 360typedef struct { 361 unsigned int x0:4; /* unused bits */ 362 363 unsigned int ed:1; /* Event Detect */ 364 365 unsigned int drf:1; /* SmartCABLE Removal Flag 1=no cable */ 366 367 unsigned int dspf:1; /* DSP Flag 1=DSP Ready */ 368 369 unsigned int crr:1; /* Control Register Ready */ 370 371} COMMAND_REG1; 372 373typedef union { 374 COMMAND_REG1 bits; 375 unsigned char byte; 376} PCMCIA_CR1; 377 378typedef struct { 379 unsigned int x0:4; /* unused bits */ 380 381 unsigned int rstc:1; /* SmartCABLE Reset */ 382 383 unsigned int pwr:1; /* SmartCABLE Power */ 384 385 unsigned int x1:2; /* unused bits */ 386 387} COMMAND_REG2; 388 389typedef union { 390 COMMAND_REG2 bits; 391 unsigned char byte; 392} PCMCIA_CR2; 393 394typedef struct { 395 unsigned int addr:5; /* R/W SmartCABLE Register Address */ 396 397 unsigned int rw:1; /* Read / Write flag */ 398 399 unsigned int dev:2; /* 2 bit SmartCABLE Device Address */ 400 401} CONTROL_REG; 402 403typedef union { 404 CONTROL_REG bits; 405 unsigned char byte; 406} PCMCIA_SCCR; 407 408typedef struct { 409 unsigned int hsw:1; 410 unsigned int det:1; 411 unsigned int led2:1; 412 unsigned int led1:1; 413 unsigned int ring1:1; 414 unsigned int ring0:1; 415 unsigned int x:1; 416 unsigned int powerdown:1; 417} PCMCIA_SLIC_REG; 418 419typedef union { 420 PCMCIA_SLIC_REG bits; 421 unsigned char byte; 422} PCMCIA_SLIC; 423 424typedef struct { 425 unsigned int cpd:1; /* Chip Power Down */ 426 427 unsigned int mpd:1; /* MIC Bias Power Down */ 428 429 unsigned int hpd:1; /* Handset Drive Power Down */ 430 431 unsigned int lpd:1; /* Line Drive Power Down */ 432 433 unsigned int spd:1; /* Speaker Drive Power Down */ 434 435 unsigned int x:2; /* unused bits */ 436 437 unsigned int sr:1; /* Software Reset */ 438 439} Si3CONTROL1; 440 441typedef union { 442 Si3CONTROL1 bits; 443 unsigned char byte; 444} Si3C1; 445 446typedef struct { 447 unsigned int al:1; /* Analog Loopback DAC analog -> ADC analog */ 448 449 unsigned int dl2:1; /* Digital Loopback DAC -> ADC one bit */ 450 451 unsigned int dl1:1; /* Digital Loopback ADC -> DAC one bit */ 452 453 unsigned int pll:1; /* 1 = div 10, 0 = div 5 */ 454 455 unsigned int hpd:1; /* HPF disable */ 456 457 unsigned int x:3; /* unused bits */ 458 459} Si3CONTROL2; 460 461typedef union { 462 Si3CONTROL2 bits; 463 unsigned char byte; 464} Si3C2; 465 466typedef struct { 467 unsigned int iir:1; /* 1 enables IIR, 0 enables FIR */ 468 469 unsigned int him:1; /* Handset Input Mute */ 470 471 unsigned int mcm:1; /* MIC In Mute */ 472 473 unsigned int mcg:2; /* MIC In Gain */ 474 475 unsigned int lim:1; /* Line In Mute */ 476 477 unsigned int lig:2; /* Line In Gain */ 478 479} Si3RXGAIN; 480 481typedef union { 482 Si3RXGAIN bits; 483 unsigned char byte; 484} Si3RXG; 485 486typedef struct { 487 unsigned int hom:1; /* Handset Out Mute */ 488 489 unsigned int lom:1; /* Line Out Mute */ 490 491 unsigned int rxg:5; /* RX PGA Gain */ 492 493 unsigned int x:1; /* unused bit */ 494 495} Si3ADCVOLUME; 496 497typedef union { 498 Si3ADCVOLUME bits; 499 unsigned char byte; 500} Si3ADC; 501 502typedef struct { 503 unsigned int srm:1; /* Speaker Right Mute */ 504 505 unsigned int slm:1; /* Speaker Left Mute */ 506 507 unsigned int txg:5; /* TX PGA Gain */ 508 509 unsigned int x:1; /* unused bit */ 510 511} Si3DACVOLUME; 512 513typedef union { 514 Si3DACVOLUME bits; 515 unsigned char byte; 516} Si3DAC; 517 518typedef struct { 519 unsigned int x:5; /* unused bit */ 520 521 unsigned int losc:1; /* Line Out Short Circuit */ 522 523 unsigned int srsc:1; /* Speaker Right Short Circuit */ 524 525 unsigned int slsc:1; /* Speaker Left Short Circuit */ 526 527} Si3STATUSREPORT; 528 529typedef union { 530 Si3STATUSREPORT bits; 531 unsigned char byte; 532} Si3STAT; 533 534typedef struct { 535 unsigned int sot:2; /* Speaker Out Attenuation */ 536 537 unsigned int lot:2; /* Line Out Attenuation */ 538 539 unsigned int x:4; /* unused bits */ 540 541} Si3ANALOGATTN; 542 543typedef union { 544 Si3ANALOGATTN bits; 545 unsigned char byte; 546} Si3AATT; 547 548/****************************************************************************** 549* 550* These structures deal with the DAA on the Internet LineJACK 551* 552******************************************************************************/ 553 554typedef struct _DAA_REGS { 555 /*----------------------------------------------- */ 556 /* SOP Registers */ 557 /* */ 558 BYTE bySOP; 559 560 union _SOP_REGS { 561 struct _SOP { 562 union /* SOP - CR0 Register */ 563 { 564 BYTE reg; 565 struct _CR0_BITREGS { 566 BYTE CLK_EXT:1; /* cr0[0:0] */ 567 568 BYTE RIP:1; /* cr0[1:1] */ 569 570 BYTE AR:1; /* cr0[2:2] */ 571 572 BYTE AX:1; /* cr0[3:3] */ 573 574 BYTE FRR:1; /* cr0[4:4] */ 575 576 BYTE FRX:1; /* cr0[5:5] */ 577 578 BYTE IM:1; /* cr0[6:6] */ 579 580 BYTE TH:1; /* cr0[7:7] */ 581 582 } bitreg; 583 } cr0; 584 585 union /* SOP - CR1 Register */ 586 { 587 BYTE reg; 588 struct _CR1_REGS { 589 BYTE RM:1; /* cr1[0:0] */ 590 591 BYTE RMR:1; /* cr1[1:1] */ 592 593 BYTE No_auto:1; /* cr1[2:2] */ 594 595 BYTE Pulse:1; /* cr1[3:3] */ 596 597 BYTE P_Tone1:1; /* cr1[4:4] */ 598 599 BYTE P_Tone2:1; /* cr1[5:5] */ 600 601 BYTE E_Tone1:1; /* cr1[6:6] */ 602 603 BYTE E_Tone2:1; /* cr1[7:7] */ 604 605 } bitreg; 606 } cr1; 607 608 union /* SOP - CR2 Register */ 609 { 610 BYTE reg; 611 struct _CR2_REGS { 612 BYTE Call_II:1; /* CR2[0:0] */ 613 614 BYTE Call_I:1; /* CR2[1:1] */ 615 616 BYTE Call_en:1; /* CR2[2:2] */ 617 618 BYTE Call_pon:1; /* CR2[3:3] */ 619 620 BYTE IDR:1; /* CR2[4:4] */ 621 622 BYTE COT_R:3; /* CR2[5:7] */ 623 624 } bitreg; 625 } cr2; 626 627 union /* SOP - CR3 Register */ 628 { 629 BYTE reg; 630 struct _CR3_REGS { 631 BYTE DHP_X:1; /* CR3[0:0] */ 632 633 BYTE DHP_R:1; /* CR3[1:1] */ 634 635 BYTE Cal_pctl:1; /* CR3[2:2] */ 636 637 BYTE SEL:1; /* CR3[3:3] */ 638 639 BYTE TestLoops:4; /* CR3[4:7] */ 640 641 } bitreg; 642 } cr3; 643 644 union /* SOP - CR4 Register */ 645 { 646 BYTE reg; 647 struct _CR4_REGS { 648 BYTE Fsc_en:1; /* CR4[0:0] */ 649 650 BYTE Int_en:1; /* CR4[1:1] */ 651 652 BYTE AGX:2; /* CR4[2:3] */ 653 654 BYTE AGR_R:2; /* CR4[4:5] */ 655 656 BYTE AGR_Z:2; /* CR4[6:7] */ 657 658 } bitreg; 659 } cr4; 660 661 union /* SOP - CR5 Register */ 662 { 663 BYTE reg; 664 struct _CR5_REGS { 665 BYTE V_0:1; /* CR5[0:0] */ 666 667 BYTE V_1:1; /* CR5[1:1] */ 668 669 BYTE V_2:1; /* CR5[2:2] */ 670 671 BYTE V_3:1; /* CR5[3:3] */ 672 673 BYTE V_4:1; /* CR5[4:4] */ 674 675 BYTE V_5:1; /* CR5[5:5] */ 676 677 BYTE V_6:1; /* CR5[6:6] */ 678 679 BYTE V_7:1; /* CR5[7:7] */ 680 681 } bitreg; 682 } cr5; 683 684 union /* SOP - CR6 Register */ 685 { 686 BYTE reg; 687 struct _CR6_REGS { 688 BYTE reserved:8; /* CR6[0:7] */ 689 690 } bitreg; 691 } cr6; 692 693 union /* SOP - CR7 Register */ 694 { 695 BYTE reg; 696 struct _CR7_REGS { 697 BYTE reserved:8; /* CR7[0:7] */ 698 699 } bitreg; 700 } cr7; 701 } SOP; 702 703 BYTE ByteRegs[sizeof(struct _SOP)]; 704 705 } SOP_REGS; 706 707 /* DAA_REGS.SOP_REGS.SOP.CR5.reg */ 708 /* DAA_REGS.SOP_REGS.SOP.CR5.bitreg */ 709 /* DAA_REGS.SOP_REGS.SOP.CR5.bitreg.V_2 */ 710 /* DAA_REGS.SOP_REGS.ByteRegs[5] */ 711 712 /*----------------------------------------------- */ 713 /* XOP Registers */ 714 /* */ 715 BYTE byXOP; 716 717 union _XOP_REGS { 718 struct _XOP { 719 union XOPXR0/* XOP - XR0 Register - Read values */ 720 { 721 BYTE reg; 722 struct _XR0_BITREGS { 723 BYTE SI_0:1; /* XR0[0:0] - Read */ 724 725 BYTE SI_1:1; /* XR0[1:1] - Read */ 726 727 BYTE VDD_OK:1; /* XR0[2:2] - Read */ 728 729 BYTE Caller_ID:1; /* XR0[3:3] - Read */ 730 731 BYTE RING:1; /* XR0[4:4] - Read */ 732 733 BYTE Cadence:1; /* XR0[5:5] - Read */ 734 735 BYTE Wake_up:1; /* XR0[6:6] - Read */ 736 737 BYTE RMR:1; /* XR0[7:7] - Read */ 738 739 } bitreg; 740 } xr0; 741 742 union /* XOP - XR1 Register */ 743 { 744 BYTE reg; 745 struct _XR1_BITREGS { 746 BYTE M_SI_0:1; /* XR1[0:0] */ 747 748 BYTE M_SI_1:1; /* XR1[1:1] */ 749 750 BYTE M_VDD_OK:1; /* XR1[2:2] */ 751 752 BYTE M_Caller_ID:1; /* XR1[3:3] */ 753 754 BYTE M_RING:1; /* XR1[4:4] */ 755 756 BYTE M_Cadence:1; /* XR1[5:5] */ 757 758 BYTE M_Wake_up:1; /* XR1[6:6] */ 759 760 BYTE unused:1; /* XR1[7:7] */ 761 762 } bitreg; 763 } xr1; 764 765 union /* XOP - XR2 Register */ 766 { 767 BYTE reg; 768 struct _XR2_BITREGS { 769 BYTE CTO0:1; /* XR2[0:0] */ 770 771 BYTE CTO1:1; /* XR2[1:1] */ 772 773 BYTE CTO2:1; /* XR2[2:2] */ 774 775 BYTE CTO3:1; /* XR2[3:3] */ 776 777 BYTE CTO4:1; /* XR2[4:4] */ 778 779 BYTE CTO5:1; /* XR2[5:5] */ 780 781 BYTE CTO6:1; /* XR2[6:6] */ 782 783 BYTE CTO7:1; /* XR2[7:7] */ 784 785 } bitreg; 786 } xr2; 787 788 union /* XOP - XR3 Register */ 789 { 790 BYTE reg; 791 struct _XR3_BITREGS { 792 BYTE DCR0:1; /* XR3[0:0] */ 793 794 BYTE DCR1:1; /* XR3[1:1] */ 795 796 BYTE DCI:1; /* XR3[2:2] */ 797 798 BYTE DCU0:1; /* XR3[3:3] */ 799 800 BYTE DCU1:1; /* XR3[4:4] */ 801 802 BYTE B_off:1; /* XR3[5:5] */ 803 804 BYTE AGB0:1; /* XR3[6:6] */ 805 806 BYTE AGB1:1; /* XR3[7:7] */ 807 808 } bitreg; 809 } xr3; 810 811 union /* XOP - XR4 Register */ 812 { 813 BYTE reg; 814 struct _XR4_BITREGS { 815 BYTE C_0:1; /* XR4[0:0] */ 816 817 BYTE C_1:1; /* XR4[1:1] */ 818 819 BYTE C_2:1; /* XR4[2:2] */ 820 821 BYTE C_3:1; /* XR4[3:3] */ 822 823 BYTE C_4:1; /* XR4[4:4] */ 824 825 BYTE C_5:1; /* XR4[5:5] */ 826 827 BYTE C_6:1; /* XR4[6:6] */ 828 829 BYTE C_7:1; /* XR4[7:7] */ 830 831 } bitreg; 832 } xr4; 833 834 union /* XOP - XR5 Register */ 835 { 836 BYTE reg; 837 struct _XR5_BITREGS { 838 BYTE T_0:1; /* XR5[0:0] */ 839 840 BYTE T_1:1; /* XR5[1:1] */ 841 842 BYTE T_2:1; /* XR5[2:2] */ 843 844 BYTE T_3:1; /* XR5[3:3] */ 845 846 BYTE T_4:1; /* XR5[4:4] */ 847 848 BYTE T_5:1; /* XR5[5:5] */ 849 850 BYTE T_6:1; /* XR5[6:6] */ 851 852 BYTE T_7:1; /* XR5[7:7] */ 853 854 } bitreg; 855 } xr5; 856 857 union /* XOP - XR6 Register - Read Values */ 858 { 859 BYTE reg; 860 struct _XR6_BITREGS { 861 BYTE CPS0:1; /* XR6[0:0] */ 862 863 BYTE CPS1:1; /* XR6[1:1] */ 864 865 BYTE unused1:2; /* XR6[2:3] */ 866 867 BYTE CLK_OFF:1; /* XR6[4:4] */ 868 869 BYTE unused2:3; /* XR6[5:7] */ 870 871 } bitreg; 872 } xr6; 873 874 union /* XOP - XR7 Register */ 875 { 876 BYTE reg; 877 struct _XR7_BITREGS { 878 BYTE unused1:1; /* XR7[0:0] */ 879 880 BYTE Vdd0:1; /* XR7[1:1] */ 881 882 BYTE Vdd1:1; /* XR7[2:2] */ 883 884 BYTE unused2:5; /* XR7[3:7] */ 885 886 } bitreg; 887 } xr7; 888 } XOP; 889 890 BYTE ByteRegs[sizeof(struct _XOP)]; 891 892 } XOP_REGS; 893 894 /* DAA_REGS.XOP_REGS.XOP.XR7.reg */ 895 /* DAA_REGS.XOP_REGS.XOP.XR7.bitreg */ 896 /* DAA_REGS.XOP_REGS.XOP.XR7.bitreg.Vdd0 */ 897 /* DAA_REGS.XOP_REGS.ByteRegs[7] */ 898 899 /*----------------------------------------------- */ 900 /* COP Registers */ 901 /* */ 902 BYTE byCOP; 903 904 union _COP_REGS { 905 struct _COP { 906 BYTE THFilterCoeff_1[8]; /* COP - TH Filter Coefficients, CODE=0, Part 1 */ 907 908 BYTE THFilterCoeff_2[8]; /* COP - TH Filter Coefficients, CODE=1, Part 2 */ 909 910 BYTE THFilterCoeff_3[8]; /* COP - TH Filter Coefficients, CODE=2, Part 3 */ 911 912 BYTE RingerImpendance_1[8]; /* COP - Ringer Impendance Coefficients, CODE=3, Part 1 */ 913 914 BYTE IMFilterCoeff_1[8]; /* COP - IM Filter Coefficients, CODE=4, Part 1 */ 915 916 BYTE IMFilterCoeff_2[8]; /* COP - IM Filter Coefficients, CODE=5, Part 2 */ 917 918 BYTE RingerImpendance_2[8]; /* COP - Ringer Impendance Coefficients, CODE=6, Part 2 */ 919 920 BYTE FRRFilterCoeff[8]; /* COP - FRR Filter Coefficients, CODE=7 */ 921 922 BYTE FRXFilterCoeff[8]; /* COP - FRX Filter Coefficients, CODE=8 */ 923 924 BYTE ARFilterCoeff[4]; /* COP - AR Filter Coefficients, CODE=9 */ 925 926 BYTE AXFilterCoeff[4]; /* COP - AX Filter Coefficients, CODE=10 */ 927 928 BYTE Tone1Coeff[4]; /* COP - Tone1 Coefficients, CODE=11 */ 929 930 BYTE Tone2Coeff[4]; /* COP - Tone2 Coefficients, CODE=12 */ 931 932 BYTE LevelmeteringRinging[4]; /* COP - Levelmetering Ringing, CODE=13 */ 933 934 BYTE CallerID1stTone[8]; /* COP - Caller ID 1st Tone, CODE=14 */ 935 936 BYTE CallerID2ndTone[8]; /* COP - Caller ID 2nd Tone, CODE=15 */ 937 938 } COP; 939 940 BYTE ByteRegs[sizeof(struct _COP)]; 941 942 } COP_REGS; 943 944 /* DAA_REGS.COP_REGS.COP.XR7.Tone1Coeff[3] */ 945 /* DAA_REGS.COP_REGS.COP.XR7.bitreg */ 946 /* DAA_REGS.COP_REGS.COP.XR7.bitreg.Vdd0 */ 947 /* DAA_REGS.COP_REGS.ByteRegs[57] */ 948 949 /*----------------------------------------------- */ 950 /* CAO Registers */ 951 /* */ 952 BYTE byCAO; 953 954 union _CAO_REGS { 955 struct _CAO { 956 BYTE CallerID[512]; /* CAO - Caller ID Bytes */ 957 958 } CAO; 959 960 BYTE ByteRegs[sizeof(struct _CAO)]; 961 } CAO_REGS; 962 963 union /* XOP - XR0 Register - Write values */ 964 { 965 BYTE reg; 966 struct _XR0_BITREGSW { 967 BYTE SO_0:1; /* XR1[0:0] - Write */ 968 969 BYTE SO_1:1; /* XR1[1:1] - Write */ 970 971 BYTE SO_2:1; /* XR1[2:2] - Write */ 972 973 BYTE unused:5; /* XR1[3:7] - Write */ 974 975 } bitreg; 976 } XOP_xr0_W; 977 978 union /* XOP - XR6 Register - Write values */ 979 { 980 BYTE reg; 981 struct _XR6_BITREGSW { 982 BYTE unused1:4; /* XR6[0:3] */ 983 984 BYTE CLK_OFF:1; /* XR6[4:4] */ 985 986 BYTE unused2:3; /* XR6[5:7] */ 987 988 } bitreg; 989 } XOP_xr6_W; 990 991} DAA_REGS; 992 993#define ALISDAA_ID_BYTE 0x81 994#define ALISDAA_CALLERID_SIZE 512 995 996/*------------------------------ */ 997/* */ 998/* Misc definitions */ 999/* */ 1000 1001/* Power Up Operation */ 1002#define SOP_PU_SLEEP 0 1003#define SOP_PU_RINGING 1 1004#define SOP_PU_CONVERSATION 2 1005#define SOP_PU_PULSEDIALING 3 1006#define SOP_PU_RESET 4 1007 1008#define ALISDAA_CALLERID_SIZE 512 1009 1010#define PLAYBACK_MODE_COMPRESSED 0 /* Selects: Compressed modes, TrueSpeech 8.5-4.1, G.723.1, G.722, G.728, G.729 */ 1011#define PLAYBACK_MODE_TRUESPEECH_V40 0 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps */ 1012#define PLAYBACK_MODE_TRUESPEECH 8 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps Version 5.1 */ 1013#define PLAYBACK_MODE_ULAW 2 /* Selects: 64 Kbit/sec MuA-law PCM */ 1014#define PLAYBACK_MODE_ALAW 10 /* Selects: 64 Kbit/sec A-law PCM */ 1015#define PLAYBACK_MODE_16LINEAR 6 /* Selects: 128 Kbit/sec 16-bit linear */ 1016#define PLAYBACK_MODE_8LINEAR 4 /* Selects: 64 Kbit/sec 8-bit signed linear */ 1017#define PLAYBACK_MODE_8LINEAR_WSS 5 /* Selects: 64 Kbit/sec WSS 8-bit unsigned linear */ 1018 1019#define RECORD_MODE_COMPRESSED 0 /* Selects: Compressed modes, TrueSpeech 8.5-4.1, G.723.1, G.722, G.728, G.729 */ 1020#define RECORD_MODE_TRUESPEECH 0 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps */ 1021#define RECORD_MODE_ULAW 4 /* Selects: 64 Kbit/sec Mu-law PCM */ 1022#define RECORD_MODE_ALAW 12 /* Selects: 64 Kbit/sec A-law PCM */ 1023#define RECORD_MODE_16LINEAR 5 /* Selects: 128 Kbit/sec 16-bit linear */ 1024#define RECORD_MODE_8LINEAR 6 /* Selects: 64 Kbit/sec 8-bit signed linear */ 1025#define RECORD_MODE_8LINEAR_WSS 7 /* Selects: 64 Kbit/sec WSS 8-bit unsigned linear */ 1026 1027enum SLIC_STATES { 1028 PLD_SLIC_STATE_OC = 0, 1029 PLD_SLIC_STATE_RINGING, 1030 PLD_SLIC_STATE_ACTIVE, 1031 PLD_SLIC_STATE_OHT, 1032 PLD_SLIC_STATE_TIPOPEN, 1033 PLD_SLIC_STATE_STANDBY, 1034 PLD_SLIC_STATE_APR, 1035 PLD_SLIC_STATE_OHTPR 1036}; 1037 1038enum SCI_CONTROL { 1039 SCI_End = 0, 1040 SCI_Enable_DAA, 1041 SCI_Enable_Mixer, 1042 SCI_Enable_EEPROM 1043}; 1044 1045enum Mode { 1046 T63, T53, T48, T40 1047}; 1048enum Dir { 1049 V3_TO_V4, V4_TO_V3, V4_TO_V5, V5_TO_V4 1050}; 1051 1052typedef struct Proc_Info_Tag { 1053 enum Mode convert_mode; 1054 enum Dir convert_dir; 1055 int Prev_Frame_Type; 1056 int Current_Frame_Type; 1057} Proc_Info_Type; 1058 1059enum PREVAL { 1060 NORMAL = 0, 1061 NOPOST, 1062 POSTONLY, 1063 PREERROR 1064}; 1065 1066enum IXJ_EXTENSIONS { 1067 G729LOADER = 0, 1068 TS85LOADER, 1069 PRE_READ, 1070 POST_READ, 1071 PRE_WRITE, 1072 POST_WRITE, 1073 PRE_IOCTL, 1074 POST_IOCTL 1075}; 1076 1077typedef struct { 1078 char enable; 1079 char en_filter; 1080 unsigned int filter; 1081 unsigned int state; /* State 0 when cadence has not started. */ 1082 1083 unsigned int on1; /* State 1 */ 1084 1085 unsigned long on1min; /* State 1 - 10% + jiffies */ 1086 unsigned long on1dot; /* State 1 + jiffies */ 1087 1088 unsigned long on1max; /* State 1 + 10% + jiffies */ 1089 1090 unsigned int off1; /* State 2 */ 1091 1092 unsigned long off1min; 1093 unsigned long off1dot; /* State 2 + jiffies */ 1094 unsigned long off1max; 1095 unsigned int on2; /* State 3 */ 1096 1097 unsigned long on2min; 1098 unsigned long on2dot; 1099 unsigned long on2max; 1100 unsigned int off2; /* State 4 */ 1101 1102 unsigned long off2min; 1103 unsigned long off2dot; /* State 4 + jiffies */ 1104 unsigned long off2max; 1105 unsigned int on3; /* State 5 */ 1106 1107 unsigned long on3min; 1108 unsigned long on3dot; 1109 unsigned long on3max; 1110 unsigned int off3; /* State 6 */ 1111 1112 unsigned long off3min; 1113 unsigned long off3dot; /* State 6 + jiffies */ 1114 unsigned long off3max; 1115} IXJ_CADENCE_F; 1116 1117typedef struct { 1118 unsigned int busytone:1; 1119 unsigned int dialtone:1; 1120 unsigned int ringback:1; 1121 unsigned int ringing:1; 1122 unsigned int playing:1; 1123 unsigned int recording:1; 1124 unsigned int cringing:1; 1125 unsigned int play_first_frame:1; 1126 unsigned int pstn_present:1; 1127 unsigned int pstn_ringing:1; 1128 unsigned int pots_correct:1; 1129 unsigned int pots_pstn:1; 1130 unsigned int g729_loaded:1; 1131 unsigned int ts85_loaded:1; 1132 unsigned int dtmf_oob:1; /* DTMF Out-Of-Band */ 1133 1134 unsigned int pcmciascp:1; /* SmartCABLE Present */ 1135 1136 unsigned int pcmciasct:2; /* SmartCABLE Type */ 1137 1138 unsigned int pcmciastate:3; /* SmartCABLE Init State */ 1139 1140 unsigned int inwrite:1; /* Currently writing */ 1141 1142 unsigned int inread:1; /* Currently reading */ 1143 1144 unsigned int incheck:1; /* Currently checking the SmartCABLE */ 1145 1146 unsigned int cidplay:1; /* Currently playing Caller ID */ 1147 1148 unsigned int cidring:1; /* This is the ring for Caller ID */ 1149 1150 unsigned int cidsent:1; /* Caller ID has been sent */ 1151 1152 unsigned int cidcw_ack:1; /* Caller ID CW ACK (from CPE) */ 1153 unsigned int firstring:1; /* First ring cadence is complete */ 1154 unsigned int pstncheck:1; /* Currently checking the PSTN Line */ 1155 unsigned int pstn_rmr:1; 1156 unsigned int x:3; /* unsed bits */ 1157 1158} IXJ_FLAGS; 1159 1160/****************************************************************************** 1161* 1162* This structure holds the state of all of the Quicknet cards 1163* 1164******************************************************************************/ 1165 1166typedef struct { 1167 int elements_used; 1168 IXJ_CADENCE_TERM termination; 1169 IXJ_CADENCE_ELEMENT *ce; 1170} ixj_cadence; 1171 1172typedef struct { 1173 struct phone_device p; 1174 struct timer_list timer; 1175 unsigned int board; 1176 unsigned int DSPbase; 1177 unsigned int XILINXbase; 1178 unsigned int serial; 1179 atomic_t DSPWrite; 1180 struct phone_capability caplist[30]; 1181 unsigned int caps; 1182 struct pnp_dev *dev; 1183 unsigned int cardtype; 1184 unsigned int rec_codec; 1185 unsigned int cid_rec_codec; 1186 unsigned int cid_rec_volume; 1187 unsigned char cid_rec_flag; 1188 signed char rec_mode; 1189 unsigned int play_codec; 1190 unsigned int cid_play_codec; 1191 unsigned int cid_play_volume; 1192 unsigned char cid_play_flag; 1193 signed char play_mode; 1194 IXJ_FLAGS flags; 1195 unsigned long busyflags; 1196 unsigned int rec_frame_size; 1197 unsigned int play_frame_size; 1198 unsigned int cid_play_frame_size; 1199 unsigned int cid_base_frame_size; 1200 unsigned long cidcw_wait; 1201 int aec_level; 1202 int cid_play_aec_level; 1203 int readers, writers; 1204 wait_queue_head_t poll_q; 1205 wait_queue_head_t read_q; 1206 char *read_buffer, *read_buffer_end; 1207 char *read_convert_buffer; 1208 size_t read_buffer_size; 1209 unsigned int read_buffer_ready; 1210 wait_queue_head_t write_q; 1211 char *write_buffer, *write_buffer_end; 1212 char *write_convert_buffer; 1213 size_t write_buffer_size; 1214 unsigned int write_buffers_empty; 1215 unsigned long drybuffer; 1216 char *write_buffer_rp, *write_buffer_wp; 1217 char dtmfbuffer[80]; 1218 char dtmf_current; 1219 int dtmf_wp, dtmf_rp, dtmf_state, dtmf_proc; 1220 int tone_off_time, tone_on_time; 1221 struct fasync_struct *async_queue; 1222 unsigned long tone_start_jif; 1223 char tone_index; 1224 char tone_state; 1225 char maxrings; 1226 ixj_cadence *cadence_t; 1227 ixj_cadence *cadence_r; 1228 int tone_cadence_state; 1229 IXJ_CADENCE_F cadence_f[6]; 1230 DTMF dtmf; 1231 CPTF cptf; 1232 BYTES dsp; 1233 BYTES ver; 1234 BYTES scr; 1235 BYTES ssr; 1236 BYTES baseframe; 1237 HSR hsr; 1238 GPIO gpio; 1239 PLD_SCRR pld_scrr; 1240 PLD_SCRW pld_scrw; 1241 PLD_SLICW pld_slicw; 1242 PLD_SLICR pld_slicr; 1243 PLD_CLOCK pld_clock; 1244 PCMCIA_CR1 pccr1; 1245 PCMCIA_CR2 pccr2; 1246 PCMCIA_SCCR psccr; 1247 PCMCIA_SLIC pslic; 1248 char pscdd; 1249 Si3C1 sic1; 1250 Si3C2 sic2; 1251 Si3RXG sirxg; 1252 Si3ADC siadc; 1253 Si3DAC sidac; 1254 Si3STAT sistat; 1255 Si3AATT siaatt; 1256 MIX mix; 1257 unsigned short ring_cadence; 1258 int ring_cadence_t; 1259 unsigned long ring_cadence_jif; 1260 unsigned long checkwait; 1261 int intercom; 1262 int m_hook; 1263 int r_hook; 1264 int p_hook; 1265 char pstn_envelope; 1266 char pstn_cid_intr; 1267 unsigned char fskz; 1268 unsigned char fskphase; 1269 unsigned char fskcnt; 1270 unsigned int cidsize; 1271 unsigned int cidcnt; 1272 unsigned long pstn_cid_received; 1273 PHONE_CID cid; 1274 PHONE_CID cid_send; 1275 unsigned long pstn_ring_int; 1276 unsigned long pstn_ring_start; 1277 unsigned long pstn_ring_stop; 1278 unsigned long pstn_winkstart; 1279 unsigned long pstn_last_rmr; 1280 unsigned long pstn_prev_rmr; 1281 unsigned long pots_winkstart; 1282 unsigned int winktime; 1283 unsigned long flash_end; 1284 char port; 1285 char hookstate; 1286 union telephony_exception ex; 1287 union telephony_exception ex_sig; 1288 int ixj_signals[35]; 1289 IXJ_SIGDEF sigdef; 1290 char daa_mode; 1291 char daa_country; 1292 unsigned long pstn_sleeptil; 1293 DAA_REGS m_DAAShadowRegs; 1294 Proc_Info_Type Info_read; 1295 Proc_Info_Type Info_write; 1296 unsigned short frame_count; 1297 unsigned int filter_hist[4]; 1298 unsigned char filter_en[4]; 1299 unsigned short proc_load; 1300 unsigned long framesread; 1301 unsigned long frameswritten; 1302 unsigned long read_wait; 1303 unsigned long write_wait; 1304 unsigned long timerchecks; 1305 unsigned long txreadycheck; 1306 unsigned long rxreadycheck; 1307 unsigned long statuswait; 1308 unsigned long statuswaitfail; 1309 unsigned long pcontrolwait; 1310 unsigned long pcontrolwaitfail; 1311 unsigned long iscontrolready; 1312 unsigned long iscontrolreadyfail; 1313 unsigned long pstnstatecheck; 1314#ifdef IXJ_DYN_ALLOC 1315 short *fskdata; 1316#else 1317 short fskdata[8000]; 1318#endif 1319 int fsksize; 1320 int fskdcnt; 1321} IXJ; 1322 1323typedef int (*IXJ_REGFUNC) (IXJ * j, unsigned long arg); 1324 1325extern IXJ *ixj_pcmcia_probe(unsigned long, unsigned long); 1326