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1#ifndef _ASM_POWERPC_PAGE_64_H
2#define _ASM_POWERPC_PAGE_64_H
3
4/*
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
15 * specific, every notion of page number shared with the firmware, TCEs,
16 * iommu, etc... still uses a page size of 4K.
17 */
18#define HW_PAGE_SHIFT 12
19#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
20#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
21
22/*
23 * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
24 * HW_PAGE_SHIFT, that is 4K pages.
25 */
26#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
27
28#define REGION_SIZE 4UL
29#define REGION_SHIFT 60UL
30#define REGION_MASK (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)
31
32#define VMALLOCBASE ASM_CONST(0xD000000000000000)
33#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
34#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
35#define USER_REGION_ID (0UL)
36#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
37
38/* Segment size */
39#define SID_SHIFT 28
40#define SID_MASK 0xfffffffffUL
41#define ESID_MASK 0xfffffffff0000000UL
42#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
43
44#ifndef __ASSEMBLY__
45#include <asm/cache.h>
46
47typedef unsigned long pte_basic_t;
48
49static __inline__ void clear_page(void *addr)
50{
51 unsigned long lines, line_size;
52
53 line_size = ppc64_caches.dline_size;
54 lines = ppc64_caches.dlines_per_page;
55
56 __asm__ __volatile__(
57 "mtctr %1 # clear_page\n\
581: dcbz 0,%0\n\
59 add %0,%0,%3\n\
60 bdnz+ 1b"
61 : "=r" (addr)
62 : "r" (lines), "0" (addr), "r" (line_size)
63 : "ctr", "memory");
64}
65
66extern void copy_4K_page(void *to, void *from);
67
68#ifdef CONFIG_PPC_64K_PAGES
69static inline void copy_page(void *to, void *from)
70{
71 unsigned int i;
72 for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
73 copy_4K_page(to, from);
74 to += 4096;
75 from += 4096;
76 }
77}
78#else /* CONFIG_PPC_64K_PAGES */
79static inline void copy_page(void *to, void *from)
80{
81 copy_4K_page(to, from);
82}
83#endif /* CONFIG_PPC_64K_PAGES */
84
85/* Log 2 of page table size */
86extern u64 ppc64_pft_size;
87
88/* Large pages size */
89#ifdef CONFIG_HUGETLB_PAGE
90extern unsigned int HPAGE_SHIFT;
91#else
92#define HPAGE_SHIFT PAGE_SHIFT
93#endif
94#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
95#define HPAGE_MASK (~(HPAGE_SIZE - 1))
96#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
97
98#endif /* __ASSEMBLY__ */
99
100#ifdef CONFIG_HUGETLB_PAGE
101
102#define HTLB_AREA_SHIFT 40
103#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT)
104#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT)
105
106#define LOW_ESID_MASK(addr, len) (((1U << (GET_ESID(addr+len-1)+1)) \
107 - (1U << GET_ESID(addr))) & 0xffff)
108#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \
109 - (1U << GET_HTLB_AREA(addr))) & 0xffff)
110
111#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
112#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
113#define ARCH_HAS_SETCLEAR_HUGE_PTE
114
115#define touches_hugepage_low_range(mm, addr, len) \
116 (LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas)
117#define touches_hugepage_high_range(mm, addr, len) \
118 (HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas)
119
120#define __within_hugepage_low_range(addr, len, segmask) \
121 ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask))
122#define within_hugepage_low_range(addr, len) \
123 __within_hugepage_low_range((addr), (len), \
124 current->mm->context.low_htlb_areas)
125#define __within_hugepage_high_range(addr, len, zonemask) \
126 ((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask))
127#define within_hugepage_high_range(addr, len) \
128 __within_hugepage_high_range((addr), (len), \
129 current->mm->context.high_htlb_areas)
130
131#define is_hugepage_only_range(mm, addr, len) \
132 (touches_hugepage_high_range((mm), (addr), (len)) || \
133 touches_hugepage_low_range((mm), (addr), (len)))
134#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
135
136#define in_hugepage_area(context, addr) \
137 (cpu_has_feature(CPU_FTR_16M_PAGE) && \
138 ( ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) || \
139 ( ((addr) < 0x100000000L) && \
140 ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) ) )
141
142#else /* !CONFIG_HUGETLB_PAGE */
143
144#define in_hugepage_area(mm, addr) 0
145
146#endif /* !CONFIG_HUGETLB_PAGE */
147
148#ifdef MODULE
149#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
150#else
151#define __page_aligned \
152 __attribute__((__aligned__(PAGE_SIZE), \
153 __section__(".data.page_aligned")))
154#endif
155
156#define VM_DATA_DEFAULT_FLAGS \
157 (test_thread_flag(TIF_32BIT) ? \
158 VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
159
160/*
161 * This is the default if a program doesn't have a PT_GNU_STACK
162 * program header entry. The PPC64 ELF ABI has a non executable stack
163 * stack by default, so in the absense of a PT_GNU_STACK program header
164 * we turn execute permission off.
165 */
166#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
167 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
168
169#define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
170 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
171
172#define VM_STACK_DEFAULT_FLAGS \
173 (test_thread_flag(TIF_32BIT) ? \
174 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
175
176#include <asm-generic/page.h>
177
178#endif /* _ASM_POWERPC_PAGE_64_H */