at v2.6.15-rc2 201 lines 6.5 kB view raw
1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1996, 99 Ralf Baechle 7 * Copyright (C) 2000, 2002 Maciej W. Rozycki 8 * Copyright (C) 1990, 1999 by Silicon Graphics, Inc. 9 */ 10#ifndef _ASM_ADDRSPACE_H 11#define _ASM_ADDRSPACE_H 12 13#include <linux/config.h> 14#include <spaces.h> 15 16/* 17 * Configure language 18 */ 19#ifdef __ASSEMBLY__ 20#define _ATYPE_ 21#define _ATYPE32_ 22#define _ATYPE64_ 23#define _LLCONST_(x) x 24#else 25#define _ATYPE_ __PTRDIFF_TYPE__ 26#define _ATYPE32_ int 27#define _ATYPE64_ long long 28#define _LLCONST_(x) x ## LL 29#endif 30 31/* 32 * 32-bit MIPS address spaces 33 */ 34#ifdef __ASSEMBLY__ 35#define _ACAST32_ 36#define _ACAST64_ 37#else 38#define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */ 39#define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */ 40#endif 41 42/* 43 * Returns the kernel segment base of a given address 44 */ 45#define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000) 46 47/* 48 * Returns the physical address of a CKSEGx / XKPHYS address 49 */ 50#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) 51#define XPHYSADDR(a) ((_ACAST64_(a)) & \ 52 _LLCONST_(0x000000ffffffffff)) 53 54#ifdef CONFIG_64BIT 55 56/* 57 * Memory segments (64bit kernel mode addresses) 58 * The compatibility segments use the full 64-bit sign extended value. Note 59 * the R8000 doesn't have them so don't reference these in generic MIPS code. 60 */ 61#define XKUSEG _LLCONST_(0x0000000000000000) 62#define XKSSEG _LLCONST_(0x4000000000000000) 63#define XKPHYS _LLCONST_(0x8000000000000000) 64#define XKSEG _LLCONST_(0xc000000000000000) 65#define CKSEG0 _LLCONST_(0xffffffff80000000) 66#define CKSEG1 _LLCONST_(0xffffffffa0000000) 67#define CKSSEG _LLCONST_(0xffffffffc0000000) 68#define CKSEG3 _LLCONST_(0xffffffffe0000000) 69 70#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) 71#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) 72#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) 73#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) 74 75#else 76 77#define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 78#define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 79#define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 80#define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 81 82/* 83 * Map an address to a certain kernel segment 84 */ 85#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 86#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 87#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 88#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 89 90/* 91 * Memory segments (32bit kernel mode addresses) 92 * These are the traditional names used in the 32-bit universe. 93 */ 94#define KUSEG 0x00000000 95#define KSEG0 0x80000000 96#define KSEG1 0xa0000000 97#define KSEG2 0xc0000000 98#define KSEG3 0xe0000000 99 100#define CKUSEG 0x00000000 101#define CKSEG0 0x80000000 102#define CKSEG1 0xa0000000 103#define CKSEG2 0xc0000000 104#define CKSEG3 0xe0000000 105 106#endif 107 108/* 109 * Cache modes for XKPHYS address conversion macros 110 */ 111#define K_CALG_COH_EXCL1_NOL2 0 112#define K_CALG_COH_SHRL1_NOL2 1 113#define K_CALG_UNCACHED 2 114#define K_CALG_NONCOHERENT 3 115#define K_CALG_COH_EXCL 4 116#define K_CALG_COH_SHAREABLE 5 117#define K_CALG_NOTUSED 6 118#define K_CALG_UNCACHED_ACCEL 7 119 120/* 121 * 64-bit address conversions 122 */ 123#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) 124#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) 125#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) 126#define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \ 127 ((cm)<<59) | (a)) 128 129#if defined (CONFIG_CPU_R4300) \ 130 || defined (CONFIG_CPU_R4X00) \ 131 || defined (CONFIG_CPU_R5000) \ 132 || defined (CONFIG_CPU_NEVADA) \ 133 || defined (CONFIG_CPU_TX49XX) \ 134 || defined (CONFIG_CPU_MIPS64) 135#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ 136#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ 137#define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */ 138#define K1SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */ 139#define K2SIZE _LLCONST_(0x000000ff80000000) 140#define KSEGSIZE _LLCONST_(0x000000ff80000000) /* max syssegsz */ 141#define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */ 142#endif 143 144#if defined (CONFIG_CPU_R8000) 145/* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */ 146#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ 147#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ 148#define K0SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ 149#define K1SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ 150#define K2SIZE _LLCONST_(0x0001000000000000) 151#define KSEGSIZE _LLCONST_(0x0000010000000000) /* max syssegsz */ 152#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ 153#endif 154 155#if defined (CONFIG_CPU_R10000) 156#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ 157#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ 158#define K0SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ 159#define K1SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ 160#define K2SIZE _LLCONST_(0x00000fff80000000) 161#define KSEGSIZE _LLCONST_(0x00000fff80000000) /* max syssegsz */ 162#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ 163#endif 164 165#if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A) 166#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ 167#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */ 168#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ 169#define K1SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ 170#define K2SIZE _LLCONST_(0x0000ffff80000000) 171#define KSEGSIZE _LLCONST_(0x0000ffff80000000) /* max syssegsz */ 172#define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */ 173#endif 174 175/* 176 * Further names for SGI source compatibility. These are stolen from 177 * IRIX's <sys/mips_addrspace.h>. 178 */ 179#define KUBASE _LLCONST_(0) 180#define KUSIZE_32 _LLCONST_(0x0000000080000000) /* KUSIZE 181 for a 32 bit proc */ 182#define K0BASE_EXL_WR _LLCONST_(0xa800000000000000) /* exclusive on write */ 183#define K0BASE_NONCOH _LLCONST_(0x9800000000000000) /* noncoherent */ 184#define K0BASE_EXL _LLCONST_(0xa000000000000000) /* exclusive */ 185 186#ifndef CONFIG_CPU_R8000 187 188/* 189 * The R8000 doesn't have the 32-bit compat spaces so we don't define them 190 * in order to catch bugs in the source code. 191 */ 192 193#define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000) 194#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ 195 196#endif 197 198#define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK) 199#define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE) 200 201#endif /* _ASM_ADDRSPACE_H */