tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 */
8
9#include <linux/config.h>
10
11#ifndef __OVERDRIVE_H__
12#define __OVERDRIVE_H__
13
14#define OVERDRIVE_INT_CT 0xa3a00000
15#define OVERDRIVE_INT_DT 0xa3b00000
16
17#define OVERDRIVE_CTRL 0xa3000000
18
19/* Shoving all these bits into the same register is not a good idea.
20 * As soon as I get a spare moment, I'll change the FPGA and put each
21 * bit in a separate register
22 */
23
24#define VALID_CTRL_BITS 0x1f
25
26#define ENABLE_RS232_MASK 0x1e
27#define DISABLE_RS232_BIT 0x01
28
29#define ENABLE_NMI_MASK 0x1d
30#define DISABLE_NMI_BIT 0x02
31
32#define RESET_PCI_MASK 0x1b
33#define ENABLE_PCI_BIT 0x04
34
35#define ENABLE_LED_MASK 0x17
36#define DISABLE_LED_BIT 0x08
37
38#define RESET_FPGA_MASK 0x0f
39#define ENABLE_FPGA_BIT 0x10
40
41
42#define FPGA_DCLK_ADDRESS 0xA3C00000
43
44#define FPGA_DATA 0x01 /* W */
45#define FPGA_CONFDONE 0x02 /* R */
46#define FPGA_NOT_STATUS 0x04 /* R */
47#define FPGA_INITDONE 0x08 /* R */
48
49#define FPGA_TIMEOUT 100000
50
51
52/* Interrupts for the overdrive. Note that these numbers have
53 * nothing to do with the actual IRQ numbers they appear on,
54 * this is all programmable. This is simply the position in the
55 * INT_CT register.
56 */
57
58#define OVERDRIVE_PCI_INTA 0
59#define OVERDRIVE_PCI_INTB 1
60#define OVERDRIVE_PCI_INTC 2
61#define OVERDRIVE_PCI_INTD 3
62#define OVERDRIVE_GALILEO_INT 4
63#define OVERDRIVE_GALILEO_LOCAL_INT 5
64#define OVERDRIVE_AUDIO_INT 6
65#define OVERDRIVE_KEYBOARD_INT 7
66
67/* Which Linux IRQ should we assign to each interrupt source? */
68#define OVERDRIVE_PCI_IRQ1 2
69#ifdef CONFIG_HACKED_NE2K
70#define OVERDRIVE_PCI_IRQ2 7
71#else
72#define OVERDRIVE_PCI_IRQ2 2
73#undef OVERDRIVE_PCI_INTB
74#define OVERDRIVE_PCI_INTB OVERDRIVE_PCI_INTA
75
76#endif
77
78/* Put the ESS solo audio chip on IRQ 4 */
79#define OVERDRIVE_ESS_IRQ 4
80
81/* Where the memory behind the PCI bus appears */
82#define PCI_DRAM_BASE 0xb7000000
83#define PCI_DRAM_SIZE (16*1024*1024)
84#define PCI_DRAM_FINISH (PCI_DRAM_BASE+PCI_DRAM_SIZE-1)
85
86/* Where the IO region appears in the memory */
87#define PCI_GTIO_BASE 0xb8000000
88
89#endif