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1/* pgtable.h: FR-V page table mangling
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Derived from:
12 * include/asm-m68knommu/pgtable.h
13 * include/asm-i386/pgtable.h
14 */
15
16#ifndef _ASM_PGTABLE_H
17#define _ASM_PGTABLE_H
18
19#include <linux/config.h>
20#include <asm/mem-layout.h>
21#include <asm/setup.h>
22#include <asm/processor.h>
23
24#ifndef __ASSEMBLY__
25#include <linux/threads.h>
26#include <linux/slab.h>
27#include <linux/list.h>
28#include <linux/spinlock.h>
29#endif
30
31#ifndef __ASSEMBLY__
32#if defined(CONFIG_HIGHPTE)
33typedef unsigned long pte_addr_t;
34#else
35typedef pte_t *pte_addr_t;
36#endif
37#endif
38
39/*****************************************************************************/
40/*
41 * MMU-less operation case first
42 */
43#ifndef CONFIG_MMU
44
45#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
46#define pgd_none(pgd) (0)
47#define pgd_bad(pgd) (0)
48#define pgd_clear(pgdp)
49#define kern_addr_valid(addr) (1)
50#define pmd_offset(a, b) ((void *) 0)
51
52#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
53#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
54#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
55#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
56#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
57
58#define __swp_type(x) (0)
59#define __swp_offset(x) (0)
60#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
61#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
62#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
63
64#ifndef __ASSEMBLY__
65static inline int pte_file(pte_t pte) { return 0; }
66#endif
67
68#define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
69
70#define swapper_pg_dir ((pgd_t *) NULL)
71
72#define pgtable_cache_init() do {} while(0)
73
74#else /* !CONFIG_MMU */
75/*****************************************************************************/
76/*
77 * then MMU operation
78 */
79
80/*
81 * ZERO_PAGE is a global shared page that is always zero: used
82 * for zero-mapped memory areas etc..
83 */
84#ifndef __ASSEMBLY__
85extern unsigned long empty_zero_page;
86#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
87#endif
88
89/*
90 * we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
91 * [see Documentation/fujitsu/frv/mmu-layout.txt]
92 *
93 * Page Directory:
94 * - Size: 16KB
95 * - 64 PGEs per PGD
96 * - Each PGE holds 1 PUD and covers 64MB
97 *
98 * Page Upper Directory:
99 * - Size: 256B
100 * - 1 PUE per PUD
101 * - Each PUE holds 1 PMD and covers 64MB
102 *
103 * Page Mid-Level Directory
104 * - Size: 256B
105 * - 1 PME per PMD
106 * - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table
107 * - All STEs are instantiated at the same time
108 *
109 * Page Table
110 * - Size: 16KB
111 * - 4096 PTEs per PT
112 * - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries
113 *
114 * Pages
115 * - Size: 4KB
116 *
117 * total PTEs
118 * = 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs
119 * = 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT
120 * = 262144 (or 256 * 1024)
121 */
122#define PGDIR_SHIFT 26
123#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
124#define PGDIR_MASK (~(PGDIR_SIZE - 1))
125#define PTRS_PER_PGD 64
126
127#define PUD_SHIFT 26
128#define PTRS_PER_PUD 1
129#define PUD_SIZE (1UL << PUD_SHIFT)
130#define PUD_MASK (~(PUD_SIZE - 1))
131#define PUE_SIZE 256
132
133#define PMD_SHIFT 26
134#define PMD_SIZE (1UL << PMD_SHIFT)
135#define PMD_MASK (~(PMD_SIZE - 1))
136#define PTRS_PER_PMD 1
137#define PME_SIZE 256
138
139#define __frv_PT_SIZE 256
140
141#define PTRS_PER_PTE 4096
142
143#define USER_PGDS_IN_LAST_PML4 (TASK_SIZE / PGDIR_SIZE)
144#define FIRST_USER_ADDRESS 0
145
146#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
147#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
148
149#define TWOLEVEL_PGDIR_SHIFT 26
150#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
151#define BOOT_KERNEL_PGD_PTRS (PTRS_PER_PGD - BOOT_USER_PGD_PTRS)
152
153#ifndef __ASSEMBLY__
154
155extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
156
157#define pte_ERROR(e) \
158 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte)
159#define pmd_ERROR(e) \
160 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
161#define pud_ERROR(e) \
162 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e)))
163#define pgd_ERROR(e) \
164 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e))))
165
166/*
167 * Certain architectures need to do special things when PTEs
168 * within a page table are directly modified. Thus, the following
169 * hook is made available.
170 */
171#define set_pte(pteptr, pteval) \
172do { \
173 *(pteptr) = (pteval); \
174 asm volatile("dcf %M0" :: "U"(*pteptr)); \
175} while(0)
176#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
177
178#define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
179
180/*
181 * pgd_offset() returns a (pgd_t *)
182 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
183 */
184#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
185
186/*
187 * a shortcut which implies the use of the kernel's pgd, instead
188 * of a process's
189 */
190#define pgd_offset_k(address) pgd_offset(&init_mm, address)
191
192/*
193 * The "pgd_xxx()" functions here are trivial for a folded two-level
194 * setup: the pud is never bad, and a pud always exists (as it's folded
195 * into the pgd entry)
196 */
197static inline int pgd_none(pgd_t pgd) { return 0; }
198static inline int pgd_bad(pgd_t pgd) { return 0; }
199static inline int pgd_present(pgd_t pgd) { return 1; }
200static inline void pgd_clear(pgd_t *pgd) { }
201
202#define pgd_populate(mm, pgd, pud) do { } while (0)
203/*
204 * (puds are folded into pgds so this doesn't get actually called,
205 * but the define is needed for a generic inline function.)
206 */
207#define set_pgd(pgdptr, pgdval) \
208do { \
209 memcpy((pgdptr), &(pgdval), sizeof(pgd_t)); \
210 asm volatile("dcf %M0" :: "U"(*(pgdptr))); \
211} while(0)
212
213static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
214{
215 return (pud_t *) pgd;
216}
217
218#define pgd_page(pgd) (pud_page((pud_t){ pgd }))
219#define pgd_page_kernel(pgd) (pud_page_kernel((pud_t){ pgd }))
220
221/*
222 * allocating and freeing a pud is trivial: the 1-entry pud is
223 * inside the pgd, so has no extra memory associated with it.
224 */
225#define pud_alloc_one(mm, address) NULL
226#define pud_free(x) do { } while (0)
227#define __pud_free_tlb(tlb, x) do { } while (0)
228
229/*
230 * The "pud_xxx()" functions here are trivial for a folded two-level
231 * setup: the pmd is never bad, and a pmd always exists (as it's folded
232 * into the pud entry)
233 */
234static inline int pud_none(pud_t pud) { return 0; }
235static inline int pud_bad(pud_t pud) { return 0; }
236static inline int pud_present(pud_t pud) { return 1; }
237static inline void pud_clear(pud_t *pud) { }
238
239#define pud_populate(mm, pmd, pte) do { } while (0)
240
241/*
242 * (pmds are folded into puds so this doesn't get actually called,
243 * but the define is needed for a generic inline function.)
244 */
245#define set_pud(pudptr, pudval) set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval })
246
247#define pud_page(pud) (pmd_page((pmd_t){ pud }))
248#define pud_page_kernel(pud) (pmd_page_kernel((pmd_t){ pud }))
249
250/*
251 * (pmds are folded into pgds so this doesn't get actually called,
252 * but the define is needed for a generic inline function.)
253 */
254extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd);
255
256#define set_pmd(pmdptr, pmdval) \
257do { \
258 __set_pmd((pmdptr), (pmdval).ste[0]); \
259} while(0)
260
261#define __pmd_index(address) 0
262
263static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address)
264{
265 return (pmd_t *) dir + __pmd_index(address);
266}
267
268#define pte_same(a, b) ((a).pte == (b).pte)
269#define pte_page(x) (mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT))))
270#define pte_none(x) (!(x).pte)
271#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
272#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
273#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
274
275#define VMALLOC_VMADDR(x) ((unsigned long) (x))
276
277#endif /* !__ASSEMBLY__ */
278
279/*
280 * control flags in AMPR registers and TLB entries
281 */
282#define _PAGE_BIT_PRESENT xAMPRx_V_BIT
283#define _PAGE_BIT_WP DAMPRx_WP_BIT
284#define _PAGE_BIT_NOCACHE xAMPRx_C_BIT
285#define _PAGE_BIT_SUPER xAMPRx_S_BIT
286#define _PAGE_BIT_ACCESSED xAMPRx_RESERVED8_BIT
287#define _PAGE_BIT_DIRTY xAMPRx_M_BIT
288#define _PAGE_BIT_NOTGLOBAL xAMPRx_NG_BIT
289
290#define _PAGE_PRESENT xAMPRx_V
291#define _PAGE_WP DAMPRx_WP
292#define _PAGE_NOCACHE xAMPRx_C
293#define _PAGE_SUPER xAMPRx_S
294#define _PAGE_ACCESSED xAMPRx_RESERVED8 /* accessed if set */
295#define _PAGE_DIRTY xAMPRx_M
296#define _PAGE_NOTGLOBAL xAMPRx_NG
297
298#define _PAGE_RESERVED_MASK (xAMPRx_RESERVED8 | xAMPRx_RESERVED13)
299
300#define _PAGE_FILE 0x002 /* set:pagecache unset:swap */
301#define _PAGE_PROTNONE 0x000 /* If not present */
302
303#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
304
305#define __PGPROT_BASE \
306 (_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_NOTGLOBAL | _PAGE_ACCESSED)
307
308#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
309#define PAGE_SHARED __pgprot(__PGPROT_BASE)
310#define PAGE_COPY __pgprot(__PGPROT_BASE | _PAGE_WP)
311#define PAGE_READONLY __pgprot(__PGPROT_BASE | _PAGE_WP)
312
313#define __PAGE_KERNEL (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY)
314#define __PAGE_KERNEL_NOCACHE (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_NOCACHE)
315#define __PAGE_KERNEL_RO (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_WP)
316
317#define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL)
318
319#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
320#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
321#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
322
323#define _PAGE_TABLE (_PAGE_PRESENT | xAMPRx_SS_16Kb)
324
325#ifndef __ASSEMBLY__
326
327/*
328 * The FR451 can do execute protection by virtue of having separate TLB miss handlers for
329 * instruction access and for data access. However, we don't have enough reserved bits to say
330 * "execute only", so we don't bother. If you can read it, you can execute it and vice versa.
331 */
332#define __P000 PAGE_NONE
333#define __P001 PAGE_READONLY
334#define __P010 PAGE_COPY
335#define __P011 PAGE_COPY
336#define __P100 PAGE_READONLY
337#define __P101 PAGE_READONLY
338#define __P110 PAGE_COPY
339#define __P111 PAGE_COPY
340
341#define __S000 PAGE_NONE
342#define __S001 PAGE_READONLY
343#define __S010 PAGE_SHARED
344#define __S011 PAGE_SHARED
345#define __S100 PAGE_READONLY
346#define __S101 PAGE_READONLY
347#define __S110 PAGE_SHARED
348#define __S111 PAGE_SHARED
349
350/*
351 * Define this to warn about kernel memory accesses that are
352 * done without a 'access_ok(VERIFY_WRITE,..)'
353 */
354#undef TEST_ACCESS_OK
355
356#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
357#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
358
359#define pmd_none(x) (!pmd_val(x))
360#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
361#define pmd_bad(x) (pmd_val(x) & xAMPRx_SS)
362#define pmd_clear(xp) do { __set_pmd(xp, 0); } while(0)
363
364#define pmd_page_kernel(pmd) \
365 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
366
367#ifndef CONFIG_DISCONTIGMEM
368#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
369#endif
370
371#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
372
373/*
374 * The following only work if pte_present() is true.
375 * Undefined behaviour if not..
376 */
377static inline int pte_read(pte_t pte) { return !((pte).pte & _PAGE_SUPER); }
378static inline int pte_exec(pte_t pte) { return !((pte).pte & _PAGE_SUPER); }
379static inline int pte_dirty(pte_t pte) { return (pte).pte & _PAGE_DIRTY; }
380static inline int pte_young(pte_t pte) { return (pte).pte & _PAGE_ACCESSED; }
381static inline int pte_write(pte_t pte) { return !((pte).pte & _PAGE_WP); }
382
383static inline pte_t pte_rdprotect(pte_t pte) { (pte).pte |= _PAGE_SUPER; return pte; }
384static inline pte_t pte_exprotect(pte_t pte) { (pte).pte |= _PAGE_SUPER; return pte; }
385static inline pte_t pte_mkclean(pte_t pte) { (pte).pte &= ~_PAGE_DIRTY; return pte; }
386static inline pte_t pte_mkold(pte_t pte) { (pte).pte &= ~_PAGE_ACCESSED; return pte; }
387static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte |= _PAGE_WP; return pte; }
388static inline pte_t pte_mkread(pte_t pte) { (pte).pte &= ~_PAGE_SUPER; return pte; }
389static inline pte_t pte_mkexec(pte_t pte) { (pte).pte &= ~_PAGE_SUPER; return pte; }
390static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte |= _PAGE_DIRTY; return pte; }
391static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte |= _PAGE_ACCESSED; return pte; }
392static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte &= ~_PAGE_WP; return pte; }
393
394static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
395{
396 int i = test_and_clear_bit(_PAGE_BIT_DIRTY, ptep);
397 asm volatile("dcf %M0" :: "U"(*ptep));
398 return i;
399}
400
401static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
402{
403 int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
404 asm volatile("dcf %M0" :: "U"(*ptep));
405 return i;
406}
407
408static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
409{
410 unsigned long x = xchg(&ptep->pte, 0);
411 asm volatile("dcf %M0" :: "U"(*ptep));
412 return __pte(x);
413}
414
415static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
416{
417 set_bit(_PAGE_BIT_WP, ptep);
418 asm volatile("dcf %M0" :: "U"(*ptep));
419}
420
421/*
422 * Conversion functions: convert a page and protection to a page entry,
423 * and a page entry and page directory to the page they refer to.
424 */
425
426#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
427#define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)
428
429/* This takes a physical page address that is used by the remapping functions */
430#define mk_pte_phys(physpage, pgprot) pfn_pte((physpage) >> PAGE_SHIFT, pgprot)
431
432static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
433{
434 pte.pte &= _PAGE_CHG_MASK;
435 pte.pte |= pgprot_val(newprot);
436 return pte;
437}
438
439#define page_pte(page) page_pte_prot((page), __pgprot(0))
440
441/* to find an entry in a page-table-directory. */
442#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
443#define pgd_index_k(addr) pgd_index(addr)
444
445/* Find an entry in the bottom-level page table.. */
446#define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
447
448/*
449 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
450 *
451 * this macro returns the index of the entry in the pte page which would
452 * control the given virtual address
453 */
454#define pte_index(address) \
455 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
456#define pte_offset_kernel(dir, address) \
457 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
458
459#if defined(CONFIG_HIGHPTE)
460#define pte_offset_map(dir, address) \
461 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
462#define pte_offset_map_nested(dir, address) \
463 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
464#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
465#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
466#else
467#define pte_offset_map(dir, address) \
468 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
469#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
470#define pte_unmap(pte) do { } while (0)
471#define pte_unmap_nested(pte) do { } while (0)
472#endif
473
474/*
475 * Handle swap and file entries
476 * - the PTE is encoded in the following format:
477 * bit 0: Must be 0 (!_PAGE_PRESENT)
478 * bit 1: Type: 0 for swap, 1 for file (_PAGE_FILE)
479 * bits 2-7: Swap type
480 * bits 8-31: Swap offset
481 * bits 2-31: File pgoff
482 */
483#define __swp_type(x) (((x).val >> 2) & 0x1f)
484#define __swp_offset(x) ((x).val >> 8)
485#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
486#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte })
487#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
488
489static inline int pte_file(pte_t pte)
490{
491 return pte.pte & _PAGE_FILE;
492}
493
494#define PTE_FILE_MAX_BITS 29
495
496#define pte_to_pgoff(PTE) ((PTE).pte >> 2)
497#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
498
499/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
500#define PageSkip(page) (0)
501#define kern_addr_valid(addr) (1)
502
503#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
504 remap_pfn_range(vma, vaddr, pfn, size, prot)
505
506#define MK_IOSPACE_PFN(space, pfn) (pfn)
507#define GET_IOSPACE(pfn) 0
508#define GET_PFN(pfn) (pfn)
509
510#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
511#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
512#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
513#define __HAVE_ARCH_PTEP_SET_WRPROTECT
514#define __HAVE_ARCH_PTE_SAME
515#include <asm-generic/pgtable.h>
516
517/*
518 * preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache
519 */
520static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
521{
522 unsigned long ampr;
523 pgd_t *pge = pgd_offset(current->mm, address);
524 pud_t *pue = pud_offset(pge, address);
525 pmd_t *pme = pmd_offset(pue, address);
526
527 ampr = pme->ste[0] & 0xffffff00;
528 ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C | xAMPRx_V;
529
530 asm volatile("movgs %0,scr0\n"
531 "movgs %0,scr1\n"
532 "movgs %1,dampr4\n"
533 "movgs %1,dampr5\n"
534 :
535 : "r"(address), "r"(ampr)
536 );
537}
538
539#ifdef CONFIG_PROC_FS
540extern char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer);
541#endif
542
543extern void __init pgtable_cache_init(void);
544
545#endif /* !__ASSEMBLY__ */
546#endif /* !CONFIG_MMU */
547
548#ifndef __ASSEMBLY__
549extern void __init paging_init(void);
550#endif /* !__ASSEMBLY__ */
551
552#endif /* _ASM_PGTABLE_H */