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1/*
2 * Private header file for the (dumb) serial driver
3 *
4 * Copyright (C) 1997 by Theodore Ts'o.
5 *
6 * Redistribution of this file is permitted under the terms of the GNU
7 * Public License (GPL)
8 */
9
10#ifndef _LINUX_SERIALP_H
11#define _LINUX_SERIALP_H
12
13/*
14 * This is our internal structure for each serial port's state.
15 *
16 * Many fields are paralleled by the structure used by the serial_struct
17 * structure.
18 *
19 * For definitions of the flags field, see tty.h
20 */
21
22#include <linux/config.h>
23#include <linux/termios.h>
24#include <linux/workqueue.h>
25#include <linux/interrupt.h>
26#include <linux/circ_buf.h>
27#include <linux/wait.h>
28
29struct serial_state {
30 int magic;
31 int baud_base;
32 unsigned long port;
33 int irq;
34 int flags;
35 int hub6;
36 int type;
37 int line;
38 int revision; /* Chip revision (950) */
39 int xmit_fifo_size;
40 int custom_divisor;
41 int count;
42 u8 *iomem_base;
43 u16 iomem_reg_shift;
44 unsigned short close_delay;
45 unsigned short closing_wait; /* time to wait before closing */
46 struct async_icount icount;
47 int io_type;
48 struct async_struct *info;
49 struct pci_dev *dev;
50};
51
52struct async_struct {
53 int magic;
54 unsigned long port;
55 int hub6;
56 int flags;
57 int xmit_fifo_size;
58 struct serial_state *state;
59 struct tty_struct *tty;
60 int read_status_mask;
61 int ignore_status_mask;
62 int timeout;
63 int quot;
64 int x_char; /* xon/xoff character */
65 int close_delay;
66 unsigned short closing_wait;
67 unsigned short closing_wait2; /* obsolete */
68 int IER; /* Interrupt Enable Register */
69 int MCR; /* Modem control register */
70 int LCR; /* Line control register */
71 int ACR; /* 16950 Additional Control Reg. */
72 unsigned long event;
73 unsigned long last_active;
74 int line;
75 int blocked_open; /* # of blocked opens */
76 struct circ_buf xmit;
77 spinlock_t xmit_lock;
78 u8 *iomem_base;
79 u16 iomem_reg_shift;
80 int io_type;
81 struct work_struct work;
82 struct tasklet_struct tlet;
83#ifdef DECLARE_WAITQUEUE
84 wait_queue_head_t open_wait;
85 wait_queue_head_t close_wait;
86 wait_queue_head_t delta_msr_wait;
87#else
88 struct wait_queue *open_wait;
89 struct wait_queue *close_wait;
90 struct wait_queue *delta_msr_wait;
91#endif
92 struct async_struct *next_port; /* For the linked list */
93 struct async_struct *prev_port;
94};
95
96#define CONFIGURED_SERIAL_PORT(info) ((info)->port || ((info)->iomem_base))
97
98#define SERIAL_MAGIC 0x5301
99#define SSTATE_MAGIC 0x5302
100
101/*
102 * Events are used to schedule things to happen at timer-interrupt
103 * time, instead of at rs interrupt time.
104 */
105#define RS_EVENT_WRITE_WAKEUP 0
106
107/*
108 * Multiport serial configuration structure --- internal structure
109 */
110struct rs_multiport_struct {
111 int port1;
112 unsigned char mask1, match1;
113 int port2;
114 unsigned char mask2, match2;
115 int port3;
116 unsigned char mask3, match3;
117 int port4;
118 unsigned char mask4, match4;
119 int port_monitor;
120};
121
122#if defined(__alpha__) && !defined(CONFIG_PCI)
123/*
124 * Digital did something really horribly wrong with the OUT1 and OUT2
125 * lines on at least some ALPHA's. The failure mode is that if either
126 * is cleared, the machine locks up with endless interrupts.
127 *
128 * This is still used by arch/mips/au1000/common/serial.c for some weird
129 * reason (mips != alpha!)
130 */
131#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
132#elif defined(CONFIG_SBC8560)
133/*
134 * WindRiver did something similarly broken on their SBC8560 board. The
135 * UART tristates its IRQ output while OUT2 is clear, but they pulled
136 * the interrupt line _up_ instead of down, so if we register the IRQ
137 * while the UART is in that state, we die in an IRQ storm. */
138#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
139#else
140#define ALPHA_KLUDGE_MCR 0
141#endif
142
143/*
144 * Definitions for PCI support.
145 */
146#define SPCI_FL_BASE_MASK 0x0007
147#define SPCI_FL_BASE0 0x0000
148#define SPCI_FL_BASE1 0x0001
149#define SPCI_FL_BASE2 0x0002
150#define SPCI_FL_BASE3 0x0003
151#define SPCI_FL_BASE4 0x0004
152#define SPCI_FL_GET_BASE(x) (x & SPCI_FL_BASE_MASK)
153
154#define SPCI_FL_IRQ_MASK (0x0007 << 4)
155#define SPCI_FL_IRQBASE0 (0x0000 << 4)
156#define SPCI_FL_IRQBASE1 (0x0001 << 4)
157#define SPCI_FL_IRQBASE2 (0x0002 << 4)
158#define SPCI_FL_IRQBASE3 (0x0003 << 4)
159#define SPCI_FL_IRQBASE4 (0x0004 << 4)
160#define SPCI_FL_GET_IRQBASE(x) ((x & SPCI_FL_IRQ_MASK) >> 4)
161
162/* Use successive BARs (PCI base address registers),
163 else use offset into some specified BAR */
164#define SPCI_FL_BASE_TABLE 0x0100
165
166/* Use successive entries in the irq resource table */
167#define SPCI_FL_IRQ_TABLE 0x0200
168
169/* Use the irq resource table instead of dev->irq */
170#define SPCI_FL_IRQRESOURCE 0x0400
171
172/* Use the Base address register size to cap number of ports */
173#define SPCI_FL_REGION_SZ_CAP 0x0800
174
175/* Do not use irq sharing for this device */
176#define SPCI_FL_NO_SHIRQ 0x1000
177
178/* This is a PNP device */
179#define SPCI_FL_ISPNP 0x2000
180
181#define SPCI_FL_PNPDEFAULT (SPCI_FL_IRQRESOURCE|SPCI_FL_ISPNP)
182
183#endif /* _LINUX_SERIAL_H */