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1/*
2 * Private header file for the (dumb) serial driver
3 *
4 * Copyright (C) 1997 by Theodore Ts'o.
5 *
6 * Redistribution of this file is permitted under the terms of the GNU
7 * Public License (GPL)
8 */
9
10#ifndef _LINUX_SERIALP_H
11#define _LINUX_SERIALP_H
12
13/*
14 * This is our internal structure for each serial port's state.
15 *
16 * Many fields are paralleled by the structure used by the serial_struct
17 * structure.
18 *
19 * For definitions of the flags field, see tty.h
20 */
21
22#include <linux/version.h>
23#include <linux/config.h>
24#include <linux/termios.h>
25#include <linux/workqueue.h>
26#include <linux/interrupt.h>
27#include <linux/circ_buf.h>
28#include <linux/wait.h>
29
30struct serial_state {
31 int magic;
32 int baud_base;
33 unsigned long port;
34 int irq;
35 int flags;
36 int hub6;
37 int type;
38 int line;
39 int revision; /* Chip revision (950) */
40 int xmit_fifo_size;
41 int custom_divisor;
42 int count;
43 u8 *iomem_base;
44 u16 iomem_reg_shift;
45 unsigned short close_delay;
46 unsigned short closing_wait; /* time to wait before closing */
47 struct async_icount icount;
48 int io_type;
49 struct async_struct *info;
50 struct pci_dev *dev;
51};
52
53struct async_struct {
54 int magic;
55 unsigned long port;
56 int hub6;
57 int flags;
58 int xmit_fifo_size;
59 struct serial_state *state;
60 struct tty_struct *tty;
61 int read_status_mask;
62 int ignore_status_mask;
63 int timeout;
64 int quot;
65 int x_char; /* xon/xoff character */
66 int close_delay;
67 unsigned short closing_wait;
68 unsigned short closing_wait2; /* obsolete */
69 int IER; /* Interrupt Enable Register */
70 int MCR; /* Modem control register */
71 int LCR; /* Line control register */
72 int ACR; /* 16950 Additional Control Reg. */
73 unsigned long event;
74 unsigned long last_active;
75 int line;
76 int blocked_open; /* # of blocked opens */
77 struct circ_buf xmit;
78 spinlock_t xmit_lock;
79 u8 *iomem_base;
80 u16 iomem_reg_shift;
81 int io_type;
82 struct work_struct work;
83 struct tasklet_struct tlet;
84#ifdef DECLARE_WAITQUEUE
85 wait_queue_head_t open_wait;
86 wait_queue_head_t close_wait;
87 wait_queue_head_t delta_msr_wait;
88#else
89 struct wait_queue *open_wait;
90 struct wait_queue *close_wait;
91 struct wait_queue *delta_msr_wait;
92#endif
93 struct async_struct *next_port; /* For the linked list */
94 struct async_struct *prev_port;
95};
96
97#define CONFIGURED_SERIAL_PORT(info) ((info)->port || ((info)->iomem_base))
98
99#define SERIAL_MAGIC 0x5301
100#define SSTATE_MAGIC 0x5302
101
102/*
103 * Events are used to schedule things to happen at timer-interrupt
104 * time, instead of at rs interrupt time.
105 */
106#define RS_EVENT_WRITE_WAKEUP 0
107
108/*
109 * Multiport serial configuration structure --- internal structure
110 */
111struct rs_multiport_struct {
112 int port1;
113 unsigned char mask1, match1;
114 int port2;
115 unsigned char mask2, match2;
116 int port3;
117 unsigned char mask3, match3;
118 int port4;
119 unsigned char mask4, match4;
120 int port_monitor;
121};
122
123#if defined(__alpha__) && !defined(CONFIG_PCI)
124/*
125 * Digital did something really horribly wrong with the OUT1 and OUT2
126 * lines on at least some ALPHA's. The failure mode is that if either
127 * is cleared, the machine locks up with endless interrupts.
128 *
129 * This is still used by arch/mips/au1000/common/serial.c for some weird
130 * reason (mips != alpha!)
131 */
132#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
133#elif defined(CONFIG_SBC8560)
134/*
135 * WindRiver did something similarly broken on their SBC8560 board. The
136 * UART tristates its IRQ output while OUT2 is clear, but they pulled
137 * the interrupt line _up_ instead of down, so if we register the IRQ
138 * while the UART is in that state, we die in an IRQ storm. */
139#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
140#else
141#define ALPHA_KLUDGE_MCR 0
142#endif
143
144/*
145 * Definitions for PCI support.
146 */
147#define SPCI_FL_BASE_MASK 0x0007
148#define SPCI_FL_BASE0 0x0000
149#define SPCI_FL_BASE1 0x0001
150#define SPCI_FL_BASE2 0x0002
151#define SPCI_FL_BASE3 0x0003
152#define SPCI_FL_BASE4 0x0004
153#define SPCI_FL_GET_BASE(x) (x & SPCI_FL_BASE_MASK)
154
155#define SPCI_FL_IRQ_MASK (0x0007 << 4)
156#define SPCI_FL_IRQBASE0 (0x0000 << 4)
157#define SPCI_FL_IRQBASE1 (0x0001 << 4)
158#define SPCI_FL_IRQBASE2 (0x0002 << 4)
159#define SPCI_FL_IRQBASE3 (0x0003 << 4)
160#define SPCI_FL_IRQBASE4 (0x0004 << 4)
161#define SPCI_FL_GET_IRQBASE(x) ((x & SPCI_FL_IRQ_MASK) >> 4)
162
163/* Use successive BARs (PCI base address registers),
164 else use offset into some specified BAR */
165#define SPCI_FL_BASE_TABLE 0x0100
166
167/* Use successive entries in the irq resource table */
168#define SPCI_FL_IRQ_TABLE 0x0200
169
170/* Use the irq resource table instead of dev->irq */
171#define SPCI_FL_IRQRESOURCE 0x0400
172
173/* Use the Base address register size to cap number of ports */
174#define SPCI_FL_REGION_SZ_CAP 0x0800
175
176/* Do not use irq sharing for this device */
177#define SPCI_FL_NO_SHIRQ 0x1000
178
179/* This is a PNP device */
180#define SPCI_FL_ISPNP 0x2000
181
182#define SPCI_FL_PNPDEFAULT (SPCI_FL_IRQRESOURCE|SPCI_FL_ISPNP)
183
184#endif /* _LINUX_SERIAL_H */