Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v2.6.12 869 lines 21 kB view raw
1/* 2 * linux/drivers/serial/pxa.c 3 * 4 * Based on drivers/serial/8250.c by Russell King. 5 * 6 * Author: Nicolas Pitre 7 * Created: Feb 20, 2003 8 * Copyright: (C) 2003 Monta Vista Software, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * Note 1: This driver is made separate from the already too overloaded 16 * 8250.c because it needs some kirks of its own and that'll make it 17 * easier to add DMA support. 18 * 19 * Note 2: I'm too sick of device allocation policies for serial ports. 20 * If someone else wants to request an "official" allocation of major/minor 21 * for this driver please be my guest. And don't forget that new hardware 22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's 23 * hope for a better port registration and dynamic device allocation scheme 24 * with the serial core maintainer satisfaction to appear soon. 25 */ 26 27#include <linux/config.h> 28 29#if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 30#define SUPPORT_SYSRQ 31#endif 32 33#include <linux/module.h> 34#include <linux/ioport.h> 35#include <linux/init.h> 36#include <linux/console.h> 37#include <linux/sysrq.h> 38#include <linux/serial_reg.h> 39#include <linux/circ_buf.h> 40#include <linux/delay.h> 41#include <linux/interrupt.h> 42#include <linux/device.h> 43#include <linux/tty.h> 44#include <linux/tty_flip.h> 45#include <linux/serial_core.h> 46 47#include <asm/io.h> 48#include <asm/hardware.h> 49#include <asm/irq.h> 50#include <asm/arch/pxa-regs.h> 51 52 53struct uart_pxa_port { 54 struct uart_port port; 55 unsigned char ier; 56 unsigned char lcr; 57 unsigned char mcr; 58 unsigned int lsr_break_flag; 59 unsigned int cken; 60 char *name; 61}; 62 63static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) 64{ 65 offset <<= 2; 66 return readl(up->port.membase + offset); 67} 68 69static inline void serial_out(struct uart_pxa_port *up, int offset, int value) 70{ 71 offset <<= 2; 72 writel(value, up->port.membase + offset); 73} 74 75static void serial_pxa_enable_ms(struct uart_port *port) 76{ 77 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 78 79 up->ier |= UART_IER_MSI; 80 serial_out(up, UART_IER, up->ier); 81} 82 83static void serial_pxa_stop_tx(struct uart_port *port, unsigned int tty_stop) 84{ 85 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 86 87 if (up->ier & UART_IER_THRI) { 88 up->ier &= ~UART_IER_THRI; 89 serial_out(up, UART_IER, up->ier); 90 } 91} 92 93static void serial_pxa_stop_rx(struct uart_port *port) 94{ 95 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 96 97 up->ier &= ~UART_IER_RLSI; 98 up->port.read_status_mask &= ~UART_LSR_DR; 99 serial_out(up, UART_IER, up->ier); 100} 101 102static inline void 103receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs) 104{ 105 struct tty_struct *tty = up->port.info->tty; 106 unsigned int ch, flag; 107 int max_count = 256; 108 109 do { 110 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) { 111 if (tty->low_latency) 112 tty_flip_buffer_push(tty); 113 /* 114 * If this failed then we will throw away the 115 * bytes but must do so to clear interrupts 116 */ 117 } 118 ch = serial_in(up, UART_RX); 119 flag = TTY_NORMAL; 120 up->port.icount.rx++; 121 122 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | 123 UART_LSR_FE | UART_LSR_OE))) { 124 /* 125 * For statistics only 126 */ 127 if (*status & UART_LSR_BI) { 128 *status &= ~(UART_LSR_FE | UART_LSR_PE); 129 up->port.icount.brk++; 130 /* 131 * We do the SysRQ and SAK checking 132 * here because otherwise the break 133 * may get masked by ignore_status_mask 134 * or read_status_mask. 135 */ 136 if (uart_handle_break(&up->port)) 137 goto ignore_char; 138 } else if (*status & UART_LSR_PE) 139 up->port.icount.parity++; 140 else if (*status & UART_LSR_FE) 141 up->port.icount.frame++; 142 if (*status & UART_LSR_OE) 143 up->port.icount.overrun++; 144 145 /* 146 * Mask off conditions which should be ignored. 147 */ 148 *status &= up->port.read_status_mask; 149 150#ifdef CONFIG_SERIAL_PXA_CONSOLE 151 if (up->port.line == up->port.cons->index) { 152 /* Recover the break flag from console xmit */ 153 *status |= up->lsr_break_flag; 154 up->lsr_break_flag = 0; 155 } 156#endif 157 if (*status & UART_LSR_BI) { 158 flag = TTY_BREAK; 159 } else if (*status & UART_LSR_PE) 160 flag = TTY_PARITY; 161 else if (*status & UART_LSR_FE) 162 flag = TTY_FRAME; 163 } 164 165 if (uart_handle_sysrq_char(&up->port, ch, regs)) 166 goto ignore_char; 167 168 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag); 169 170 ignore_char: 171 *status = serial_in(up, UART_LSR); 172 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); 173 tty_flip_buffer_push(tty); 174} 175 176static void transmit_chars(struct uart_pxa_port *up) 177{ 178 struct circ_buf *xmit = &up->port.info->xmit; 179 int count; 180 181 if (up->port.x_char) { 182 serial_out(up, UART_TX, up->port.x_char); 183 up->port.icount.tx++; 184 up->port.x_char = 0; 185 return; 186 } 187 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 188 serial_pxa_stop_tx(&up->port, 0); 189 return; 190 } 191 192 count = up->port.fifosize / 2; 193 do { 194 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 195 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 196 up->port.icount.tx++; 197 if (uart_circ_empty(xmit)) 198 break; 199 } while (--count > 0); 200 201 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 202 uart_write_wakeup(&up->port); 203 204 205 if (uart_circ_empty(xmit)) 206 serial_pxa_stop_tx(&up->port, 0); 207} 208 209static void serial_pxa_start_tx(struct uart_port *port, unsigned int tty_start) 210{ 211 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 212 213 if (!(up->ier & UART_IER_THRI)) { 214 up->ier |= UART_IER_THRI; 215 serial_out(up, UART_IER, up->ier); 216 } 217} 218 219static inline void check_modem_status(struct uart_pxa_port *up) 220{ 221 int status; 222 223 status = serial_in(up, UART_MSR); 224 225 if ((status & UART_MSR_ANY_DELTA) == 0) 226 return; 227 228 if (status & UART_MSR_TERI) 229 up->port.icount.rng++; 230 if (status & UART_MSR_DDSR) 231 up->port.icount.dsr++; 232 if (status & UART_MSR_DDCD) 233 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 234 if (status & UART_MSR_DCTS) 235 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 236 237 wake_up_interruptible(&up->port.info->delta_msr_wait); 238} 239 240/* 241 * This handles the interrupt from one port. 242 */ 243static inline irqreturn_t 244serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs) 245{ 246 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id; 247 unsigned int iir, lsr; 248 249 iir = serial_in(up, UART_IIR); 250 if (iir & UART_IIR_NO_INT) 251 return IRQ_NONE; 252 lsr = serial_in(up, UART_LSR); 253 if (lsr & UART_LSR_DR) 254 receive_chars(up, &lsr, regs); 255 check_modem_status(up); 256 if (lsr & UART_LSR_THRE) 257 transmit_chars(up); 258 return IRQ_HANDLED; 259} 260 261static unsigned int serial_pxa_tx_empty(struct uart_port *port) 262{ 263 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 264 unsigned long flags; 265 unsigned int ret; 266 267 spin_lock_irqsave(&up->port.lock, flags); 268 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 269 spin_unlock_irqrestore(&up->port.lock, flags); 270 271 return ret; 272} 273 274static unsigned int serial_pxa_get_mctrl(struct uart_port *port) 275{ 276 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 277 unsigned long flags; 278 unsigned char status; 279 unsigned int ret; 280 281return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 282 spin_lock_irqsave(&up->port.lock, flags); 283 status = serial_in(up, UART_MSR); 284 spin_unlock_irqrestore(&up->port.lock, flags); 285 286 ret = 0; 287 if (status & UART_MSR_DCD) 288 ret |= TIOCM_CAR; 289 if (status & UART_MSR_RI) 290 ret |= TIOCM_RNG; 291 if (status & UART_MSR_DSR) 292 ret |= TIOCM_DSR; 293 if (status & UART_MSR_CTS) 294 ret |= TIOCM_CTS; 295 return ret; 296} 297 298static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl) 299{ 300 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 301 unsigned char mcr = 0; 302 303 if (mctrl & TIOCM_RTS) 304 mcr |= UART_MCR_RTS; 305 if (mctrl & TIOCM_DTR) 306 mcr |= UART_MCR_DTR; 307 if (mctrl & TIOCM_OUT1) 308 mcr |= UART_MCR_OUT1; 309 if (mctrl & TIOCM_OUT2) 310 mcr |= UART_MCR_OUT2; 311 if (mctrl & TIOCM_LOOP) 312 mcr |= UART_MCR_LOOP; 313 314 mcr |= up->mcr; 315 316 serial_out(up, UART_MCR, mcr); 317} 318 319static void serial_pxa_break_ctl(struct uart_port *port, int break_state) 320{ 321 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 322 unsigned long flags; 323 324 spin_lock_irqsave(&up->port.lock, flags); 325 if (break_state == -1) 326 up->lcr |= UART_LCR_SBC; 327 else 328 up->lcr &= ~UART_LCR_SBC; 329 serial_out(up, UART_LCR, up->lcr); 330 spin_unlock_irqrestore(&up->port.lock, flags); 331} 332 333#if 0 334static void serial_pxa_dma_init(struct pxa_uart *up) 335{ 336 up->rxdma = 337 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up); 338 if (up->rxdma < 0) 339 goto out; 340 up->txdma = 341 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up); 342 if (up->txdma < 0) 343 goto err_txdma; 344 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL); 345 if (!up->dmadesc) 346 goto err_alloc; 347 348 /* ... */ 349err_alloc: 350 pxa_free_dma(up->txdma); 351err_rxdma: 352 pxa_free_dma(up->rxdma); 353out: 354 return; 355} 356#endif 357 358static int serial_pxa_startup(struct uart_port *port) 359{ 360 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 361 unsigned long flags; 362 int retval; 363 364 up->mcr = 0; 365 366 /* 367 * Allocate the IRQ 368 */ 369 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); 370 if (retval) 371 return retval; 372 373 /* 374 * Clear the FIFO buffers and disable them. 375 * (they will be reenabled in set_termios()) 376 */ 377 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 378 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 379 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 380 serial_out(up, UART_FCR, 0); 381 382 /* 383 * Clear the interrupt registers. 384 */ 385 (void) serial_in(up, UART_LSR); 386 (void) serial_in(up, UART_RX); 387 (void) serial_in(up, UART_IIR); 388 (void) serial_in(up, UART_MSR); 389 390 /* 391 * Now, initialize the UART 392 */ 393 serial_out(up, UART_LCR, UART_LCR_WLEN8); 394 395 spin_lock_irqsave(&up->port.lock, flags); 396 up->port.mctrl |= TIOCM_OUT2; 397 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 398 spin_unlock_irqrestore(&up->port.lock, flags); 399 400 /* 401 * Finally, enable interrupts. Note: Modem status interrupts 402 * are set via set_termios(), which will be occuring imminently 403 * anyway, so we don't enable them here. 404 */ 405 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; 406 serial_out(up, UART_IER, up->ier); 407 408 /* 409 * And clear the interrupt registers again for luck. 410 */ 411 (void) serial_in(up, UART_LSR); 412 (void) serial_in(up, UART_RX); 413 (void) serial_in(up, UART_IIR); 414 (void) serial_in(up, UART_MSR); 415 416 return 0; 417} 418 419static void serial_pxa_shutdown(struct uart_port *port) 420{ 421 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 422 unsigned long flags; 423 424 free_irq(up->port.irq, up); 425 426 /* 427 * Disable interrupts from this port 428 */ 429 up->ier = 0; 430 serial_out(up, UART_IER, 0); 431 432 spin_lock_irqsave(&up->port.lock, flags); 433 up->port.mctrl &= ~TIOCM_OUT2; 434 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 435 spin_unlock_irqrestore(&up->port.lock, flags); 436 437 /* 438 * Disable break condition and FIFOs 439 */ 440 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 441 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 442 UART_FCR_CLEAR_RCVR | 443 UART_FCR_CLEAR_XMIT); 444 serial_out(up, UART_FCR, 0); 445} 446 447static void 448serial_pxa_set_termios(struct uart_port *port, struct termios *termios, 449 struct termios *old) 450{ 451 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 452 unsigned char cval, fcr = 0; 453 unsigned long flags; 454 unsigned int baud, quot; 455 456 switch (termios->c_cflag & CSIZE) { 457 case CS5: 458 cval = 0x00; 459 break; 460 case CS6: 461 cval = 0x01; 462 break; 463 case CS7: 464 cval = 0x02; 465 break; 466 default: 467 case CS8: 468 cval = 0x03; 469 break; 470 } 471 472 if (termios->c_cflag & CSTOPB) 473 cval |= 0x04; 474 if (termios->c_cflag & PARENB) 475 cval |= UART_LCR_PARITY; 476 if (!(termios->c_cflag & PARODD)) 477 cval |= UART_LCR_EPAR; 478 479 /* 480 * Ask the core to calculate the divisor for us. 481 */ 482 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 483 quot = uart_get_divisor(port, baud); 484 485 if ((up->port.uartclk / quot) < (2400 * 16)) 486 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; 487 else 488 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; 489 490 /* 491 * Ok, we're now changing the port state. Do it with 492 * interrupts disabled. 493 */ 494 spin_lock_irqsave(&up->port.lock, flags); 495 496 /* 497 * Ensure the port will be enabled. 498 * This is required especially for serial console. 499 */ 500 up->ier |= IER_UUE; 501 502 /* 503 * Update the per-port timeout. 504 */ 505 uart_update_timeout(port, termios->c_cflag, quot); 506 507 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 508 if (termios->c_iflag & INPCK) 509 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 510 if (termios->c_iflag & (BRKINT | PARMRK)) 511 up->port.read_status_mask |= UART_LSR_BI; 512 513 /* 514 * Characters to ignore 515 */ 516 up->port.ignore_status_mask = 0; 517 if (termios->c_iflag & IGNPAR) 518 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 519 if (termios->c_iflag & IGNBRK) { 520 up->port.ignore_status_mask |= UART_LSR_BI; 521 /* 522 * If we're ignoring parity and break indicators, 523 * ignore overruns too (for real raw support). 524 */ 525 if (termios->c_iflag & IGNPAR) 526 up->port.ignore_status_mask |= UART_LSR_OE; 527 } 528 529 /* 530 * ignore all characters if CREAD is not set 531 */ 532 if ((termios->c_cflag & CREAD) == 0) 533 up->port.ignore_status_mask |= UART_LSR_DR; 534 535 /* 536 * CTS flow control flag and modem status interrupts 537 */ 538 up->ier &= ~UART_IER_MSI; 539 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 540 up->ier |= UART_IER_MSI; 541 542 serial_out(up, UART_IER, up->ier); 543 544 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 545 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 546 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 547 serial_out(up, UART_LCR, cval); /* reset DLAB */ 548 up->lcr = cval; /* Save LCR */ 549 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 550 serial_out(up, UART_FCR, fcr); 551 spin_unlock_irqrestore(&up->port.lock, flags); 552} 553 554static void 555serial_pxa_pm(struct uart_port *port, unsigned int state, 556 unsigned int oldstate) 557{ 558 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 559 pxa_set_cken(up->cken, !state); 560 if (!state) 561 udelay(1); 562} 563 564static void serial_pxa_release_port(struct uart_port *port) 565{ 566} 567 568static int serial_pxa_request_port(struct uart_port *port) 569{ 570 return 0; 571} 572 573static void serial_pxa_config_port(struct uart_port *port, int flags) 574{ 575 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 576 up->port.type = PORT_PXA; 577} 578 579static int 580serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser) 581{ 582 /* we don't want the core code to modify any port params */ 583 return -EINVAL; 584} 585 586static const char * 587serial_pxa_type(struct uart_port *port) 588{ 589 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 590 return up->name; 591} 592 593#ifdef CONFIG_SERIAL_PXA_CONSOLE 594 595extern struct uart_pxa_port serial_pxa_ports[]; 596extern struct uart_driver serial_pxa_reg; 597 598#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 599 600/* 601 * Wait for transmitter & holding register to empty 602 */ 603static inline void wait_for_xmitr(struct uart_pxa_port *up) 604{ 605 unsigned int status, tmout = 10000; 606 607 /* Wait up to 10ms for the character(s) to be sent. */ 608 do { 609 status = serial_in(up, UART_LSR); 610 611 if (status & UART_LSR_BI) 612 up->lsr_break_flag = UART_LSR_BI; 613 614 if (--tmout == 0) 615 break; 616 udelay(1); 617 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 618 619 /* Wait up to 1s for flow control if necessary */ 620 if (up->port.flags & UPF_CONS_FLOW) { 621 tmout = 1000000; 622 while (--tmout && 623 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 624 udelay(1); 625 } 626} 627 628/* 629 * Print a string to the serial port trying not to disturb 630 * any possible real use of the port... 631 * 632 * The console_lock must be held when we get here. 633 */ 634static void 635serial_pxa_console_write(struct console *co, const char *s, unsigned int count) 636{ 637 struct uart_pxa_port *up = &serial_pxa_ports[co->index]; 638 unsigned int ier; 639 int i; 640 641 /* 642 * First save the UER then disable the interrupts 643 */ 644 ier = serial_in(up, UART_IER); 645 serial_out(up, UART_IER, UART_IER_UUE); 646 647 /* 648 * Now, do each character 649 */ 650 for (i = 0; i < count; i++, s++) { 651 wait_for_xmitr(up); 652 653 /* 654 * Send the character out. 655 * If a LF, also do CR... 656 */ 657 serial_out(up, UART_TX, *s); 658 if (*s == 10) { 659 wait_for_xmitr(up); 660 serial_out(up, UART_TX, 13); 661 } 662 } 663 664 /* 665 * Finally, wait for transmitter to become empty 666 * and restore the IER 667 */ 668 wait_for_xmitr(up); 669 serial_out(up, UART_IER, ier); 670} 671 672static int __init 673serial_pxa_console_setup(struct console *co, char *options) 674{ 675 struct uart_pxa_port *up; 676 int baud = 9600; 677 int bits = 8; 678 int parity = 'n'; 679 int flow = 'n'; 680 681 if (co->index == -1 || co->index >= serial_pxa_reg.nr) 682 co->index = 0; 683 up = &serial_pxa_ports[co->index]; 684 685 if (options) 686 uart_parse_options(options, &baud, &parity, &bits, &flow); 687 688 return uart_set_options(&up->port, co, baud, parity, bits, flow); 689} 690 691static struct console serial_pxa_console = { 692 .name = "ttyS", 693 .write = serial_pxa_console_write, 694 .device = uart_console_device, 695 .setup = serial_pxa_console_setup, 696 .flags = CON_PRINTBUFFER, 697 .index = -1, 698 .data = &serial_pxa_reg, 699}; 700 701static int __init 702serial_pxa_console_init(void) 703{ 704 register_console(&serial_pxa_console); 705 return 0; 706} 707 708console_initcall(serial_pxa_console_init); 709 710#define PXA_CONSOLE &serial_pxa_console 711#else 712#define PXA_CONSOLE NULL 713#endif 714 715struct uart_ops serial_pxa_pops = { 716 .tx_empty = serial_pxa_tx_empty, 717 .set_mctrl = serial_pxa_set_mctrl, 718 .get_mctrl = serial_pxa_get_mctrl, 719 .stop_tx = serial_pxa_stop_tx, 720 .start_tx = serial_pxa_start_tx, 721 .stop_rx = serial_pxa_stop_rx, 722 .enable_ms = serial_pxa_enable_ms, 723 .break_ctl = serial_pxa_break_ctl, 724 .startup = serial_pxa_startup, 725 .shutdown = serial_pxa_shutdown, 726 .set_termios = serial_pxa_set_termios, 727 .pm = serial_pxa_pm, 728 .type = serial_pxa_type, 729 .release_port = serial_pxa_release_port, 730 .request_port = serial_pxa_request_port, 731 .config_port = serial_pxa_config_port, 732 .verify_port = serial_pxa_verify_port, 733}; 734 735static struct uart_pxa_port serial_pxa_ports[] = { 736 { /* FFUART */ 737 .name = "FFUART", 738 .cken = CKEN6_FFUART, 739 .port = { 740 .type = PORT_PXA, 741 .iotype = UPIO_MEM, 742 .membase = (void *)&FFUART, 743 .mapbase = __PREG(FFUART), 744 .irq = IRQ_FFUART, 745 .uartclk = 921600 * 16, 746 .fifosize = 64, 747 .ops = &serial_pxa_pops, 748 .line = 0, 749 }, 750 }, { /* BTUART */ 751 .name = "BTUART", 752 .cken = CKEN7_BTUART, 753 .port = { 754 .type = PORT_PXA, 755 .iotype = UPIO_MEM, 756 .membase = (void *)&BTUART, 757 .mapbase = __PREG(BTUART), 758 .irq = IRQ_BTUART, 759 .uartclk = 921600 * 16, 760 .fifosize = 64, 761 .ops = &serial_pxa_pops, 762 .line = 1, 763 }, 764 }, { /* STUART */ 765 .name = "STUART", 766 .cken = CKEN5_STUART, 767 .port = { 768 .type = PORT_PXA, 769 .iotype = UPIO_MEM, 770 .membase = (void *)&STUART, 771 .mapbase = __PREG(STUART), 772 .irq = IRQ_STUART, 773 .uartclk = 921600 * 16, 774 .fifosize = 64, 775 .ops = &serial_pxa_pops, 776 .line = 2, 777 }, 778 } 779}; 780 781static struct uart_driver serial_pxa_reg = { 782 .owner = THIS_MODULE, 783 .driver_name = "PXA serial", 784 .devfs_name = "tts/", 785 .dev_name = "ttyS", 786 .major = TTY_MAJOR, 787 .minor = 64, 788 .nr = ARRAY_SIZE(serial_pxa_ports), 789 .cons = PXA_CONSOLE, 790}; 791 792static int serial_pxa_suspend(struct device *_dev, pm_message_t state, u32 level) 793{ 794 struct uart_pxa_port *sport = dev_get_drvdata(_dev); 795 796 if (sport && level == SUSPEND_DISABLE) 797 uart_suspend_port(&serial_pxa_reg, &sport->port); 798 799 return 0; 800} 801 802static int serial_pxa_resume(struct device *_dev, u32 level) 803{ 804 struct uart_pxa_port *sport = dev_get_drvdata(_dev); 805 806 if (sport && level == RESUME_ENABLE) 807 uart_resume_port(&serial_pxa_reg, &sport->port); 808 809 return 0; 810} 811 812static int serial_pxa_probe(struct device *_dev) 813{ 814 struct platform_device *dev = to_platform_device(_dev); 815 816 serial_pxa_ports[dev->id].port.dev = _dev; 817 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port); 818 dev_set_drvdata(_dev, &serial_pxa_ports[dev->id]); 819 return 0; 820} 821 822static int serial_pxa_remove(struct device *_dev) 823{ 824 struct uart_pxa_port *sport = dev_get_drvdata(_dev); 825 826 dev_set_drvdata(_dev, NULL); 827 828 if (sport) 829 uart_remove_one_port(&serial_pxa_reg, &sport->port); 830 831 return 0; 832} 833 834static struct device_driver serial_pxa_driver = { 835 .name = "pxa2xx-uart", 836 .bus = &platform_bus_type, 837 .probe = serial_pxa_probe, 838 .remove = serial_pxa_remove, 839 840 .suspend = serial_pxa_suspend, 841 .resume = serial_pxa_resume, 842}; 843 844int __init serial_pxa_init(void) 845{ 846 int ret; 847 848 ret = uart_register_driver(&serial_pxa_reg); 849 if (ret != 0) 850 return ret; 851 852 ret = driver_register(&serial_pxa_driver); 853 if (ret != 0) 854 uart_unregister_driver(&serial_pxa_reg); 855 856 return ret; 857} 858 859void __exit serial_pxa_exit(void) 860{ 861 driver_unregister(&serial_pxa_driver); 862 uart_unregister_driver(&serial_pxa_reg); 863} 864 865module_init(serial_pxa_init); 866module_exit(serial_pxa_exit); 867 868MODULE_LICENSE("GPL"); 869