tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1#ifndef _LINUX_VFC_H_
2#define _LINUX_VFC_H_
3
4#include <linux/devfs_fs_kernel.h>
5
6/*
7 * The control register for the vfc is at offset 0x4000
8 * The first field ram bank is located at offset 0x5000
9 * The second field ram bank is at offset 0x7000
10 * i2c_reg address the Phillips PCF8584(see notes in vfc_i2c.c)
11 * data and transmit register.
12 * i2c_s1 controls register s1 of the PCF8584
13 * i2c_write seems to be similar to i2c_write but I am not
14 * quite sure why sun uses it
15 *
16 * I am also not sure whether or not you can read the fram bank as a
17 * whole or whether you must read each word individually from offset
18 * 0x5000 as soon as I figure it out I will update this file */
19
20struct vfc_regs {
21 char pad1[0x4000];
22 unsigned int control; /* Offset 0x4000 */
23 char pad2[0xffb]; /* from offset 0x4004 to 0x5000 */
24 unsigned int fram_bank1; /* Offset 0x5000 */
25 char pad3[0xffb]; /* from offset 0x5004 to 0x6000 */
26 unsigned int i2c_reg; /* Offset 0x6000 */
27 unsigned int i2c_magic2; /* Offset 0x6004 */
28 unsigned int i2c_s1; /* Offset 0x6008 */
29 unsigned int i2c_write; /* Offset 0x600c */
30 char pad4[0xff0]; /* from offset 0x6010 to 0x7000 */
31 unsigned int fram_bank2; /* Offset 0x7000 */
32 char pad5[0x1000];
33};
34
35#define VFC_SAA9051_NR (13)
36#define VFC_SAA9051_ADDR (0x8a)
37 /* The saa9051 returns the following for its status
38 * bit 0 - 0
39 * bit 1 - SECAM color detected (1=found,0=not found)
40 * bit 2 - COLOR detected (1=found,0=not found)
41 * bit 3 - 0
42 * bit 4 - Field frequency bit (1=60Hz (NTSC), 0=50Hz (PAL))
43 * bit 5 - 1
44 * bit 6 - horizontal frequency lock (1=transmitter found,
45 * 0=no transmitter)
46 * bit 7 - Power on reset bit (1=reset,0=at least one successful
47 * read of the status byte)
48 */
49
50#define VFC_SAA9051_PONRES (0x80)
51#define VFC_SAA9051_HLOCK (0x40)
52#define VFC_SAA9051_FD (0x10)
53#define VFC_SAA9051_CD (0x04)
54#define VFC_SAA9051_CS (0x02)
55
56
57/* The various saa9051 sub addresses */
58
59#define VFC_SAA9051_IDEL (0)
60#define VFC_SAA9051_HSY_START (1)
61#define VFC_SAA9051_HSY_STOP (2)
62#define VFC_SAA9051_HC_START (3)
63#define VFC_SAA9051_HC_STOP (4)
64#define VFC_SAA9051_HS_START (5)
65#define VFC_SAA9051_HORIZ_PEAK (6)
66#define VFC_SAA9051_HUE (7)
67#define VFC_SAA9051_C1 (8)
68#define VFC_SAA9051_C2 (9)
69#define VFC_SAA9051_C3 (0xa)
70#define VFC_SAA9051_SECAM_DELAY (0xb)
71
72
73/* Bit settings for saa9051 sub address 0x06 */
74
75#define VFC_SAA9051_AP1 (0x01)
76#define VFC_SAA9051_AP2 (0x02)
77#define VFC_SAA9051_COR1 (0x04)
78#define VFC_SAA9051_COR2 (0x08)
79#define VFC_SAA9051_BP1 (0x10)
80#define VFC_SAA9051_BP2 (0x20)
81#define VFC_SAA9051_PF (0x40)
82#define VFC_SAA9051_BY (0x80)
83
84
85/* Bit settings for saa9051 sub address 0x08 */
86
87#define VFC_SAA9051_CCFR0 (0x01)
88#define VFC_SAA9051_CCFR1 (0x02)
89#define VFC_SAA9051_YPN (0x04)
90#define VFC_SAA9051_ALT (0x08)
91#define VFC_SAA9051_CO (0x10)
92#define VFC_SAA9051_VTR (0x20)
93#define VFC_SAA9051_FS (0x40)
94#define VFC_SAA9051_HPLL (0x80)
95
96
97/* Bit settings for saa9051 sub address 9 */
98
99#define VFC_SAA9051_SS0 (0x01)
100#define VFC_SAA9051_SS1 (0x02)
101#define VFC_SAA9051_AFCC (0x04)
102#define VFC_SAA9051_CI (0x08)
103#define VFC_SAA9051_SA9D4 (0x10) /* Don't care bit */
104#define VFC_SAA9051_OEC (0x20)
105#define VFC_SAA9051_OEY (0x40)
106#define VFC_SAA9051_VNL (0x80)
107
108
109/* Bit settings for saa9051 sub address 0x0A */
110
111#define VFC_SAA9051_YDL0 (0x01)
112#define VFC_SAA9051_YDL1 (0x02)
113#define VFC_SAA9051_YDL2 (0x04)
114#define VFC_SAA9051_SS2 (0x08)
115#define VFC_SAA9051_SS3 (0x10)
116#define VFC_SAA9051_YC (0x20)
117#define VFC_SAA9051_CT (0x40)
118#define VFC_SAA9051_SYC (0x80)
119
120
121#define VFC_SAA9051_SA(a,b) ((a)->saa9051_state_array[(b)+1])
122#define vfc_update_saa9051(a) (vfc_i2c_sendbuf((a),VFC_SAA9051_ADDR,\
123 (a)->saa9051_state_array,\
124 VFC_SAA9051_NR))
125
126
127struct vfc_dev {
128 volatile struct vfc_regs *regs;
129 struct vfc_regs *phys_regs;
130 unsigned int control_reg;
131 struct semaphore device_lock_sem;
132 struct timer_list poll_timer;
133 wait_queue_head_t poll_wait;
134 int instance;
135 int busy;
136 unsigned long which_io;
137 unsigned char saa9051_state_array[VFC_SAA9051_NR];
138};
139
140extern struct vfc_dev **vfc_dev_lst;
141
142void captstat_reset(struct vfc_dev *);
143void memptr_reset(struct vfc_dev *);
144
145int vfc_pcf8584_init(struct vfc_dev *);
146void vfc_i2c_delay_no_busy(struct vfc_dev *, unsigned long);
147void vfc_i2c_delay(struct vfc_dev *);
148int vfc_i2c_sendbuf(struct vfc_dev *, unsigned char, char *, int) ;
149int vfc_i2c_recvbuf(struct vfc_dev *, unsigned char, char *, int) ;
150int vfc_i2c_reset_bus(struct vfc_dev *);
151int vfc_init_i2c_bus(struct vfc_dev *);
152void vfc_lock_device(struct vfc_dev *);
153void vfc_unlock_device(struct vfc_dev *);
154
155#define VFC_CONTROL_DIAGMODE 0x10000000
156#define VFC_CONTROL_MEMPTR 0x20000000
157#define VFC_CONTROL_CAPTURE 0x02000000
158#define VFC_CONTROL_CAPTRESET 0x04000000
159
160#define VFC_STATUS_CAPTURE 0x08000000
161
162#ifdef VFC_IOCTL_DEBUG
163#define VFC_IOCTL_DEBUG_PRINTK(a) printk a
164#else
165#define VFC_IOCTL_DEBUG_PRINTK(a)
166#endif
167
168#ifdef VFC_I2C_DEBUG
169#define VFC_I2C_DEBUG_PRINTK(a) printk a
170#else
171#define VFC_I2C_DEBUG_PRINTK(a)
172#endif
173
174#endif /* _LINUX_VFC_H_ */
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