Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v2.6.12 3797 lines 107 kB view raw
1/******************************************************************************* 2 3 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms of the GNU General Public License as published by the Free 8 Software Foundation; either version 2 of the License, or (at your option) 9 any later version. 10 11 This program is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 more details. 15 16 You should have received a copy of the GNU General Public License along with 17 this program; if not, write to the Free Software Foundation, Inc., 59 18 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 20 The full GNU General Public License is included in this distribution in the 21 file called LICENSE. 22 23 Contact Information: 24 Linux NICS <linux.nics@intel.com> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29#include "e1000.h" 30 31/* Change Log 32 * 6.0.44+ 2/15/05 33 * o applied Anton's patch to resolve tx hang in hardware 34 * o Applied Andrew Mortons patch - e1000 stops working after resume 35 */ 36 37char e1000_driver_name[] = "e1000"; 38char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; 39#ifndef CONFIG_E1000_NAPI 40#define DRIVERNAPI 41#else 42#define DRIVERNAPI "-NAPI" 43#endif 44#define DRV_VERSION "6.0.54-k2"DRIVERNAPI 45char e1000_driver_version[] = DRV_VERSION; 46char e1000_copyright[] = "Copyright (c) 1999-2004 Intel Corporation."; 47 48/* e1000_pci_tbl - PCI Device ID Table 49 * 50 * Last entry must be all 0s 51 * 52 * Macro expands to... 53 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} 54 */ 55static struct pci_device_id e1000_pci_tbl[] = { 56 INTEL_E1000_ETHERNET_DEVICE(0x1000), 57 INTEL_E1000_ETHERNET_DEVICE(0x1001), 58 INTEL_E1000_ETHERNET_DEVICE(0x1004), 59 INTEL_E1000_ETHERNET_DEVICE(0x1008), 60 INTEL_E1000_ETHERNET_DEVICE(0x1009), 61 INTEL_E1000_ETHERNET_DEVICE(0x100C), 62 INTEL_E1000_ETHERNET_DEVICE(0x100D), 63 INTEL_E1000_ETHERNET_DEVICE(0x100E), 64 INTEL_E1000_ETHERNET_DEVICE(0x100F), 65 INTEL_E1000_ETHERNET_DEVICE(0x1010), 66 INTEL_E1000_ETHERNET_DEVICE(0x1011), 67 INTEL_E1000_ETHERNET_DEVICE(0x1012), 68 INTEL_E1000_ETHERNET_DEVICE(0x1013), 69 INTEL_E1000_ETHERNET_DEVICE(0x1014), 70 INTEL_E1000_ETHERNET_DEVICE(0x1015), 71 INTEL_E1000_ETHERNET_DEVICE(0x1016), 72 INTEL_E1000_ETHERNET_DEVICE(0x1017), 73 INTEL_E1000_ETHERNET_DEVICE(0x1018), 74 INTEL_E1000_ETHERNET_DEVICE(0x1019), 75 INTEL_E1000_ETHERNET_DEVICE(0x101A), 76 INTEL_E1000_ETHERNET_DEVICE(0x101D), 77 INTEL_E1000_ETHERNET_DEVICE(0x101E), 78 INTEL_E1000_ETHERNET_DEVICE(0x1026), 79 INTEL_E1000_ETHERNET_DEVICE(0x1027), 80 INTEL_E1000_ETHERNET_DEVICE(0x1028), 81 INTEL_E1000_ETHERNET_DEVICE(0x1075), 82 INTEL_E1000_ETHERNET_DEVICE(0x1076), 83 INTEL_E1000_ETHERNET_DEVICE(0x1077), 84 INTEL_E1000_ETHERNET_DEVICE(0x1078), 85 INTEL_E1000_ETHERNET_DEVICE(0x1079), 86 INTEL_E1000_ETHERNET_DEVICE(0x107A), 87 INTEL_E1000_ETHERNET_DEVICE(0x107B), 88 INTEL_E1000_ETHERNET_DEVICE(0x107C), 89 INTEL_E1000_ETHERNET_DEVICE(0x108A), 90 INTEL_E1000_ETHERNET_DEVICE(0x108B), 91 INTEL_E1000_ETHERNET_DEVICE(0x108C), 92 INTEL_E1000_ETHERNET_DEVICE(0x1099), 93 /* required last entry */ 94 {0,} 95}; 96 97MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 98 99int e1000_up(struct e1000_adapter *adapter); 100void e1000_down(struct e1000_adapter *adapter); 101void e1000_reset(struct e1000_adapter *adapter); 102int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); 103int e1000_setup_tx_resources(struct e1000_adapter *adapter); 104int e1000_setup_rx_resources(struct e1000_adapter *adapter); 105void e1000_free_tx_resources(struct e1000_adapter *adapter); 106void e1000_free_rx_resources(struct e1000_adapter *adapter); 107void e1000_update_stats(struct e1000_adapter *adapter); 108 109/* Local Function Prototypes */ 110 111static int e1000_init_module(void); 112static void e1000_exit_module(void); 113static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); 114static void __devexit e1000_remove(struct pci_dev *pdev); 115static int e1000_sw_init(struct e1000_adapter *adapter); 116static int e1000_open(struct net_device *netdev); 117static int e1000_close(struct net_device *netdev); 118static void e1000_configure_tx(struct e1000_adapter *adapter); 119static void e1000_configure_rx(struct e1000_adapter *adapter); 120static void e1000_setup_rctl(struct e1000_adapter *adapter); 121static void e1000_clean_tx_ring(struct e1000_adapter *adapter); 122static void e1000_clean_rx_ring(struct e1000_adapter *adapter); 123static void e1000_set_multi(struct net_device *netdev); 124static void e1000_update_phy_info(unsigned long data); 125static void e1000_watchdog(unsigned long data); 126static void e1000_watchdog_task(struct e1000_adapter *adapter); 127static void e1000_82547_tx_fifo_stall(unsigned long data); 128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); 129static struct net_device_stats * e1000_get_stats(struct net_device *netdev); 130static int e1000_change_mtu(struct net_device *netdev, int new_mtu); 131static int e1000_set_mac(struct net_device *netdev, void *p); 132static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs); 133static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter); 134#ifdef CONFIG_E1000_NAPI 135static int e1000_clean(struct net_device *netdev, int *budget); 136static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, 137 int *work_done, int work_to_do); 138static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 139 int *work_done, int work_to_do); 140#else 141static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter); 142static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter); 143#endif 144static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter); 145static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter); 146static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); 147static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 148 int cmd); 149void e1000_set_ethtool_ops(struct net_device *netdev); 150static void e1000_enter_82542_rst(struct e1000_adapter *adapter); 151static void e1000_leave_82542_rst(struct e1000_adapter *adapter); 152static void e1000_tx_timeout(struct net_device *dev); 153static void e1000_tx_timeout_task(struct net_device *dev); 154static void e1000_smartspeed(struct e1000_adapter *adapter); 155static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, 156 struct sk_buff *skb); 157 158static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); 159static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); 160static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); 161static void e1000_restore_vlan(struct e1000_adapter *adapter); 162 163static int e1000_notify_reboot(struct notifier_block *, unsigned long event, void *ptr); 164static int e1000_suspend(struct pci_dev *pdev, uint32_t state); 165#ifdef CONFIG_PM 166static int e1000_resume(struct pci_dev *pdev); 167#endif 168 169#ifdef CONFIG_NET_POLL_CONTROLLER 170/* for netdump / net console */ 171static void e1000_netpoll (struct net_device *netdev); 172#endif 173 174struct notifier_block e1000_notifier_reboot = { 175 .notifier_call = e1000_notify_reboot, 176 .next = NULL, 177 .priority = 0 178}; 179 180/* Exported from other modules */ 181 182extern void e1000_check_options(struct e1000_adapter *adapter); 183 184static struct pci_driver e1000_driver = { 185 .name = e1000_driver_name, 186 .id_table = e1000_pci_tbl, 187 .probe = e1000_probe, 188 .remove = __devexit_p(e1000_remove), 189 /* Power Managment Hooks */ 190#ifdef CONFIG_PM 191 .suspend = e1000_suspend, 192 .resume = e1000_resume 193#endif 194}; 195 196MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 197MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 198MODULE_LICENSE("GPL"); 199MODULE_VERSION(DRV_VERSION); 200 201static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; 202module_param(debug, int, 0); 203MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 204 205/** 206 * e1000_init_module - Driver Registration Routine 207 * 208 * e1000_init_module is the first routine called when the driver is 209 * loaded. All it does is register with the PCI subsystem. 210 **/ 211 212static int __init 213e1000_init_module(void) 214{ 215 int ret; 216 printk(KERN_INFO "%s - version %s\n", 217 e1000_driver_string, e1000_driver_version); 218 219 printk(KERN_INFO "%s\n", e1000_copyright); 220 221 ret = pci_module_init(&e1000_driver); 222 if(ret >= 0) { 223 register_reboot_notifier(&e1000_notifier_reboot); 224 } 225 return ret; 226} 227 228module_init(e1000_init_module); 229 230/** 231 * e1000_exit_module - Driver Exit Cleanup Routine 232 * 233 * e1000_exit_module is called just before the driver is removed 234 * from memory. 235 **/ 236 237static void __exit 238e1000_exit_module(void) 239{ 240 unregister_reboot_notifier(&e1000_notifier_reboot); 241 pci_unregister_driver(&e1000_driver); 242} 243 244module_exit(e1000_exit_module); 245 246/** 247 * e1000_irq_disable - Mask off interrupt generation on the NIC 248 * @adapter: board private structure 249 **/ 250 251static inline void 252e1000_irq_disable(struct e1000_adapter *adapter) 253{ 254 atomic_inc(&adapter->irq_sem); 255 E1000_WRITE_REG(&adapter->hw, IMC, ~0); 256 E1000_WRITE_FLUSH(&adapter->hw); 257 synchronize_irq(adapter->pdev->irq); 258} 259 260/** 261 * e1000_irq_enable - Enable default interrupt generation settings 262 * @adapter: board private structure 263 **/ 264 265static inline void 266e1000_irq_enable(struct e1000_adapter *adapter) 267{ 268 if(likely(atomic_dec_and_test(&adapter->irq_sem))) { 269 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); 270 E1000_WRITE_FLUSH(&adapter->hw); 271 } 272} 273void 274e1000_update_mng_vlan(struct e1000_adapter *adapter) 275{ 276 struct net_device *netdev = adapter->netdev; 277 uint16_t vid = adapter->hw.mng_cookie.vlan_id; 278 uint16_t old_vid = adapter->mng_vlan_id; 279 if(adapter->vlgrp) { 280 if(!adapter->vlgrp->vlan_devices[vid]) { 281 if(adapter->hw.mng_cookie.status & 282 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { 283 e1000_vlan_rx_add_vid(netdev, vid); 284 adapter->mng_vlan_id = vid; 285 } else 286 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 287 288 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && 289 (vid != old_vid) && 290 !adapter->vlgrp->vlan_devices[old_vid]) 291 e1000_vlan_rx_kill_vid(netdev, old_vid); 292 } 293 } 294} 295 296int 297e1000_up(struct e1000_adapter *adapter) 298{ 299 struct net_device *netdev = adapter->netdev; 300 int err; 301 302 /* hardware has been reset, we need to reload some things */ 303 304 /* Reset the PHY if it was previously powered down */ 305 if(adapter->hw.media_type == e1000_media_type_copper) { 306 uint16_t mii_reg; 307 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); 308 if(mii_reg & MII_CR_POWER_DOWN) 309 e1000_phy_reset(&adapter->hw); 310 } 311 312 e1000_set_multi(netdev); 313 314 e1000_restore_vlan(adapter); 315 316 e1000_configure_tx(adapter); 317 e1000_setup_rctl(adapter); 318 e1000_configure_rx(adapter); 319 adapter->alloc_rx_buf(adapter); 320 321#ifdef CONFIG_PCI_MSI 322 if(adapter->hw.mac_type > e1000_82547_rev_2) { 323 adapter->have_msi = TRUE; 324 if((err = pci_enable_msi(adapter->pdev))) { 325 DPRINTK(PROBE, ERR, 326 "Unable to allocate MSI interrupt Error: %d\n", err); 327 adapter->have_msi = FALSE; 328 } 329 } 330#endif 331 if((err = request_irq(adapter->pdev->irq, &e1000_intr, 332 SA_SHIRQ | SA_SAMPLE_RANDOM, 333 netdev->name, netdev))) { 334 DPRINTK(PROBE, ERR, 335 "Unable to allocate interrupt Error: %d\n", err); 336 return err; 337 } 338 339 mod_timer(&adapter->watchdog_timer, jiffies); 340 341#ifdef CONFIG_E1000_NAPI 342 netif_poll_enable(netdev); 343#endif 344 e1000_irq_enable(adapter); 345 346 return 0; 347} 348 349void 350e1000_down(struct e1000_adapter *adapter) 351{ 352 struct net_device *netdev = adapter->netdev; 353 354 e1000_irq_disable(adapter); 355 free_irq(adapter->pdev->irq, netdev); 356#ifdef CONFIG_PCI_MSI 357 if(adapter->hw.mac_type > e1000_82547_rev_2 && 358 adapter->have_msi == TRUE) 359 pci_disable_msi(adapter->pdev); 360#endif 361 del_timer_sync(&adapter->tx_fifo_stall_timer); 362 del_timer_sync(&adapter->watchdog_timer); 363 del_timer_sync(&adapter->phy_info_timer); 364 365#ifdef CONFIG_E1000_NAPI 366 netif_poll_disable(netdev); 367#endif 368 adapter->link_speed = 0; 369 adapter->link_duplex = 0; 370 netif_carrier_off(netdev); 371 netif_stop_queue(netdev); 372 373 e1000_reset(adapter); 374 e1000_clean_tx_ring(adapter); 375 e1000_clean_rx_ring(adapter); 376 377 /* If WoL is not enabled 378 * and management mode is not IAMT 379 * Power down the PHY so no link is implied when interface is down */ 380 if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 && 381 adapter->hw.media_type == e1000_media_type_copper && 382 !e1000_check_mng_mode(&adapter->hw) && 383 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) { 384 uint16_t mii_reg; 385 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); 386 mii_reg |= MII_CR_POWER_DOWN; 387 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); 388 mdelay(1); 389 } 390} 391 392void 393e1000_reset(struct e1000_adapter *adapter) 394{ 395 struct net_device *netdev = adapter->netdev; 396 uint32_t pba, manc; 397 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; 398 uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF; 399 400 /* Repartition Pba for greater than 9k mtu 401 * To take effect CTRL.RST is required. 402 */ 403 404 switch (adapter->hw.mac_type) { 405 case e1000_82547: 406 case e1000_82547_rev_2: 407 pba = E1000_PBA_30K; 408 break; 409 case e1000_82573: 410 pba = E1000_PBA_12K; 411 break; 412 default: 413 pba = E1000_PBA_48K; 414 break; 415 } 416 417 if((adapter->hw.mac_type != e1000_82573) && 418 (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) { 419 pba -= 8; /* allocate more FIFO for Tx */ 420 /* send an XOFF when there is enough space in the 421 * Rx FIFO to hold one extra full size Rx packet 422 */ 423 fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE + 424 ETHERNET_FCS_SIZE + 1; 425 fc_low_water_mark = fc_high_water_mark + 8; 426 } 427 428 429 if(adapter->hw.mac_type == e1000_82547) { 430 adapter->tx_fifo_head = 0; 431 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; 432 adapter->tx_fifo_size = 433 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; 434 atomic_set(&adapter->tx_fifo_stall, 0); 435 } 436 437 E1000_WRITE_REG(&adapter->hw, PBA, pba); 438 439 /* flow control settings */ 440 adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) - 441 fc_high_water_mark; 442 adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) - 443 fc_low_water_mark; 444 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; 445 adapter->hw.fc_send_xon = 1; 446 adapter->hw.fc = adapter->hw.original_fc; 447 448 /* Allow time for pending master requests to run */ 449 e1000_reset_hw(&adapter->hw); 450 if(adapter->hw.mac_type >= e1000_82544) 451 E1000_WRITE_REG(&adapter->hw, WUC, 0); 452 if(e1000_init_hw(&adapter->hw)) 453 DPRINTK(PROBE, ERR, "Hardware Error\n"); 454 e1000_update_mng_vlan(adapter); 455 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 456 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); 457 458 e1000_reset_adaptive(&adapter->hw); 459 e1000_phy_get_info(&adapter->hw, &adapter->phy_info); 460 if (adapter->en_mng_pt) { 461 manc = E1000_READ_REG(&adapter->hw, MANC); 462 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); 463 E1000_WRITE_REG(&adapter->hw, MANC, manc); 464 } 465} 466 467/** 468 * e1000_probe - Device Initialization Routine 469 * @pdev: PCI device information struct 470 * @ent: entry in e1000_pci_tbl 471 * 472 * Returns 0 on success, negative on failure 473 * 474 * e1000_probe initializes an adapter identified by a pci_dev structure. 475 * The OS initialization, configuring of the adapter private structure, 476 * and a hardware reset occur. 477 **/ 478 479static int __devinit 480e1000_probe(struct pci_dev *pdev, 481 const struct pci_device_id *ent) 482{ 483 struct net_device *netdev; 484 struct e1000_adapter *adapter; 485 unsigned long mmio_start, mmio_len; 486 uint32_t swsm; 487 488 static int cards_found = 0; 489 int i, err, pci_using_dac; 490 uint16_t eeprom_data; 491 uint16_t eeprom_apme_mask = E1000_EEPROM_APME; 492 if((err = pci_enable_device(pdev))) 493 return err; 494 495 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) { 496 pci_using_dac = 1; 497 } else { 498 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) { 499 E1000_ERR("No usable DMA configuration, aborting\n"); 500 return err; 501 } 502 pci_using_dac = 0; 503 } 504 505 if((err = pci_request_regions(pdev, e1000_driver_name))) 506 return err; 507 508 pci_set_master(pdev); 509 510 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 511 if(!netdev) { 512 err = -ENOMEM; 513 goto err_alloc_etherdev; 514 } 515 516 SET_MODULE_OWNER(netdev); 517 SET_NETDEV_DEV(netdev, &pdev->dev); 518 519 pci_set_drvdata(pdev, netdev); 520 adapter = netdev->priv; 521 adapter->netdev = netdev; 522 adapter->pdev = pdev; 523 adapter->hw.back = adapter; 524 adapter->msg_enable = (1 << debug) - 1; 525 526 mmio_start = pci_resource_start(pdev, BAR_0); 527 mmio_len = pci_resource_len(pdev, BAR_0); 528 529 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 530 if(!adapter->hw.hw_addr) { 531 err = -EIO; 532 goto err_ioremap; 533 } 534 535 for(i = BAR_1; i <= BAR_5; i++) { 536 if(pci_resource_len(pdev, i) == 0) 537 continue; 538 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) { 539 adapter->hw.io_base = pci_resource_start(pdev, i); 540 break; 541 } 542 } 543 544 netdev->open = &e1000_open; 545 netdev->stop = &e1000_close; 546 netdev->hard_start_xmit = &e1000_xmit_frame; 547 netdev->get_stats = &e1000_get_stats; 548 netdev->set_multicast_list = &e1000_set_multi; 549 netdev->set_mac_address = &e1000_set_mac; 550 netdev->change_mtu = &e1000_change_mtu; 551 netdev->do_ioctl = &e1000_ioctl; 552 e1000_set_ethtool_ops(netdev); 553 netdev->tx_timeout = &e1000_tx_timeout; 554 netdev->watchdog_timeo = 5 * HZ; 555#ifdef CONFIG_E1000_NAPI 556 netdev->poll = &e1000_clean; 557 netdev->weight = 64; 558#endif 559 netdev->vlan_rx_register = e1000_vlan_rx_register; 560 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; 561 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; 562#ifdef CONFIG_NET_POLL_CONTROLLER 563 netdev->poll_controller = e1000_netpoll; 564#endif 565 strcpy(netdev->name, pci_name(pdev)); 566 567 netdev->mem_start = mmio_start; 568 netdev->mem_end = mmio_start + mmio_len; 569 netdev->base_addr = adapter->hw.io_base; 570 571 adapter->bd_number = cards_found; 572 573 /* setup the private structure */ 574 575 if((err = e1000_sw_init(adapter))) 576 goto err_sw_init; 577 578 if((err = e1000_check_phy_reset_block(&adapter->hw))) 579 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); 580 581 if(adapter->hw.mac_type >= e1000_82543) { 582 netdev->features = NETIF_F_SG | 583 NETIF_F_HW_CSUM | 584 NETIF_F_HW_VLAN_TX | 585 NETIF_F_HW_VLAN_RX | 586 NETIF_F_HW_VLAN_FILTER; 587 } 588 589#ifdef NETIF_F_TSO 590 if((adapter->hw.mac_type >= e1000_82544) && 591 (adapter->hw.mac_type != e1000_82547)) 592 netdev->features |= NETIF_F_TSO; 593 594#ifdef NETIF_F_TSO_IPV6 595 if(adapter->hw.mac_type > e1000_82547_rev_2) 596 netdev->features |= NETIF_F_TSO_IPV6; 597#endif 598#endif 599 if(pci_using_dac) 600 netdev->features |= NETIF_F_HIGHDMA; 601 602 /* hard_start_xmit is safe against parallel locking */ 603 netdev->features |= NETIF_F_LLTX; 604 605 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); 606 607 /* before reading the EEPROM, reset the controller to 608 * put the device in a known good starting state */ 609 610 e1000_reset_hw(&adapter->hw); 611 612 /* make sure the EEPROM is good */ 613 614 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) { 615 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); 616 err = -EIO; 617 goto err_eeprom; 618 } 619 620 /* copy the MAC address out of the EEPROM */ 621 622 if(e1000_read_mac_addr(&adapter->hw)) 623 DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); 624 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 625 626 if(!is_valid_ether_addr(netdev->dev_addr)) { 627 DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); 628 err = -EIO; 629 goto err_eeprom; 630 } 631 632 e1000_read_part_num(&adapter->hw, &(adapter->part_num)); 633 634 e1000_get_bus_info(&adapter->hw); 635 636 init_timer(&adapter->tx_fifo_stall_timer); 637 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; 638 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; 639 640 init_timer(&adapter->watchdog_timer); 641 adapter->watchdog_timer.function = &e1000_watchdog; 642 adapter->watchdog_timer.data = (unsigned long) adapter; 643 644 INIT_WORK(&adapter->watchdog_task, 645 (void (*)(void *))e1000_watchdog_task, adapter); 646 647 init_timer(&adapter->phy_info_timer); 648 adapter->phy_info_timer.function = &e1000_update_phy_info; 649 adapter->phy_info_timer.data = (unsigned long) adapter; 650 651 INIT_WORK(&adapter->tx_timeout_task, 652 (void (*)(void *))e1000_tx_timeout_task, netdev); 653 654 /* we're going to reset, so assume we have no link for now */ 655 656 netif_carrier_off(netdev); 657 netif_stop_queue(netdev); 658 659 e1000_check_options(adapter); 660 661 /* Initial Wake on LAN setting 662 * If APM wake is enabled in the EEPROM, 663 * enable the ACPI Magic Packet filter 664 */ 665 666 switch(adapter->hw.mac_type) { 667 case e1000_82542_rev2_0: 668 case e1000_82542_rev2_1: 669 case e1000_82543: 670 break; 671 case e1000_82544: 672 e1000_read_eeprom(&adapter->hw, 673 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); 674 eeprom_apme_mask = E1000_EEPROM_82544_APM; 675 break; 676 case e1000_82546: 677 case e1000_82546_rev_3: 678 if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1) 679 && (adapter->hw.media_type == e1000_media_type_copper)) { 680 e1000_read_eeprom(&adapter->hw, 681 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 682 break; 683 } 684 /* Fall Through */ 685 default: 686 e1000_read_eeprom(&adapter->hw, 687 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 688 break; 689 } 690 if(eeprom_data & eeprom_apme_mask) 691 adapter->wol |= E1000_WUFC_MAG; 692 693 /* reset the hardware with the new settings */ 694 e1000_reset(adapter); 695 696 /* Let firmware know the driver has taken over */ 697 switch(adapter->hw.mac_type) { 698 case e1000_82573: 699 swsm = E1000_READ_REG(&adapter->hw, SWSM); 700 E1000_WRITE_REG(&adapter->hw, SWSM, 701 swsm | E1000_SWSM_DRV_LOAD); 702 break; 703 default: 704 break; 705 } 706 707 strcpy(netdev->name, "eth%d"); 708 if((err = register_netdev(netdev))) 709 goto err_register; 710 711 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); 712 713 cards_found++; 714 return 0; 715 716err_register: 717err_sw_init: 718err_eeprom: 719 iounmap(adapter->hw.hw_addr); 720err_ioremap: 721 free_netdev(netdev); 722err_alloc_etherdev: 723 pci_release_regions(pdev); 724 return err; 725} 726 727/** 728 * e1000_remove - Device Removal Routine 729 * @pdev: PCI device information struct 730 * 731 * e1000_remove is called by the PCI subsystem to alert the driver 732 * that it should release a PCI device. The could be caused by a 733 * Hot-Plug event, or because the driver is going to be removed from 734 * memory. 735 **/ 736 737static void __devexit 738e1000_remove(struct pci_dev *pdev) 739{ 740 struct net_device *netdev = pci_get_drvdata(pdev); 741 struct e1000_adapter *adapter = netdev->priv; 742 uint32_t manc, swsm; 743 744 flush_scheduled_work(); 745 746 if(adapter->hw.mac_type >= e1000_82540 && 747 adapter->hw.media_type == e1000_media_type_copper) { 748 manc = E1000_READ_REG(&adapter->hw, MANC); 749 if(manc & E1000_MANC_SMBUS_EN) { 750 manc |= E1000_MANC_ARP_EN; 751 E1000_WRITE_REG(&adapter->hw, MANC, manc); 752 } 753 } 754 755 switch(adapter->hw.mac_type) { 756 case e1000_82573: 757 swsm = E1000_READ_REG(&adapter->hw, SWSM); 758 E1000_WRITE_REG(&adapter->hw, SWSM, 759 swsm & ~E1000_SWSM_DRV_LOAD); 760 break; 761 762 default: 763 break; 764 } 765 766 unregister_netdev(netdev); 767 768 if(!e1000_check_phy_reset_block(&adapter->hw)) 769 e1000_phy_hw_reset(&adapter->hw); 770 771 iounmap(adapter->hw.hw_addr); 772 pci_release_regions(pdev); 773 774 free_netdev(netdev); 775 776 pci_disable_device(pdev); 777} 778 779/** 780 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 781 * @adapter: board private structure to initialize 782 * 783 * e1000_sw_init initializes the Adapter private data structure. 784 * Fields are initialized based on PCI device information and 785 * OS network device settings (MTU size). 786 **/ 787 788static int __devinit 789e1000_sw_init(struct e1000_adapter *adapter) 790{ 791 struct e1000_hw *hw = &adapter->hw; 792 struct net_device *netdev = adapter->netdev; 793 struct pci_dev *pdev = adapter->pdev; 794 795 /* PCI config space info */ 796 797 hw->vendor_id = pdev->vendor; 798 hw->device_id = pdev->device; 799 hw->subsystem_vendor_id = pdev->subsystem_vendor; 800 hw->subsystem_id = pdev->subsystem_device; 801 802 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 803 804 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); 805 806 adapter->rx_buffer_len = E1000_RXBUFFER_2048; 807 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256; 808 hw->max_frame_size = netdev->mtu + 809 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; 810 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; 811 812 /* identify the MAC */ 813 814 if(e1000_set_mac_type(hw)) { 815 DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); 816 return -EIO; 817 } 818 819 /* initialize eeprom parameters */ 820 821 if(e1000_init_eeprom_params(hw)) { 822 E1000_ERR("EEPROM initialization failed\n"); 823 return -EIO; 824 } 825 826 switch(hw->mac_type) { 827 default: 828 break; 829 case e1000_82541: 830 case e1000_82547: 831 case e1000_82541_rev_2: 832 case e1000_82547_rev_2: 833 hw->phy_init_script = 1; 834 break; 835 } 836 837 e1000_set_media_type(hw); 838 839 hw->wait_autoneg_complete = FALSE; 840 hw->tbi_compatibility_en = TRUE; 841 hw->adaptive_ifs = TRUE; 842 843 /* Copper options */ 844 845 if(hw->media_type == e1000_media_type_copper) { 846 hw->mdix = AUTO_ALL_MODES; 847 hw->disable_polarity_correction = FALSE; 848 hw->master_slave = E1000_MASTER_SLAVE; 849 } 850 851 atomic_set(&adapter->irq_sem, 1); 852 spin_lock_init(&adapter->stats_lock); 853 spin_lock_init(&adapter->tx_lock); 854 855 return 0; 856} 857 858/** 859 * e1000_open - Called when a network interface is made active 860 * @netdev: network interface device structure 861 * 862 * Returns 0 on success, negative value on failure 863 * 864 * The open entry point is called when a network interface is made 865 * active by the system (IFF_UP). At this point all resources needed 866 * for transmit and receive operations are allocated, the interrupt 867 * handler is registered with the OS, the watchdog timer is started, 868 * and the stack is notified that the interface is ready. 869 **/ 870 871static int 872e1000_open(struct net_device *netdev) 873{ 874 struct e1000_adapter *adapter = netdev->priv; 875 int err; 876 877 /* allocate transmit descriptors */ 878 879 if((err = e1000_setup_tx_resources(adapter))) 880 goto err_setup_tx; 881 882 /* allocate receive descriptors */ 883 884 if((err = e1000_setup_rx_resources(adapter))) 885 goto err_setup_rx; 886 887 if((err = e1000_up(adapter))) 888 goto err_up; 889 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 890 if((adapter->hw.mng_cookie.status & 891 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { 892 e1000_update_mng_vlan(adapter); 893 } 894 895 return E1000_SUCCESS; 896 897err_up: 898 e1000_free_rx_resources(adapter); 899err_setup_rx: 900 e1000_free_tx_resources(adapter); 901err_setup_tx: 902 e1000_reset(adapter); 903 904 return err; 905} 906 907/** 908 * e1000_close - Disables a network interface 909 * @netdev: network interface device structure 910 * 911 * Returns 0, this is not allowed to fail 912 * 913 * The close entry point is called when an interface is de-activated 914 * by the OS. The hardware is still under the drivers control, but 915 * needs to be disabled. A global MAC reset is issued to stop the 916 * hardware, and all transmit and receive resources are freed. 917 **/ 918 919static int 920e1000_close(struct net_device *netdev) 921{ 922 struct e1000_adapter *adapter = netdev->priv; 923 924 e1000_down(adapter); 925 926 e1000_free_tx_resources(adapter); 927 e1000_free_rx_resources(adapter); 928 929 if((adapter->hw.mng_cookie.status & 930 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { 931 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 932 } 933 return 0; 934} 935 936/** 937 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary 938 * @adapter: address of board private structure 939 * @start: address of beginning of memory 940 * @len: length of memory 941 **/ 942static inline boolean_t 943e1000_check_64k_bound(struct e1000_adapter *adapter, 944 void *start, unsigned long len) 945{ 946 unsigned long begin = (unsigned long) start; 947 unsigned long end = begin + len; 948 949 /* First rev 82545 and 82546 need to not allow any memory 950 * write location to cross 64k boundary due to errata 23 */ 951 if (adapter->hw.mac_type == e1000_82545 || 952 adapter->hw.mac_type == e1000_82546) { 953 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; 954 } 955 956 return TRUE; 957} 958 959/** 960 * e1000_setup_tx_resources - allocate Tx resources (Descriptors) 961 * @adapter: board private structure 962 * 963 * Return 0 on success, negative on failure 964 **/ 965 966int 967e1000_setup_tx_resources(struct e1000_adapter *adapter) 968{ 969 struct e1000_desc_ring *txdr = &adapter->tx_ring; 970 struct pci_dev *pdev = adapter->pdev; 971 int size; 972 973 size = sizeof(struct e1000_buffer) * txdr->count; 974 txdr->buffer_info = vmalloc(size); 975 if(!txdr->buffer_info) { 976 DPRINTK(PROBE, ERR, 977 "Unable to allocate memory for the transmit descriptor ring\n"); 978 return -ENOMEM; 979 } 980 memset(txdr->buffer_info, 0, size); 981 982 /* round up to nearest 4K */ 983 984 txdr->size = txdr->count * sizeof(struct e1000_tx_desc); 985 E1000_ROUNDUP(txdr->size, 4096); 986 987 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); 988 if(!txdr->desc) { 989setup_tx_desc_die: 990 vfree(txdr->buffer_info); 991 DPRINTK(PROBE, ERR, 992 "Unable to allocate memory for the transmit descriptor ring\n"); 993 return -ENOMEM; 994 } 995 996 /* Fix for errata 23, can't cross 64kB boundary */ 997 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { 998 void *olddesc = txdr->desc; 999 dma_addr_t olddma = txdr->dma; 1000 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " 1001 "at %p\n", txdr->size, txdr->desc); 1002 /* Try again, without freeing the previous */ 1003 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); 1004 if(!txdr->desc) { 1005 /* Failed allocation, critical failure */ 1006 pci_free_consistent(pdev, txdr->size, olddesc, olddma); 1007 goto setup_tx_desc_die; 1008 } 1009 1010 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { 1011 /* give up */ 1012 pci_free_consistent(pdev, txdr->size, txdr->desc, 1013 txdr->dma); 1014 pci_free_consistent(pdev, txdr->size, olddesc, olddma); 1015 DPRINTK(PROBE, ERR, 1016 "Unable to allocate aligned memory " 1017 "for the transmit descriptor ring\n"); 1018 vfree(txdr->buffer_info); 1019 return -ENOMEM; 1020 } else { 1021 /* Free old allocation, new allocation was successful */ 1022 pci_free_consistent(pdev, txdr->size, olddesc, olddma); 1023 } 1024 } 1025 memset(txdr->desc, 0, txdr->size); 1026 1027 txdr->next_to_use = 0; 1028 txdr->next_to_clean = 0; 1029 1030 return 0; 1031} 1032 1033/** 1034 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset 1035 * @adapter: board private structure 1036 * 1037 * Configure the Tx unit of the MAC after a reset. 1038 **/ 1039 1040static void 1041e1000_configure_tx(struct e1000_adapter *adapter) 1042{ 1043 uint64_t tdba = adapter->tx_ring.dma; 1044 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct e1000_tx_desc); 1045 uint32_t tctl, tipg; 1046 1047 E1000_WRITE_REG(&adapter->hw, TDBAL, (tdba & 0x00000000ffffffffULL)); 1048 E1000_WRITE_REG(&adapter->hw, TDBAH, (tdba >> 32)); 1049 1050 E1000_WRITE_REG(&adapter->hw, TDLEN, tdlen); 1051 1052 /* Setup the HW Tx Head and Tail descriptor pointers */ 1053 1054 E1000_WRITE_REG(&adapter->hw, TDH, 0); 1055 E1000_WRITE_REG(&adapter->hw, TDT, 0); 1056 1057 /* Set the default values for the Tx Inter Packet Gap timer */ 1058 1059 switch (adapter->hw.mac_type) { 1060 case e1000_82542_rev2_0: 1061 case e1000_82542_rev2_1: 1062 tipg = DEFAULT_82542_TIPG_IPGT; 1063 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 1064 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 1065 break; 1066 default: 1067 if(adapter->hw.media_type == e1000_media_type_fiber || 1068 adapter->hw.media_type == e1000_media_type_internal_serdes) 1069 tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 1070 else 1071 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 1072 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 1073 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 1074 } 1075 E1000_WRITE_REG(&adapter->hw, TIPG, tipg); 1076 1077 /* Set the Tx Interrupt Delay register */ 1078 1079 E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay); 1080 if(adapter->hw.mac_type >= e1000_82540) 1081 E1000_WRITE_REG(&adapter->hw, TADV, adapter->tx_abs_int_delay); 1082 1083 /* Program the Transmit Control Register */ 1084 1085 tctl = E1000_READ_REG(&adapter->hw, TCTL); 1086 1087 tctl &= ~E1000_TCTL_CT; 1088 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | 1089 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 1090 1091 E1000_WRITE_REG(&adapter->hw, TCTL, tctl); 1092 1093 e1000_config_collision_dist(&adapter->hw); 1094 1095 /* Setup Transmit Descriptor Settings for eop descriptor */ 1096 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP | 1097 E1000_TXD_CMD_IFCS; 1098 1099 if(adapter->hw.mac_type < e1000_82543) 1100 adapter->txd_cmd |= E1000_TXD_CMD_RPS; 1101 else 1102 adapter->txd_cmd |= E1000_TXD_CMD_RS; 1103 1104 /* Cache if we're 82544 running in PCI-X because we'll 1105 * need this to apply a workaround later in the send path. */ 1106 if(adapter->hw.mac_type == e1000_82544 && 1107 adapter->hw.bus_type == e1000_bus_type_pcix) 1108 adapter->pcix_82544 = 1; 1109} 1110 1111/** 1112 * e1000_setup_rx_resources - allocate Rx resources (Descriptors) 1113 * @adapter: board private structure 1114 * 1115 * Returns 0 on success, negative on failure 1116 **/ 1117 1118int 1119e1000_setup_rx_resources(struct e1000_adapter *adapter) 1120{ 1121 struct e1000_desc_ring *rxdr = &adapter->rx_ring; 1122 struct pci_dev *pdev = adapter->pdev; 1123 int size, desc_len; 1124 1125 size = sizeof(struct e1000_buffer) * rxdr->count; 1126 rxdr->buffer_info = vmalloc(size); 1127 if(!rxdr->buffer_info) { 1128 DPRINTK(PROBE, ERR, 1129 "Unable to allocate memory for the receive descriptor ring\n"); 1130 return -ENOMEM; 1131 } 1132 memset(rxdr->buffer_info, 0, size); 1133 1134 size = sizeof(struct e1000_ps_page) * rxdr->count; 1135 rxdr->ps_page = kmalloc(size, GFP_KERNEL); 1136 if(!rxdr->ps_page) { 1137 vfree(rxdr->buffer_info); 1138 DPRINTK(PROBE, ERR, 1139 "Unable to allocate memory for the receive descriptor ring\n"); 1140 return -ENOMEM; 1141 } 1142 memset(rxdr->ps_page, 0, size); 1143 1144 size = sizeof(struct e1000_ps_page_dma) * rxdr->count; 1145 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); 1146 if(!rxdr->ps_page_dma) { 1147 vfree(rxdr->buffer_info); 1148 kfree(rxdr->ps_page); 1149 DPRINTK(PROBE, ERR, 1150 "Unable to allocate memory for the receive descriptor ring\n"); 1151 return -ENOMEM; 1152 } 1153 memset(rxdr->ps_page_dma, 0, size); 1154 1155 if(adapter->hw.mac_type <= e1000_82547_rev_2) 1156 desc_len = sizeof(struct e1000_rx_desc); 1157 else 1158 desc_len = sizeof(union e1000_rx_desc_packet_split); 1159 1160 /* Round up to nearest 4K */ 1161 1162 rxdr->size = rxdr->count * desc_len; 1163 E1000_ROUNDUP(rxdr->size, 4096); 1164 1165 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); 1166 1167 if(!rxdr->desc) { 1168setup_rx_desc_die: 1169 vfree(rxdr->buffer_info); 1170 kfree(rxdr->ps_page); 1171 kfree(rxdr->ps_page_dma); 1172 DPRINTK(PROBE, ERR, 1173 "Unable to allocate memory for the receive descriptor ring\n"); 1174 return -ENOMEM; 1175 } 1176 1177 /* Fix for errata 23, can't cross 64kB boundary */ 1178 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { 1179 void *olddesc = rxdr->desc; 1180 dma_addr_t olddma = rxdr->dma; 1181 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " 1182 "at %p\n", rxdr->size, rxdr->desc); 1183 /* Try again, without freeing the previous */ 1184 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); 1185 if(!rxdr->desc) { 1186 /* Failed allocation, critical failure */ 1187 pci_free_consistent(pdev, rxdr->size, olddesc, olddma); 1188 goto setup_rx_desc_die; 1189 } 1190 1191 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { 1192 /* give up */ 1193 pci_free_consistent(pdev, rxdr->size, rxdr->desc, 1194 rxdr->dma); 1195 pci_free_consistent(pdev, rxdr->size, olddesc, olddma); 1196 DPRINTK(PROBE, ERR, 1197 "Unable to allocate aligned memory " 1198 "for the receive descriptor ring\n"); 1199 vfree(rxdr->buffer_info); 1200 kfree(rxdr->ps_page); 1201 kfree(rxdr->ps_page_dma); 1202 return -ENOMEM; 1203 } else { 1204 /* Free old allocation, new allocation was successful */ 1205 pci_free_consistent(pdev, rxdr->size, olddesc, olddma); 1206 } 1207 } 1208 memset(rxdr->desc, 0, rxdr->size); 1209 1210 rxdr->next_to_clean = 0; 1211 rxdr->next_to_use = 0; 1212 1213 return 0; 1214} 1215 1216/** 1217 * e1000_setup_rctl - configure the receive control registers 1218 * @adapter: Board private structure 1219 **/ 1220 1221static void 1222e1000_setup_rctl(struct e1000_adapter *adapter) 1223{ 1224 uint32_t rctl, rfctl; 1225 uint32_t psrctl = 0; 1226 1227 rctl = E1000_READ_REG(&adapter->hw, RCTL); 1228 1229 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 1230 1231 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 1232 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 1233 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); 1234 1235 if(adapter->hw.tbi_compatibility_on == 1) 1236 rctl |= E1000_RCTL_SBP; 1237 else 1238 rctl &= ~E1000_RCTL_SBP; 1239 1240 if (adapter->netdev->mtu <= ETH_DATA_LEN) 1241 rctl &= ~E1000_RCTL_LPE; 1242 else 1243 rctl |= E1000_RCTL_LPE; 1244 1245 /* Setup buffer sizes */ 1246 if(adapter->hw.mac_type == e1000_82573) { 1247 /* We can now specify buffers in 1K increments. 1248 * BSIZE and BSEX are ignored in this case. */ 1249 rctl |= adapter->rx_buffer_len << 0x11; 1250 } else { 1251 rctl &= ~E1000_RCTL_SZ_4096; 1252 rctl |= E1000_RCTL_BSEX; 1253 switch (adapter->rx_buffer_len) { 1254 case E1000_RXBUFFER_2048: 1255 default: 1256 rctl |= E1000_RCTL_SZ_2048; 1257 rctl &= ~E1000_RCTL_BSEX; 1258 break; 1259 case E1000_RXBUFFER_4096: 1260 rctl |= E1000_RCTL_SZ_4096; 1261 break; 1262 case E1000_RXBUFFER_8192: 1263 rctl |= E1000_RCTL_SZ_8192; 1264 break; 1265 case E1000_RXBUFFER_16384: 1266 rctl |= E1000_RCTL_SZ_16384; 1267 break; 1268 } 1269 } 1270 1271#ifdef CONFIG_E1000_PACKET_SPLIT 1272 /* 82571 and greater support packet-split where the protocol 1273 * header is placed in skb->data and the packet data is 1274 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 1275 * In the case of a non-split, skb->data is linearly filled, 1276 * followed by the page buffers. Therefore, skb->data is 1277 * sized to hold the largest protocol header. 1278 */ 1279 adapter->rx_ps = (adapter->hw.mac_type > e1000_82547_rev_2) 1280 && (adapter->netdev->mtu 1281 < ((3 * PAGE_SIZE) + adapter->rx_ps_bsize0)); 1282#endif 1283 if(adapter->rx_ps) { 1284 /* Configure extra packet-split registers */ 1285 rfctl = E1000_READ_REG(&adapter->hw, RFCTL); 1286 rfctl |= E1000_RFCTL_EXTEN; 1287 /* disable IPv6 packet split support */ 1288 rfctl |= E1000_RFCTL_IPV6_DIS; 1289 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); 1290 1291 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC; 1292 1293 psrctl |= adapter->rx_ps_bsize0 >> 1294 E1000_PSRCTL_BSIZE0_SHIFT; 1295 psrctl |= PAGE_SIZE >> 1296 E1000_PSRCTL_BSIZE1_SHIFT; 1297 psrctl |= PAGE_SIZE << 1298 E1000_PSRCTL_BSIZE2_SHIFT; 1299 psrctl |= PAGE_SIZE << 1300 E1000_PSRCTL_BSIZE3_SHIFT; 1301 1302 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); 1303 } 1304 1305 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 1306} 1307 1308/** 1309 * e1000_configure_rx - Configure 8254x Receive Unit after Reset 1310 * @adapter: board private structure 1311 * 1312 * Configure the Rx unit of the MAC after a reset. 1313 **/ 1314 1315static void 1316e1000_configure_rx(struct e1000_adapter *adapter) 1317{ 1318 uint64_t rdba = adapter->rx_ring.dma; 1319 uint32_t rdlen, rctl, rxcsum; 1320 1321 if(adapter->rx_ps) { 1322 rdlen = adapter->rx_ring.count * 1323 sizeof(union e1000_rx_desc_packet_split); 1324 adapter->clean_rx = e1000_clean_rx_irq_ps; 1325 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 1326 } else { 1327 rdlen = adapter->rx_ring.count * sizeof(struct e1000_rx_desc); 1328 adapter->clean_rx = e1000_clean_rx_irq; 1329 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 1330 } 1331 1332 /* disable receives while setting up the descriptors */ 1333 rctl = E1000_READ_REG(&adapter->hw, RCTL); 1334 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN); 1335 1336 /* set the Receive Delay Timer Register */ 1337 E1000_WRITE_REG(&adapter->hw, RDTR, adapter->rx_int_delay); 1338 1339 if(adapter->hw.mac_type >= e1000_82540) { 1340 E1000_WRITE_REG(&adapter->hw, RADV, adapter->rx_abs_int_delay); 1341 if(adapter->itr > 1) 1342 E1000_WRITE_REG(&adapter->hw, ITR, 1343 1000000000 / (adapter->itr * 256)); 1344 } 1345 1346 /* Setup the Base and Length of the Rx Descriptor Ring */ 1347 E1000_WRITE_REG(&adapter->hw, RDBAL, (rdba & 0x00000000ffffffffULL)); 1348 E1000_WRITE_REG(&adapter->hw, RDBAH, (rdba >> 32)); 1349 1350 E1000_WRITE_REG(&adapter->hw, RDLEN, rdlen); 1351 1352 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 1353 E1000_WRITE_REG(&adapter->hw, RDH, 0); 1354 E1000_WRITE_REG(&adapter->hw, RDT, 0); 1355 1356 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ 1357 if(adapter->hw.mac_type >= e1000_82543) { 1358 rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM); 1359 if(adapter->rx_csum == TRUE) { 1360 rxcsum |= E1000_RXCSUM_TUOFL; 1361 1362 /* Enable 82573 IPv4 payload checksum for UDP fragments 1363 * Must be used in conjunction with packet-split. */ 1364 if((adapter->hw.mac_type > e1000_82547_rev_2) && 1365 (adapter->rx_ps)) { 1366 rxcsum |= E1000_RXCSUM_IPPCSE; 1367 } 1368 } else { 1369 rxcsum &= ~E1000_RXCSUM_TUOFL; 1370 /* don't need to clear IPPCSE as it defaults to 0 */ 1371 } 1372 E1000_WRITE_REG(&adapter->hw, RXCSUM, rxcsum); 1373 } 1374 1375 if (adapter->hw.mac_type == e1000_82573) 1376 E1000_WRITE_REG(&adapter->hw, ERT, 0x0100); 1377 1378 /* Enable Receives */ 1379 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 1380} 1381 1382/** 1383 * e1000_free_tx_resources - Free Tx Resources 1384 * @adapter: board private structure 1385 * 1386 * Free all transmit software resources 1387 **/ 1388 1389void 1390e1000_free_tx_resources(struct e1000_adapter *adapter) 1391{ 1392 struct pci_dev *pdev = adapter->pdev; 1393 1394 e1000_clean_tx_ring(adapter); 1395 1396 vfree(adapter->tx_ring.buffer_info); 1397 adapter->tx_ring.buffer_info = NULL; 1398 1399 pci_free_consistent(pdev, adapter->tx_ring.size, 1400 adapter->tx_ring.desc, adapter->tx_ring.dma); 1401 1402 adapter->tx_ring.desc = NULL; 1403} 1404 1405static inline void 1406e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, 1407 struct e1000_buffer *buffer_info) 1408{ 1409 if(buffer_info->dma) { 1410 pci_unmap_page(adapter->pdev, 1411 buffer_info->dma, 1412 buffer_info->length, 1413 PCI_DMA_TODEVICE); 1414 buffer_info->dma = 0; 1415 } 1416 if(buffer_info->skb) { 1417 dev_kfree_skb_any(buffer_info->skb); 1418 buffer_info->skb = NULL; 1419 } 1420} 1421 1422/** 1423 * e1000_clean_tx_ring - Free Tx Buffers 1424 * @adapter: board private structure 1425 **/ 1426 1427static void 1428e1000_clean_tx_ring(struct e1000_adapter *adapter) 1429{ 1430 struct e1000_desc_ring *tx_ring = &adapter->tx_ring; 1431 struct e1000_buffer *buffer_info; 1432 unsigned long size; 1433 unsigned int i; 1434 1435 /* Free all the Tx ring sk_buffs */ 1436 1437 if (likely(adapter->previous_buffer_info.skb != NULL)) { 1438 e1000_unmap_and_free_tx_resource(adapter, 1439 &adapter->previous_buffer_info); 1440 } 1441 1442 for(i = 0; i < tx_ring->count; i++) { 1443 buffer_info = &tx_ring->buffer_info[i]; 1444 e1000_unmap_and_free_tx_resource(adapter, buffer_info); 1445 } 1446 1447 size = sizeof(struct e1000_buffer) * tx_ring->count; 1448 memset(tx_ring->buffer_info, 0, size); 1449 1450 /* Zero out the descriptor ring */ 1451 1452 memset(tx_ring->desc, 0, tx_ring->size); 1453 1454 tx_ring->next_to_use = 0; 1455 tx_ring->next_to_clean = 0; 1456 1457 E1000_WRITE_REG(&adapter->hw, TDH, 0); 1458 E1000_WRITE_REG(&adapter->hw, TDT, 0); 1459} 1460 1461/** 1462 * e1000_free_rx_resources - Free Rx Resources 1463 * @adapter: board private structure 1464 * 1465 * Free all receive software resources 1466 **/ 1467 1468void 1469e1000_free_rx_resources(struct e1000_adapter *adapter) 1470{ 1471 struct e1000_desc_ring *rx_ring = &adapter->rx_ring; 1472 struct pci_dev *pdev = adapter->pdev; 1473 1474 e1000_clean_rx_ring(adapter); 1475 1476 vfree(rx_ring->buffer_info); 1477 rx_ring->buffer_info = NULL; 1478 kfree(rx_ring->ps_page); 1479 rx_ring->ps_page = NULL; 1480 kfree(rx_ring->ps_page_dma); 1481 rx_ring->ps_page_dma = NULL; 1482 1483 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); 1484 1485 rx_ring->desc = NULL; 1486} 1487 1488/** 1489 * e1000_clean_rx_ring - Free Rx Buffers 1490 * @adapter: board private structure 1491 **/ 1492 1493static void 1494e1000_clean_rx_ring(struct e1000_adapter *adapter) 1495{ 1496 struct e1000_desc_ring *rx_ring = &adapter->rx_ring; 1497 struct e1000_buffer *buffer_info; 1498 struct e1000_ps_page *ps_page; 1499 struct e1000_ps_page_dma *ps_page_dma; 1500 struct pci_dev *pdev = adapter->pdev; 1501 unsigned long size; 1502 unsigned int i, j; 1503 1504 /* Free all the Rx ring sk_buffs */ 1505 1506 for(i = 0; i < rx_ring->count; i++) { 1507 buffer_info = &rx_ring->buffer_info[i]; 1508 if(buffer_info->skb) { 1509 ps_page = &rx_ring->ps_page[i]; 1510 ps_page_dma = &rx_ring->ps_page_dma[i]; 1511 pci_unmap_single(pdev, 1512 buffer_info->dma, 1513 buffer_info->length, 1514 PCI_DMA_FROMDEVICE); 1515 1516 dev_kfree_skb(buffer_info->skb); 1517 buffer_info->skb = NULL; 1518 1519 for(j = 0; j < PS_PAGE_BUFFERS; j++) { 1520 if(!ps_page->ps_page[j]) break; 1521 pci_unmap_single(pdev, 1522 ps_page_dma->ps_page_dma[j], 1523 PAGE_SIZE, PCI_DMA_FROMDEVICE); 1524 ps_page_dma->ps_page_dma[j] = 0; 1525 put_page(ps_page->ps_page[j]); 1526 ps_page->ps_page[j] = NULL; 1527 } 1528 } 1529 } 1530 1531 size = sizeof(struct e1000_buffer) * rx_ring->count; 1532 memset(rx_ring->buffer_info, 0, size); 1533 size = sizeof(struct e1000_ps_page) * rx_ring->count; 1534 memset(rx_ring->ps_page, 0, size); 1535 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; 1536 memset(rx_ring->ps_page_dma, 0, size); 1537 1538 /* Zero out the descriptor ring */ 1539 1540 memset(rx_ring->desc, 0, rx_ring->size); 1541 1542 rx_ring->next_to_clean = 0; 1543 rx_ring->next_to_use = 0; 1544 1545 E1000_WRITE_REG(&adapter->hw, RDH, 0); 1546 E1000_WRITE_REG(&adapter->hw, RDT, 0); 1547} 1548 1549/* The 82542 2.0 (revision 2) needs to have the receive unit in reset 1550 * and memory write and invalidate disabled for certain operations 1551 */ 1552static void 1553e1000_enter_82542_rst(struct e1000_adapter *adapter) 1554{ 1555 struct net_device *netdev = adapter->netdev; 1556 uint32_t rctl; 1557 1558 e1000_pci_clear_mwi(&adapter->hw); 1559 1560 rctl = E1000_READ_REG(&adapter->hw, RCTL); 1561 rctl |= E1000_RCTL_RST; 1562 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 1563 E1000_WRITE_FLUSH(&adapter->hw); 1564 mdelay(5); 1565 1566 if(netif_running(netdev)) 1567 e1000_clean_rx_ring(adapter); 1568} 1569 1570static void 1571e1000_leave_82542_rst(struct e1000_adapter *adapter) 1572{ 1573 struct net_device *netdev = adapter->netdev; 1574 uint32_t rctl; 1575 1576 rctl = E1000_READ_REG(&adapter->hw, RCTL); 1577 rctl &= ~E1000_RCTL_RST; 1578 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 1579 E1000_WRITE_FLUSH(&adapter->hw); 1580 mdelay(5); 1581 1582 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) 1583 e1000_pci_set_mwi(&adapter->hw); 1584 1585 if(netif_running(netdev)) { 1586 e1000_configure_rx(adapter); 1587 e1000_alloc_rx_buffers(adapter); 1588 } 1589} 1590 1591/** 1592 * e1000_set_mac - Change the Ethernet Address of the NIC 1593 * @netdev: network interface device structure 1594 * @p: pointer to an address structure 1595 * 1596 * Returns 0 on success, negative on failure 1597 **/ 1598 1599static int 1600e1000_set_mac(struct net_device *netdev, void *p) 1601{ 1602 struct e1000_adapter *adapter = netdev->priv; 1603 struct sockaddr *addr = p; 1604 1605 if(!is_valid_ether_addr(addr->sa_data)) 1606 return -EADDRNOTAVAIL; 1607 1608 /* 82542 2.0 needs to be in reset to write receive address registers */ 1609 1610 if(adapter->hw.mac_type == e1000_82542_rev2_0) 1611 e1000_enter_82542_rst(adapter); 1612 1613 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 1614 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 1615 1616 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); 1617 1618 if(adapter->hw.mac_type == e1000_82542_rev2_0) 1619 e1000_leave_82542_rst(adapter); 1620 1621 return 0; 1622} 1623 1624/** 1625 * e1000_set_multi - Multicast and Promiscuous mode set 1626 * @netdev: network interface device structure 1627 * 1628 * The set_multi entry point is called whenever the multicast address 1629 * list or the network interface flags are updated. This routine is 1630 * responsible for configuring the hardware for proper multicast, 1631 * promiscuous mode, and all-multi behavior. 1632 **/ 1633 1634static void 1635e1000_set_multi(struct net_device *netdev) 1636{ 1637 struct e1000_adapter *adapter = netdev->priv; 1638 struct e1000_hw *hw = &adapter->hw; 1639 struct dev_mc_list *mc_ptr; 1640 unsigned long flags; 1641 uint32_t rctl; 1642 uint32_t hash_value; 1643 int i; 1644 1645 spin_lock_irqsave(&adapter->tx_lock, flags); 1646 1647 /* Check for Promiscuous and All Multicast modes */ 1648 1649 rctl = E1000_READ_REG(hw, RCTL); 1650 1651 if(netdev->flags & IFF_PROMISC) { 1652 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 1653 } else if(netdev->flags & IFF_ALLMULTI) { 1654 rctl |= E1000_RCTL_MPE; 1655 rctl &= ~E1000_RCTL_UPE; 1656 } else { 1657 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 1658 } 1659 1660 E1000_WRITE_REG(hw, RCTL, rctl); 1661 1662 /* 82542 2.0 needs to be in reset to write receive address registers */ 1663 1664 if(hw->mac_type == e1000_82542_rev2_0) 1665 e1000_enter_82542_rst(adapter); 1666 1667 /* load the first 14 multicast address into the exact filters 1-14 1668 * RAR 0 is used for the station MAC adddress 1669 * if there are not 14 addresses, go ahead and clear the filters 1670 */ 1671 mc_ptr = netdev->mc_list; 1672 1673 for(i = 1; i < E1000_RAR_ENTRIES; i++) { 1674 if(mc_ptr) { 1675 e1000_rar_set(hw, mc_ptr->dmi_addr, i); 1676 mc_ptr = mc_ptr->next; 1677 } else { 1678 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); 1679 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); 1680 } 1681 } 1682 1683 /* clear the old settings from the multicast hash table */ 1684 1685 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++) 1686 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); 1687 1688 /* load any remaining addresses into the hash table */ 1689 1690 for(; mc_ptr; mc_ptr = mc_ptr->next) { 1691 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); 1692 e1000_mta_set(hw, hash_value); 1693 } 1694 1695 if(hw->mac_type == e1000_82542_rev2_0) 1696 e1000_leave_82542_rst(adapter); 1697 1698 spin_unlock_irqrestore(&adapter->tx_lock, flags); 1699} 1700 1701/* Need to wait a few seconds after link up to get diagnostic information from 1702 * the phy */ 1703 1704static void 1705e1000_update_phy_info(unsigned long data) 1706{ 1707 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 1708 e1000_phy_get_info(&adapter->hw, &adapter->phy_info); 1709} 1710 1711/** 1712 * e1000_82547_tx_fifo_stall - Timer Call-back 1713 * @data: pointer to adapter cast into an unsigned long 1714 **/ 1715 1716static void 1717e1000_82547_tx_fifo_stall(unsigned long data) 1718{ 1719 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 1720 struct net_device *netdev = adapter->netdev; 1721 uint32_t tctl; 1722 1723 if(atomic_read(&adapter->tx_fifo_stall)) { 1724 if((E1000_READ_REG(&adapter->hw, TDT) == 1725 E1000_READ_REG(&adapter->hw, TDH)) && 1726 (E1000_READ_REG(&adapter->hw, TDFT) == 1727 E1000_READ_REG(&adapter->hw, TDFH)) && 1728 (E1000_READ_REG(&adapter->hw, TDFTS) == 1729 E1000_READ_REG(&adapter->hw, TDFHS))) { 1730 tctl = E1000_READ_REG(&adapter->hw, TCTL); 1731 E1000_WRITE_REG(&adapter->hw, TCTL, 1732 tctl & ~E1000_TCTL_EN); 1733 E1000_WRITE_REG(&adapter->hw, TDFT, 1734 adapter->tx_head_addr); 1735 E1000_WRITE_REG(&adapter->hw, TDFH, 1736 adapter->tx_head_addr); 1737 E1000_WRITE_REG(&adapter->hw, TDFTS, 1738 adapter->tx_head_addr); 1739 E1000_WRITE_REG(&adapter->hw, TDFHS, 1740 adapter->tx_head_addr); 1741 E1000_WRITE_REG(&adapter->hw, TCTL, tctl); 1742 E1000_WRITE_FLUSH(&adapter->hw); 1743 1744 adapter->tx_fifo_head = 0; 1745 atomic_set(&adapter->tx_fifo_stall, 0); 1746 netif_wake_queue(netdev); 1747 } else { 1748 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); 1749 } 1750 } 1751} 1752 1753/** 1754 * e1000_watchdog - Timer Call-back 1755 * @data: pointer to adapter cast into an unsigned long 1756 **/ 1757static void 1758e1000_watchdog(unsigned long data) 1759{ 1760 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 1761 1762 /* Do the rest outside of interrupt context */ 1763 schedule_work(&adapter->watchdog_task); 1764} 1765 1766static void 1767e1000_watchdog_task(struct e1000_adapter *adapter) 1768{ 1769 struct net_device *netdev = adapter->netdev; 1770 struct e1000_desc_ring *txdr = &adapter->tx_ring; 1771 uint32_t link; 1772 1773 e1000_check_for_link(&adapter->hw); 1774 if (adapter->hw.mac_type == e1000_82573) { 1775 e1000_enable_tx_pkt_filtering(&adapter->hw); 1776 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) 1777 e1000_update_mng_vlan(adapter); 1778 } 1779 1780 if((adapter->hw.media_type == e1000_media_type_internal_serdes) && 1781 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) 1782 link = !adapter->hw.serdes_link_down; 1783 else 1784 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; 1785 1786 if(link) { 1787 if(!netif_carrier_ok(netdev)) { 1788 e1000_get_speed_and_duplex(&adapter->hw, 1789 &adapter->link_speed, 1790 &adapter->link_duplex); 1791 1792 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", 1793 adapter->link_speed, 1794 adapter->link_duplex == FULL_DUPLEX ? 1795 "Full Duplex" : "Half Duplex"); 1796 1797 netif_carrier_on(netdev); 1798 netif_wake_queue(netdev); 1799 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); 1800 adapter->smartspeed = 0; 1801 } 1802 } else { 1803 if(netif_carrier_ok(netdev)) { 1804 adapter->link_speed = 0; 1805 adapter->link_duplex = 0; 1806 DPRINTK(LINK, INFO, "NIC Link is Down\n"); 1807 netif_carrier_off(netdev); 1808 netif_stop_queue(netdev); 1809 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); 1810 } 1811 1812 e1000_smartspeed(adapter); 1813 } 1814 1815 e1000_update_stats(adapter); 1816 1817 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 1818 adapter->tpt_old = adapter->stats.tpt; 1819 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; 1820 adapter->colc_old = adapter->stats.colc; 1821 1822 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; 1823 adapter->gorcl_old = adapter->stats.gorcl; 1824 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; 1825 adapter->gotcl_old = adapter->stats.gotcl; 1826 1827 e1000_update_adaptive(&adapter->hw); 1828 1829 if(!netif_carrier_ok(netdev)) { 1830 if(E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { 1831 /* We've lost link, so the controller stops DMA, 1832 * but we've got queued Tx work that's never going 1833 * to get done, so reset controller to flush Tx. 1834 * (Do the reset outside of interrupt context). */ 1835 schedule_work(&adapter->tx_timeout_task); 1836 } 1837 } 1838 1839 /* Dynamic mode for Interrupt Throttle Rate (ITR) */ 1840 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) { 1841 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total 1842 * asymmetrical Tx or Rx gets ITR=8000; everyone 1843 * else is between 2000-8000. */ 1844 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000; 1845 uint32_t dif = (adapter->gotcl > adapter->gorcl ? 1846 adapter->gotcl - adapter->gorcl : 1847 adapter->gorcl - adapter->gotcl) / 10000; 1848 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 1849 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256)); 1850 } 1851 1852 /* Cause software interrupt to ensure rx ring is cleaned */ 1853 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); 1854 1855 /* Force detection of hung controller every watchdog period */ 1856 adapter->detect_tx_hung = TRUE; 1857 1858 /* Reset the timer */ 1859 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); 1860} 1861 1862#define E1000_TX_FLAGS_CSUM 0x00000001 1863#define E1000_TX_FLAGS_VLAN 0x00000002 1864#define E1000_TX_FLAGS_TSO 0x00000004 1865#define E1000_TX_FLAGS_IPV4 0x00000008 1866#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 1867#define E1000_TX_FLAGS_VLAN_SHIFT 16 1868 1869static inline int 1870e1000_tso(struct e1000_adapter *adapter, struct sk_buff *skb) 1871{ 1872#ifdef NETIF_F_TSO 1873 struct e1000_context_desc *context_desc; 1874 unsigned int i; 1875 uint32_t cmd_length = 0; 1876 uint16_t ipcse = 0, tucse, mss; 1877 uint8_t ipcss, ipcso, tucss, tucso, hdr_len; 1878 int err; 1879 1880 if(skb_shinfo(skb)->tso_size) { 1881 if (skb_header_cloned(skb)) { 1882 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 1883 if (err) 1884 return err; 1885 } 1886 1887 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); 1888 mss = skb_shinfo(skb)->tso_size; 1889 if(skb->protocol == ntohs(ETH_P_IP)) { 1890 skb->nh.iph->tot_len = 0; 1891 skb->nh.iph->check = 0; 1892 skb->h.th->check = 1893 ~csum_tcpudp_magic(skb->nh.iph->saddr, 1894 skb->nh.iph->daddr, 1895 0, 1896 IPPROTO_TCP, 1897 0); 1898 cmd_length = E1000_TXD_CMD_IP; 1899 ipcse = skb->h.raw - skb->data - 1; 1900#ifdef NETIF_F_TSO_IPV6 1901 } else if(skb->protocol == ntohs(ETH_P_IPV6)) { 1902 skb->nh.ipv6h->payload_len = 0; 1903 skb->h.th->check = 1904 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, 1905 &skb->nh.ipv6h->daddr, 1906 0, 1907 IPPROTO_TCP, 1908 0); 1909 ipcse = 0; 1910#endif 1911 } 1912 ipcss = skb->nh.raw - skb->data; 1913 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; 1914 tucss = skb->h.raw - skb->data; 1915 tucso = (void *)&(skb->h.th->check) - (void *)skb->data; 1916 tucse = 0; 1917 1918 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 1919 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 1920 1921 i = adapter->tx_ring.next_to_use; 1922 context_desc = E1000_CONTEXT_DESC(adapter->tx_ring, i); 1923 1924 context_desc->lower_setup.ip_fields.ipcss = ipcss; 1925 context_desc->lower_setup.ip_fields.ipcso = ipcso; 1926 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 1927 context_desc->upper_setup.tcp_fields.tucss = tucss; 1928 context_desc->upper_setup.tcp_fields.tucso = tucso; 1929 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 1930 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 1931 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 1932 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 1933 1934 if(++i == adapter->tx_ring.count) i = 0; 1935 adapter->tx_ring.next_to_use = i; 1936 1937 return 1; 1938 } 1939#endif 1940 1941 return 0; 1942} 1943 1944static inline boolean_t 1945e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb) 1946{ 1947 struct e1000_context_desc *context_desc; 1948 unsigned int i; 1949 uint8_t css; 1950 1951 if(likely(skb->ip_summed == CHECKSUM_HW)) { 1952 css = skb->h.raw - skb->data; 1953 1954 i = adapter->tx_ring.next_to_use; 1955 context_desc = E1000_CONTEXT_DESC(adapter->tx_ring, i); 1956 1957 context_desc->upper_setup.tcp_fields.tucss = css; 1958 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum; 1959 context_desc->upper_setup.tcp_fields.tucse = 0; 1960 context_desc->tcp_seg_setup.data = 0; 1961 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); 1962 1963 if(unlikely(++i == adapter->tx_ring.count)) i = 0; 1964 adapter->tx_ring.next_to_use = i; 1965 1966 return TRUE; 1967 } 1968 1969 return FALSE; 1970} 1971 1972#define E1000_MAX_TXD_PWR 12 1973#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) 1974 1975static inline int 1976e1000_tx_map(struct e1000_adapter *adapter, struct sk_buff *skb, 1977 unsigned int first, unsigned int max_per_txd, 1978 unsigned int nr_frags, unsigned int mss) 1979{ 1980 struct e1000_desc_ring *tx_ring = &adapter->tx_ring; 1981 struct e1000_buffer *buffer_info; 1982 unsigned int len = skb->len; 1983 unsigned int offset = 0, size, count = 0, i; 1984 unsigned int f; 1985 len -= skb->data_len; 1986 1987 i = tx_ring->next_to_use; 1988 1989 while(len) { 1990 buffer_info = &tx_ring->buffer_info[i]; 1991 size = min(len, max_per_txd); 1992#ifdef NETIF_F_TSO 1993 /* Workaround for premature desc write-backs 1994 * in TSO mode. Append 4-byte sentinel desc */ 1995 if(unlikely(mss && !nr_frags && size == len && size > 8)) 1996 size -= 4; 1997#endif 1998 /* work-around for errata 10 and it applies 1999 * to all controllers in PCI-X mode 2000 * The fix is to make sure that the first descriptor of a 2001 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes 2002 */ 2003 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && 2004 (size > 2015) && count == 0)) 2005 size = 2015; 2006 2007 /* Workaround for potential 82544 hang in PCI-X. Avoid 2008 * terminating buffers within evenly-aligned dwords. */ 2009 if(unlikely(adapter->pcix_82544 && 2010 !((unsigned long)(skb->data + offset + size - 1) & 4) && 2011 size > 4)) 2012 size -= 4; 2013 2014 buffer_info->length = size; 2015 buffer_info->dma = 2016 pci_map_single(adapter->pdev, 2017 skb->data + offset, 2018 size, 2019 PCI_DMA_TODEVICE); 2020 buffer_info->time_stamp = jiffies; 2021 2022 len -= size; 2023 offset += size; 2024 count++; 2025 if(unlikely(++i == tx_ring->count)) i = 0; 2026 } 2027 2028 for(f = 0; f < nr_frags; f++) { 2029 struct skb_frag_struct *frag; 2030 2031 frag = &skb_shinfo(skb)->frags[f]; 2032 len = frag->size; 2033 offset = frag->page_offset; 2034 2035 while(len) { 2036 buffer_info = &tx_ring->buffer_info[i]; 2037 size = min(len, max_per_txd); 2038#ifdef NETIF_F_TSO 2039 /* Workaround for premature desc write-backs 2040 * in TSO mode. Append 4-byte sentinel desc */ 2041 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) 2042 size -= 4; 2043#endif 2044 /* Workaround for potential 82544 hang in PCI-X. 2045 * Avoid terminating buffers within evenly-aligned 2046 * dwords. */ 2047 if(unlikely(adapter->pcix_82544 && 2048 !((unsigned long)(frag->page+offset+size-1) & 4) && 2049 size > 4)) 2050 size -= 4; 2051 2052 buffer_info->length = size; 2053 buffer_info->dma = 2054 pci_map_page(adapter->pdev, 2055 frag->page, 2056 offset, 2057 size, 2058 PCI_DMA_TODEVICE); 2059 buffer_info->time_stamp = jiffies; 2060 2061 len -= size; 2062 offset += size; 2063 count++; 2064 if(unlikely(++i == tx_ring->count)) i = 0; 2065 } 2066 } 2067 2068 i = (i == 0) ? tx_ring->count - 1 : i - 1; 2069 tx_ring->buffer_info[i].skb = skb; 2070 tx_ring->buffer_info[first].next_to_watch = i; 2071 2072 return count; 2073} 2074 2075static inline void 2076e1000_tx_queue(struct e1000_adapter *adapter, int count, int tx_flags) 2077{ 2078 struct e1000_desc_ring *tx_ring = &adapter->tx_ring; 2079 struct e1000_tx_desc *tx_desc = NULL; 2080 struct e1000_buffer *buffer_info; 2081 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 2082 unsigned int i; 2083 2084 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) { 2085 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 2086 E1000_TXD_CMD_TSE; 2087 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 2088 2089 if(likely(tx_flags & E1000_TX_FLAGS_IPV4)) 2090 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 2091 } 2092 2093 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) { 2094 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2095 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 2096 } 2097 2098 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { 2099 txd_lower |= E1000_TXD_CMD_VLE; 2100 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 2101 } 2102 2103 i = tx_ring->next_to_use; 2104 2105 while(count--) { 2106 buffer_info = &tx_ring->buffer_info[i]; 2107 tx_desc = E1000_TX_DESC(*tx_ring, i); 2108 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 2109 tx_desc->lower.data = 2110 cpu_to_le32(txd_lower | buffer_info->length); 2111 tx_desc->upper.data = cpu_to_le32(txd_upper); 2112 if(unlikely(++i == tx_ring->count)) i = 0; 2113 } 2114 2115 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 2116 2117 /* Force memory writes to complete before letting h/w 2118 * know there are new descriptors to fetch. (Only 2119 * applicable for weak-ordered memory model archs, 2120 * such as IA-64). */ 2121 wmb(); 2122 2123 tx_ring->next_to_use = i; 2124 E1000_WRITE_REG(&adapter->hw, TDT, i); 2125} 2126 2127/** 2128 * 82547 workaround to avoid controller hang in half-duplex environment. 2129 * The workaround is to avoid queuing a large packet that would span 2130 * the internal Tx FIFO ring boundary by notifying the stack to resend 2131 * the packet at a later time. This gives the Tx FIFO an opportunity to 2132 * flush all packets. When that occurs, we reset the Tx FIFO pointers 2133 * to the beginning of the Tx FIFO. 2134 **/ 2135 2136#define E1000_FIFO_HDR 0x10 2137#define E1000_82547_PAD_LEN 0x3E0 2138 2139static inline int 2140e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) 2141{ 2142 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; 2143 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; 2144 2145 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); 2146 2147 if(adapter->link_duplex != HALF_DUPLEX) 2148 goto no_fifo_stall_required; 2149 2150 if(atomic_read(&adapter->tx_fifo_stall)) 2151 return 1; 2152 2153 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { 2154 atomic_set(&adapter->tx_fifo_stall, 1); 2155 return 1; 2156 } 2157 2158no_fifo_stall_required: 2159 adapter->tx_fifo_head += skb_fifo_len; 2160 if(adapter->tx_fifo_head >= adapter->tx_fifo_size) 2161 adapter->tx_fifo_head -= adapter->tx_fifo_size; 2162 return 0; 2163} 2164 2165#define MINIMUM_DHCP_PACKET_SIZE 282 2166static inline int 2167e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) 2168{ 2169 struct e1000_hw *hw = &adapter->hw; 2170 uint16_t length, offset; 2171 if(vlan_tx_tag_present(skb)) { 2172 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 2173 ( adapter->hw.mng_cookie.status & 2174 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) 2175 return 0; 2176 } 2177 if(htons(ETH_P_IP) == skb->protocol) { 2178 const struct iphdr *ip = skb->nh.iph; 2179 if(IPPROTO_UDP == ip->protocol) { 2180 struct udphdr *udp = (struct udphdr *)(skb->h.uh); 2181 if(ntohs(udp->dest) == 67) { 2182 offset = (uint8_t *)udp + 8 - skb->data; 2183 length = skb->len - offset; 2184 2185 return e1000_mng_write_dhcp_info(hw, 2186 (uint8_t *)udp + 8, length); 2187 } 2188 } 2189 } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) { 2190 struct ethhdr *eth = (struct ethhdr *) skb->data; 2191 if((htons(ETH_P_IP) == eth->h_proto)) { 2192 const struct iphdr *ip = 2193 (struct iphdr *)((uint8_t *)skb->data+14); 2194 if(IPPROTO_UDP == ip->protocol) { 2195 struct udphdr *udp = 2196 (struct udphdr *)((uint8_t *)ip + 2197 (ip->ihl << 2)); 2198 if(ntohs(udp->dest) == 67) { 2199 offset = (uint8_t *)udp + 8 - skb->data; 2200 length = skb->len - offset; 2201 2202 return e1000_mng_write_dhcp_info(hw, 2203 (uint8_t *)udp + 8, 2204 length); 2205 } 2206 } 2207 } 2208 } 2209 return 0; 2210} 2211 2212#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) 2213static int 2214e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 2215{ 2216 struct e1000_adapter *adapter = netdev->priv; 2217 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; 2218 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 2219 unsigned int tx_flags = 0; 2220 unsigned int len = skb->len; 2221 unsigned long flags; 2222 unsigned int nr_frags = 0; 2223 unsigned int mss = 0; 2224 int count = 0; 2225 int tso; 2226 unsigned int f; 2227 len -= skb->data_len; 2228 2229 if(unlikely(skb->len <= 0)) { 2230 dev_kfree_skb_any(skb); 2231 return NETDEV_TX_OK; 2232 } 2233 2234#ifdef NETIF_F_TSO 2235 mss = skb_shinfo(skb)->tso_size; 2236 /* The controller does a simple calculation to 2237 * make sure there is enough room in the FIFO before 2238 * initiating the DMA for each buffer. The calc is: 2239 * 4 = ceil(buffer len/mss). To make sure we don't 2240 * overrun the FIFO, adjust the max buffer len if mss 2241 * drops. */ 2242 if(mss) { 2243 max_per_txd = min(mss << 2, max_per_txd); 2244 max_txd_pwr = fls(max_per_txd) - 1; 2245 } 2246 2247 if((mss) || (skb->ip_summed == CHECKSUM_HW)) 2248 count++; 2249 count++; 2250#else 2251 if(skb->ip_summed == CHECKSUM_HW) 2252 count++; 2253#endif 2254 count += TXD_USE_COUNT(len, max_txd_pwr); 2255 2256 if(adapter->pcix_82544) 2257 count++; 2258 2259 /* work-around for errata 10 and it applies to all controllers 2260 * in PCI-X mode, so add one more descriptor to the count 2261 */ 2262 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && 2263 (len > 2015))) 2264 count++; 2265 2266 nr_frags = skb_shinfo(skb)->nr_frags; 2267 for(f = 0; f < nr_frags; f++) 2268 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, 2269 max_txd_pwr); 2270 if(adapter->pcix_82544) 2271 count += nr_frags; 2272 2273 local_irq_save(flags); 2274 if (!spin_trylock(&adapter->tx_lock)) { 2275 /* Collision - tell upper layer to requeue */ 2276 local_irq_restore(flags); 2277 return NETDEV_TX_LOCKED; 2278 } 2279 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) ) 2280 e1000_transfer_dhcp_info(adapter, skb); 2281 2282 2283 /* need: count + 2 desc gap to keep tail from touching 2284 * head, otherwise try next time */ 2285 if(unlikely(E1000_DESC_UNUSED(&adapter->tx_ring) < count + 2)) { 2286 netif_stop_queue(netdev); 2287 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2288 return NETDEV_TX_BUSY; 2289 } 2290 2291 if(unlikely(adapter->hw.mac_type == e1000_82547)) { 2292 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) { 2293 netif_stop_queue(netdev); 2294 mod_timer(&adapter->tx_fifo_stall_timer, jiffies); 2295 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2296 return NETDEV_TX_BUSY; 2297 } 2298 } 2299 2300 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { 2301 tx_flags |= E1000_TX_FLAGS_VLAN; 2302 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 2303 } 2304 2305 first = adapter->tx_ring.next_to_use; 2306 2307 tso = e1000_tso(adapter, skb); 2308 if (tso < 0) { 2309 dev_kfree_skb_any(skb); 2310 return NETDEV_TX_OK; 2311 } 2312 2313 if (likely(tso)) 2314 tx_flags |= E1000_TX_FLAGS_TSO; 2315 else if(likely(e1000_tx_csum(adapter, skb))) 2316 tx_flags |= E1000_TX_FLAGS_CSUM; 2317 2318 /* Old method was to assume IPv4 packet by default if TSO was enabled. 2319 * 82573 hardware supports TSO capabilities for IPv6 as well... 2320 * no longer assume, we must. */ 2321 if(likely(skb->protocol == ntohs(ETH_P_IP))) 2322 tx_flags |= E1000_TX_FLAGS_IPV4; 2323 2324 e1000_tx_queue(adapter, 2325 e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss), 2326 tx_flags); 2327 2328 netdev->trans_start = jiffies; 2329 2330 /* Make sure there is space in the ring for the next send. */ 2331 if(unlikely(E1000_DESC_UNUSED(&adapter->tx_ring) < MAX_SKB_FRAGS + 2)) 2332 netif_stop_queue(netdev); 2333 2334 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2335 return NETDEV_TX_OK; 2336} 2337 2338/** 2339 * e1000_tx_timeout - Respond to a Tx Hang 2340 * @netdev: network interface device structure 2341 **/ 2342 2343static void 2344e1000_tx_timeout(struct net_device *netdev) 2345{ 2346 struct e1000_adapter *adapter = netdev->priv; 2347 2348 /* Do the reset outside of interrupt context */ 2349 schedule_work(&adapter->tx_timeout_task); 2350} 2351 2352static void 2353e1000_tx_timeout_task(struct net_device *netdev) 2354{ 2355 struct e1000_adapter *adapter = netdev->priv; 2356 2357 e1000_down(adapter); 2358 e1000_up(adapter); 2359} 2360 2361/** 2362 * e1000_get_stats - Get System Network Statistics 2363 * @netdev: network interface device structure 2364 * 2365 * Returns the address of the device statistics structure. 2366 * The statistics are actually updated from the timer callback. 2367 **/ 2368 2369static struct net_device_stats * 2370e1000_get_stats(struct net_device *netdev) 2371{ 2372 struct e1000_adapter *adapter = netdev->priv; 2373 2374 e1000_update_stats(adapter); 2375 return &adapter->net_stats; 2376} 2377 2378/** 2379 * e1000_change_mtu - Change the Maximum Transfer Unit 2380 * @netdev: network interface device structure 2381 * @new_mtu: new value for maximum frame size 2382 * 2383 * Returns 0 on success, negative on failure 2384 **/ 2385 2386static int 2387e1000_change_mtu(struct net_device *netdev, int new_mtu) 2388{ 2389 struct e1000_adapter *adapter = netdev->priv; 2390 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; 2391 2392 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || 2393 (max_frame > MAX_JUMBO_FRAME_SIZE)) { 2394 DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); 2395 return -EINVAL; 2396 } 2397 2398#define MAX_STD_JUMBO_FRAME_SIZE 9216 2399 /* might want this to be bigger enum check... */ 2400 if (adapter->hw.mac_type == e1000_82573 && 2401 max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { 2402 DPRINTK(PROBE, ERR, "Jumbo Frames not supported " 2403 "on 82573\n"); 2404 return -EINVAL; 2405 } 2406 2407 if(adapter->hw.mac_type > e1000_82547_rev_2) { 2408 adapter->rx_buffer_len = max_frame; 2409 E1000_ROUNDUP(adapter->rx_buffer_len, 1024); 2410 } else { 2411 if(unlikely((adapter->hw.mac_type < e1000_82543) && 2412 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) { 2413 DPRINTK(PROBE, ERR, "Jumbo Frames not supported " 2414 "on 82542\n"); 2415 return -EINVAL; 2416 2417 } else { 2418 if(max_frame <= E1000_RXBUFFER_2048) { 2419 adapter->rx_buffer_len = E1000_RXBUFFER_2048; 2420 } else if(max_frame <= E1000_RXBUFFER_4096) { 2421 adapter->rx_buffer_len = E1000_RXBUFFER_4096; 2422 } else if(max_frame <= E1000_RXBUFFER_8192) { 2423 adapter->rx_buffer_len = E1000_RXBUFFER_8192; 2424 } else if(max_frame <= E1000_RXBUFFER_16384) { 2425 adapter->rx_buffer_len = E1000_RXBUFFER_16384; 2426 } 2427 } 2428 } 2429 2430 netdev->mtu = new_mtu; 2431 2432 if(netif_running(netdev)) { 2433 e1000_down(adapter); 2434 e1000_up(adapter); 2435 } 2436 2437 adapter->hw.max_frame_size = max_frame; 2438 2439 return 0; 2440} 2441 2442/** 2443 * e1000_update_stats - Update the board statistics counters 2444 * @adapter: board private structure 2445 **/ 2446 2447void 2448e1000_update_stats(struct e1000_adapter *adapter) 2449{ 2450 struct e1000_hw *hw = &adapter->hw; 2451 unsigned long flags; 2452 uint16_t phy_tmp; 2453 2454#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF 2455 2456 spin_lock_irqsave(&adapter->stats_lock, flags); 2457 2458 /* these counters are modified from e1000_adjust_tbi_stats, 2459 * called from the interrupt context, so they must only 2460 * be written while holding adapter->stats_lock 2461 */ 2462 2463 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); 2464 adapter->stats.gprc += E1000_READ_REG(hw, GPRC); 2465 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); 2466 adapter->stats.gorch += E1000_READ_REG(hw, GORCH); 2467 adapter->stats.bprc += E1000_READ_REG(hw, BPRC); 2468 adapter->stats.mprc += E1000_READ_REG(hw, MPRC); 2469 adapter->stats.roc += E1000_READ_REG(hw, ROC); 2470 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); 2471 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); 2472 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); 2473 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); 2474 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); 2475 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); 2476 2477 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); 2478 adapter->stats.mpc += E1000_READ_REG(hw, MPC); 2479 adapter->stats.scc += E1000_READ_REG(hw, SCC); 2480 adapter->stats.ecol += E1000_READ_REG(hw, ECOL); 2481 adapter->stats.mcc += E1000_READ_REG(hw, MCC); 2482 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); 2483 adapter->stats.dc += E1000_READ_REG(hw, DC); 2484 adapter->stats.sec += E1000_READ_REG(hw, SEC); 2485 adapter->stats.rlec += E1000_READ_REG(hw, RLEC); 2486 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); 2487 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); 2488 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); 2489 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); 2490 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); 2491 adapter->stats.gptc += E1000_READ_REG(hw, GPTC); 2492 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); 2493 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); 2494 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); 2495 adapter->stats.ruc += E1000_READ_REG(hw, RUC); 2496 adapter->stats.rfc += E1000_READ_REG(hw, RFC); 2497 adapter->stats.rjc += E1000_READ_REG(hw, RJC); 2498 adapter->stats.torl += E1000_READ_REG(hw, TORL); 2499 adapter->stats.torh += E1000_READ_REG(hw, TORH); 2500 adapter->stats.totl += E1000_READ_REG(hw, TOTL); 2501 adapter->stats.toth += E1000_READ_REG(hw, TOTH); 2502 adapter->stats.tpr += E1000_READ_REG(hw, TPR); 2503 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); 2504 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); 2505 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); 2506 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); 2507 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); 2508 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); 2509 adapter->stats.mptc += E1000_READ_REG(hw, MPTC); 2510 adapter->stats.bptc += E1000_READ_REG(hw, BPTC); 2511 2512 /* used for adaptive IFS */ 2513 2514 hw->tx_packet_delta = E1000_READ_REG(hw, TPT); 2515 adapter->stats.tpt += hw->tx_packet_delta; 2516 hw->collision_delta = E1000_READ_REG(hw, COLC); 2517 adapter->stats.colc += hw->collision_delta; 2518 2519 if(hw->mac_type >= e1000_82543) { 2520 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); 2521 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); 2522 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); 2523 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); 2524 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); 2525 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); 2526 } 2527 if(hw->mac_type > e1000_82547_rev_2) { 2528 adapter->stats.iac += E1000_READ_REG(hw, IAC); 2529 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); 2530 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); 2531 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); 2532 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); 2533 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); 2534 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); 2535 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); 2536 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); 2537 } 2538 2539 /* Fill out the OS statistics structure */ 2540 2541 adapter->net_stats.rx_packets = adapter->stats.gprc; 2542 adapter->net_stats.tx_packets = adapter->stats.gptc; 2543 adapter->net_stats.rx_bytes = adapter->stats.gorcl; 2544 adapter->net_stats.tx_bytes = adapter->stats.gotcl; 2545 adapter->net_stats.multicast = adapter->stats.mprc; 2546 adapter->net_stats.collisions = adapter->stats.colc; 2547 2548 /* Rx Errors */ 2549 2550 adapter->net_stats.rx_errors = adapter->stats.rxerrc + 2551 adapter->stats.crcerrs + adapter->stats.algnerrc + 2552 adapter->stats.rlec + adapter->stats.mpc + 2553 adapter->stats.cexterr; 2554 adapter->net_stats.rx_dropped = adapter->stats.mpc; 2555 adapter->net_stats.rx_length_errors = adapter->stats.rlec; 2556 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; 2557 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; 2558 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc; 2559 adapter->net_stats.rx_missed_errors = adapter->stats.mpc; 2560 2561 /* Tx Errors */ 2562 2563 adapter->net_stats.tx_errors = adapter->stats.ecol + 2564 adapter->stats.latecol; 2565 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; 2566 adapter->net_stats.tx_window_errors = adapter->stats.latecol; 2567 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; 2568 2569 /* Tx Dropped needs to be maintained elsewhere */ 2570 2571 /* Phy Stats */ 2572 2573 if(hw->media_type == e1000_media_type_copper) { 2574 if((adapter->link_speed == SPEED_1000) && 2575 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { 2576 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; 2577 adapter->phy_stats.idle_errors += phy_tmp; 2578 } 2579 2580 if((hw->mac_type <= e1000_82546) && 2581 (hw->phy_type == e1000_phy_m88) && 2582 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) 2583 adapter->phy_stats.receive_errors += phy_tmp; 2584 } 2585 2586 spin_unlock_irqrestore(&adapter->stats_lock, flags); 2587} 2588 2589/** 2590 * e1000_intr - Interrupt Handler 2591 * @irq: interrupt number 2592 * @data: pointer to a network interface device structure 2593 * @pt_regs: CPU registers structure 2594 **/ 2595 2596static irqreturn_t 2597e1000_intr(int irq, void *data, struct pt_regs *regs) 2598{ 2599 struct net_device *netdev = data; 2600 struct e1000_adapter *adapter = netdev->priv; 2601 struct e1000_hw *hw = &adapter->hw; 2602 uint32_t icr = E1000_READ_REG(hw, ICR); 2603#ifndef CONFIG_E1000_NAPI 2604 unsigned int i; 2605#endif 2606 2607 if(unlikely(!icr)) 2608 return IRQ_NONE; /* Not our interrupt */ 2609 2610 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { 2611 hw->get_link_status = 1; 2612 mod_timer(&adapter->watchdog_timer, jiffies); 2613 } 2614 2615#ifdef CONFIG_E1000_NAPI 2616 if(likely(netif_rx_schedule_prep(netdev))) { 2617 2618 /* Disable interrupts and register for poll. The flush 2619 of the posted write is intentionally left out. 2620 */ 2621 2622 atomic_inc(&adapter->irq_sem); 2623 E1000_WRITE_REG(hw, IMC, ~0); 2624 __netif_rx_schedule(netdev); 2625 } 2626#else 2627 /* Writing IMC and IMS is needed for 82547. 2628 Due to Hub Link bus being occupied, an interrupt 2629 de-assertion message is not able to be sent. 2630 When an interrupt assertion message is generated later, 2631 two messages are re-ordered and sent out. 2632 That causes APIC to think 82547 is in de-assertion 2633 state, while 82547 is in assertion state, resulting 2634 in dead lock. Writing IMC forces 82547 into 2635 de-assertion state. 2636 */ 2637 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){ 2638 atomic_inc(&adapter->irq_sem); 2639 E1000_WRITE_REG(hw, IMC, ~0); 2640 } 2641 2642 for(i = 0; i < E1000_MAX_INTR; i++) 2643 if(unlikely(!adapter->clean_rx(adapter) & 2644 !e1000_clean_tx_irq(adapter))) 2645 break; 2646 2647 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) 2648 e1000_irq_enable(adapter); 2649#endif 2650 2651 return IRQ_HANDLED; 2652} 2653 2654#ifdef CONFIG_E1000_NAPI 2655/** 2656 * e1000_clean - NAPI Rx polling callback 2657 * @adapter: board private structure 2658 **/ 2659 2660static int 2661e1000_clean(struct net_device *netdev, int *budget) 2662{ 2663 struct e1000_adapter *adapter = netdev->priv; 2664 int work_to_do = min(*budget, netdev->quota); 2665 int tx_cleaned; 2666 int work_done = 0; 2667 2668 tx_cleaned = e1000_clean_tx_irq(adapter); 2669 adapter->clean_rx(adapter, &work_done, work_to_do); 2670 2671 *budget -= work_done; 2672 netdev->quota -= work_done; 2673 2674 /* If no Tx and no Rx work done, exit the polling mode */ 2675 if ((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) { 2676 netif_rx_complete(netdev); 2677 e1000_irq_enable(adapter); 2678 return 0; 2679 } 2680 2681 return 1; 2682} 2683 2684#endif 2685/** 2686 * e1000_clean_tx_irq - Reclaim resources after transmit completes 2687 * @adapter: board private structure 2688 **/ 2689 2690static boolean_t 2691e1000_clean_tx_irq(struct e1000_adapter *adapter) 2692{ 2693 struct e1000_desc_ring *tx_ring = &adapter->tx_ring; 2694 struct net_device *netdev = adapter->netdev; 2695 struct e1000_tx_desc *tx_desc, *eop_desc; 2696 struct e1000_buffer *buffer_info; 2697 unsigned int i, eop; 2698 boolean_t cleaned = FALSE; 2699 2700 i = tx_ring->next_to_clean; 2701 eop = tx_ring->buffer_info[i].next_to_watch; 2702 eop_desc = E1000_TX_DESC(*tx_ring, eop); 2703 2704 while(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { 2705 /* Premature writeback of Tx descriptors clear (free buffers 2706 * and unmap pci_mapping) previous_buffer_info */ 2707 if (likely(adapter->previous_buffer_info.skb != NULL)) { 2708 e1000_unmap_and_free_tx_resource(adapter, 2709 &adapter->previous_buffer_info); 2710 } 2711 2712 for(cleaned = FALSE; !cleaned; ) { 2713 tx_desc = E1000_TX_DESC(*tx_ring, i); 2714 buffer_info = &tx_ring->buffer_info[i]; 2715 cleaned = (i == eop); 2716 2717#ifdef NETIF_F_TSO 2718 if (!(netdev->features & NETIF_F_TSO)) { 2719#endif 2720 e1000_unmap_and_free_tx_resource(adapter, 2721 buffer_info); 2722#ifdef NETIF_F_TSO 2723 } else { 2724 if (cleaned) { 2725 memcpy(&adapter->previous_buffer_info, 2726 buffer_info, 2727 sizeof(struct e1000_buffer)); 2728 memset(buffer_info, 0, 2729 sizeof(struct e1000_buffer)); 2730 } else { 2731 e1000_unmap_and_free_tx_resource( 2732 adapter, buffer_info); 2733 } 2734 } 2735#endif 2736 2737 tx_desc->buffer_addr = 0; 2738 tx_desc->lower.data = 0; 2739 tx_desc->upper.data = 0; 2740 2741 if(unlikely(++i == tx_ring->count)) i = 0; 2742 } 2743 2744 eop = tx_ring->buffer_info[i].next_to_watch; 2745 eop_desc = E1000_TX_DESC(*tx_ring, eop); 2746 } 2747 2748 tx_ring->next_to_clean = i; 2749 2750 spin_lock(&adapter->tx_lock); 2751 2752 if(unlikely(cleaned && netif_queue_stopped(netdev) && 2753 netif_carrier_ok(netdev))) 2754 netif_wake_queue(netdev); 2755 2756 spin_unlock(&adapter->tx_lock); 2757 if(adapter->detect_tx_hung) { 2758 2759 /* Detect a transmit hang in hardware, this serializes the 2760 * check with the clearing of time_stamp and movement of i */ 2761 adapter->detect_tx_hung = FALSE; 2762 if (tx_ring->buffer_info[i].dma && 2763 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ) 2764 && !(E1000_READ_REG(&adapter->hw, STATUS) & 2765 E1000_STATUS_TXOFF)) { 2766 2767 /* detected Tx unit hang */ 2768 i = tx_ring->next_to_clean; 2769 eop = tx_ring->buffer_info[i].next_to_watch; 2770 eop_desc = E1000_TX_DESC(*tx_ring, eop); 2771 DPRINTK(TX_ERR, ERR, "Detected Tx Unit Hang\n" 2772 " TDH <%x>\n" 2773 " TDT <%x>\n" 2774 " next_to_use <%x>\n" 2775 " next_to_clean <%x>\n" 2776 "buffer_info[next_to_clean]\n" 2777 " dma <%llx>\n" 2778 " time_stamp <%lx>\n" 2779 " next_to_watch <%x>\n" 2780 " jiffies <%lx>\n" 2781 " next_to_watch.status <%x>\n", 2782 E1000_READ_REG(&adapter->hw, TDH), 2783 E1000_READ_REG(&adapter->hw, TDT), 2784 tx_ring->next_to_use, 2785 i, 2786 tx_ring->buffer_info[i].dma, 2787 tx_ring->buffer_info[i].time_stamp, 2788 eop, 2789 jiffies, 2790 eop_desc->upper.fields.status); 2791 netif_stop_queue(netdev); 2792 } 2793 } 2794#ifdef NETIF_F_TSO 2795 2796 if( unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 2797 time_after(jiffies, adapter->previous_buffer_info.time_stamp + HZ))) 2798 e1000_unmap_and_free_tx_resource( 2799 adapter, &adapter->previous_buffer_info); 2800 2801#endif 2802 return cleaned; 2803} 2804 2805/** 2806 * e1000_rx_checksum - Receive Checksum Offload for 82543 2807 * @adapter: board private structure 2808 * @status_err: receive descriptor status and error fields 2809 * @csum: receive descriptor csum field 2810 * @sk_buff: socket buffer with received data 2811 **/ 2812 2813static inline void 2814e1000_rx_checksum(struct e1000_adapter *adapter, 2815 uint32_t status_err, uint32_t csum, 2816 struct sk_buff *skb) 2817{ 2818 uint16_t status = (uint16_t)status_err; 2819 uint8_t errors = (uint8_t)(status_err >> 24); 2820 skb->ip_summed = CHECKSUM_NONE; 2821 2822 /* 82543 or newer only */ 2823 if(unlikely(adapter->hw.mac_type < e1000_82543)) return; 2824 /* Ignore Checksum bit is set */ 2825 if(unlikely(status & E1000_RXD_STAT_IXSM)) return; 2826 /* TCP/UDP checksum error bit is set */ 2827 if(unlikely(errors & E1000_RXD_ERR_TCPE)) { 2828 /* let the stack verify checksum errors */ 2829 adapter->hw_csum_err++; 2830 return; 2831 } 2832 /* TCP/UDP Checksum has not been calculated */ 2833 if(adapter->hw.mac_type <= e1000_82547_rev_2) { 2834 if(!(status & E1000_RXD_STAT_TCPCS)) 2835 return; 2836 } else { 2837 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 2838 return; 2839 } 2840 /* It must be a TCP or UDP packet with a valid checksum */ 2841 if (likely(status & E1000_RXD_STAT_TCPCS)) { 2842 /* TCP checksum is good */ 2843 skb->ip_summed = CHECKSUM_UNNECESSARY; 2844 } else if (adapter->hw.mac_type > e1000_82547_rev_2) { 2845 /* IP fragment with UDP payload */ 2846 /* Hardware complements the payload checksum, so we undo it 2847 * and then put the value in host order for further stack use. 2848 */ 2849 csum = ntohl(csum ^ 0xFFFF); 2850 skb->csum = csum; 2851 skb->ip_summed = CHECKSUM_HW; 2852 } 2853 adapter->hw_csum_good++; 2854} 2855 2856/** 2857 * e1000_clean_rx_irq - Send received data up the network stack; legacy 2858 * @adapter: board private structure 2859 **/ 2860 2861static boolean_t 2862#ifdef CONFIG_E1000_NAPI 2863e1000_clean_rx_irq(struct e1000_adapter *adapter, int *work_done, 2864 int work_to_do) 2865#else 2866e1000_clean_rx_irq(struct e1000_adapter *adapter) 2867#endif 2868{ 2869 struct e1000_desc_ring *rx_ring = &adapter->rx_ring; 2870 struct net_device *netdev = adapter->netdev; 2871 struct pci_dev *pdev = adapter->pdev; 2872 struct e1000_rx_desc *rx_desc; 2873 struct e1000_buffer *buffer_info; 2874 struct sk_buff *skb; 2875 unsigned long flags; 2876 uint32_t length; 2877 uint8_t last_byte; 2878 unsigned int i; 2879 boolean_t cleaned = FALSE; 2880 2881 i = rx_ring->next_to_clean; 2882 rx_desc = E1000_RX_DESC(*rx_ring, i); 2883 2884 while(rx_desc->status & E1000_RXD_STAT_DD) { 2885 buffer_info = &rx_ring->buffer_info[i]; 2886#ifdef CONFIG_E1000_NAPI 2887 if(*work_done >= work_to_do) 2888 break; 2889 (*work_done)++; 2890#endif 2891 cleaned = TRUE; 2892 2893 pci_unmap_single(pdev, 2894 buffer_info->dma, 2895 buffer_info->length, 2896 PCI_DMA_FROMDEVICE); 2897 2898 skb = buffer_info->skb; 2899 length = le16_to_cpu(rx_desc->length); 2900 2901 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) { 2902 /* All receives must fit into a single buffer */ 2903 E1000_DBG("%s: Receive packet consumed multiple" 2904 " buffers\n", netdev->name); 2905 dev_kfree_skb_irq(skb); 2906 goto next_desc; 2907 } 2908 2909 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { 2910 last_byte = *(skb->data + length - 1); 2911 if(TBI_ACCEPT(&adapter->hw, rx_desc->status, 2912 rx_desc->errors, length, last_byte)) { 2913 spin_lock_irqsave(&adapter->stats_lock, flags); 2914 e1000_tbi_adjust_stats(&adapter->hw, 2915 &adapter->stats, 2916 length, skb->data); 2917 spin_unlock_irqrestore(&adapter->stats_lock, 2918 flags); 2919 length--; 2920 } else { 2921 dev_kfree_skb_irq(skb); 2922 goto next_desc; 2923 } 2924 } 2925 2926 /* Good Receive */ 2927 skb_put(skb, length - ETHERNET_FCS_SIZE); 2928 2929 /* Receive Checksum Offload */ 2930 e1000_rx_checksum(adapter, 2931 (uint32_t)(rx_desc->status) | 2932 ((uint32_t)(rx_desc->errors) << 24), 2933 rx_desc->csum, skb); 2934 skb->protocol = eth_type_trans(skb, netdev); 2935#ifdef CONFIG_E1000_NAPI 2936 if(unlikely(adapter->vlgrp && 2937 (rx_desc->status & E1000_RXD_STAT_VP))) { 2938 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, 2939 le16_to_cpu(rx_desc->special) & 2940 E1000_RXD_SPC_VLAN_MASK); 2941 } else { 2942 netif_receive_skb(skb); 2943 } 2944#else /* CONFIG_E1000_NAPI */ 2945 if(unlikely(adapter->vlgrp && 2946 (rx_desc->status & E1000_RXD_STAT_VP))) { 2947 vlan_hwaccel_rx(skb, adapter->vlgrp, 2948 le16_to_cpu(rx_desc->special) & 2949 E1000_RXD_SPC_VLAN_MASK); 2950 } else { 2951 netif_rx(skb); 2952 } 2953#endif /* CONFIG_E1000_NAPI */ 2954 netdev->last_rx = jiffies; 2955 2956next_desc: 2957 rx_desc->status = 0; 2958 buffer_info->skb = NULL; 2959 if(unlikely(++i == rx_ring->count)) i = 0; 2960 2961 rx_desc = E1000_RX_DESC(*rx_ring, i); 2962 } 2963 rx_ring->next_to_clean = i; 2964 adapter->alloc_rx_buf(adapter); 2965 2966 return cleaned; 2967} 2968 2969/** 2970 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 2971 * @adapter: board private structure 2972 **/ 2973 2974static boolean_t 2975#ifdef CONFIG_E1000_NAPI 2976e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, int *work_done, 2977 int work_to_do) 2978#else 2979e1000_clean_rx_irq_ps(struct e1000_adapter *adapter) 2980#endif 2981{ 2982 struct e1000_desc_ring *rx_ring = &adapter->rx_ring; 2983 union e1000_rx_desc_packet_split *rx_desc; 2984 struct net_device *netdev = adapter->netdev; 2985 struct pci_dev *pdev = adapter->pdev; 2986 struct e1000_buffer *buffer_info; 2987 struct e1000_ps_page *ps_page; 2988 struct e1000_ps_page_dma *ps_page_dma; 2989 struct sk_buff *skb; 2990 unsigned int i, j; 2991 uint32_t length, staterr; 2992 boolean_t cleaned = FALSE; 2993 2994 i = rx_ring->next_to_clean; 2995 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 2996 staterr = rx_desc->wb.middle.status_error; 2997 2998 while(staterr & E1000_RXD_STAT_DD) { 2999 buffer_info = &rx_ring->buffer_info[i]; 3000 ps_page = &rx_ring->ps_page[i]; 3001 ps_page_dma = &rx_ring->ps_page_dma[i]; 3002#ifdef CONFIG_E1000_NAPI 3003 if(unlikely(*work_done >= work_to_do)) 3004 break; 3005 (*work_done)++; 3006#endif 3007 cleaned = TRUE; 3008 pci_unmap_single(pdev, buffer_info->dma, 3009 buffer_info->length, 3010 PCI_DMA_FROMDEVICE); 3011 3012 skb = buffer_info->skb; 3013 3014 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) { 3015 E1000_DBG("%s: Packet Split buffers didn't pick up" 3016 " the full packet\n", netdev->name); 3017 dev_kfree_skb_irq(skb); 3018 goto next_desc; 3019 } 3020 3021 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { 3022 dev_kfree_skb_irq(skb); 3023 goto next_desc; 3024 } 3025 3026 length = le16_to_cpu(rx_desc->wb.middle.length0); 3027 3028 if(unlikely(!length)) { 3029 E1000_DBG("%s: Last part of the packet spanning" 3030 " multiple descriptors\n", netdev->name); 3031 dev_kfree_skb_irq(skb); 3032 goto next_desc; 3033 } 3034 3035 /* Good Receive */ 3036 skb_put(skb, length); 3037 3038 for(j = 0; j < PS_PAGE_BUFFERS; j++) { 3039 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j]))) 3040 break; 3041 3042 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], 3043 PAGE_SIZE, PCI_DMA_FROMDEVICE); 3044 ps_page_dma->ps_page_dma[j] = 0; 3045 skb_shinfo(skb)->frags[j].page = 3046 ps_page->ps_page[j]; 3047 ps_page->ps_page[j] = NULL; 3048 skb_shinfo(skb)->frags[j].page_offset = 0; 3049 skb_shinfo(skb)->frags[j].size = length; 3050 skb_shinfo(skb)->nr_frags++; 3051 skb->len += length; 3052 skb->data_len += length; 3053 } 3054 3055 e1000_rx_checksum(adapter, staterr, 3056 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 3057 skb->protocol = eth_type_trans(skb, netdev); 3058 3059#ifdef HAVE_RX_ZERO_COPY 3060 if(likely(rx_desc->wb.upper.header_status & 3061 E1000_RXDPS_HDRSTAT_HDRSP)) 3062 skb_shinfo(skb)->zero_copy = TRUE; 3063#endif 3064#ifdef CONFIG_E1000_NAPI 3065 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { 3066 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, 3067 le16_to_cpu(rx_desc->wb.middle.vlan & 3068 E1000_RXD_SPC_VLAN_MASK)); 3069 } else { 3070 netif_receive_skb(skb); 3071 } 3072#else /* CONFIG_E1000_NAPI */ 3073 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { 3074 vlan_hwaccel_rx(skb, adapter->vlgrp, 3075 le16_to_cpu(rx_desc->wb.middle.vlan & 3076 E1000_RXD_SPC_VLAN_MASK)); 3077 } else { 3078 netif_rx(skb); 3079 } 3080#endif /* CONFIG_E1000_NAPI */ 3081 netdev->last_rx = jiffies; 3082 3083next_desc: 3084 rx_desc->wb.middle.status_error &= ~0xFF; 3085 buffer_info->skb = NULL; 3086 if(unlikely(++i == rx_ring->count)) i = 0; 3087 3088 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 3089 staterr = rx_desc->wb.middle.status_error; 3090 } 3091 rx_ring->next_to_clean = i; 3092 adapter->alloc_rx_buf(adapter); 3093 3094 return cleaned; 3095} 3096 3097/** 3098 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended 3099 * @adapter: address of board private structure 3100 **/ 3101 3102static void 3103e1000_alloc_rx_buffers(struct e1000_adapter *adapter) 3104{ 3105 struct e1000_desc_ring *rx_ring = &adapter->rx_ring; 3106 struct net_device *netdev = adapter->netdev; 3107 struct pci_dev *pdev = adapter->pdev; 3108 struct e1000_rx_desc *rx_desc; 3109 struct e1000_buffer *buffer_info; 3110 struct sk_buff *skb; 3111 unsigned int i; 3112 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; 3113 3114 i = rx_ring->next_to_use; 3115 buffer_info = &rx_ring->buffer_info[i]; 3116 3117 while(!buffer_info->skb) { 3118 skb = dev_alloc_skb(bufsz); 3119 3120 if(unlikely(!skb)) { 3121 /* Better luck next round */ 3122 break; 3123 } 3124 3125 /* Fix for errata 23, can't cross 64kB boundary */ 3126 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { 3127 struct sk_buff *oldskb = skb; 3128 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " 3129 "at %p\n", bufsz, skb->data); 3130 /* Try again, without freeing the previous */ 3131 skb = dev_alloc_skb(bufsz); 3132 /* Failed allocation, critical failure */ 3133 if (!skb) { 3134 dev_kfree_skb(oldskb); 3135 break; 3136 } 3137 3138 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { 3139 /* give up */ 3140 dev_kfree_skb(skb); 3141 dev_kfree_skb(oldskb); 3142 break; /* while !buffer_info->skb */ 3143 } else { 3144 /* Use new allocation */ 3145 dev_kfree_skb(oldskb); 3146 } 3147 } 3148 /* Make buffer alignment 2 beyond a 16 byte boundary 3149 * this will result in a 16 byte aligned IP header after 3150 * the 14 byte MAC header is removed 3151 */ 3152 skb_reserve(skb, NET_IP_ALIGN); 3153 3154 skb->dev = netdev; 3155 3156 buffer_info->skb = skb; 3157 buffer_info->length = adapter->rx_buffer_len; 3158 buffer_info->dma = pci_map_single(pdev, 3159 skb->data, 3160 adapter->rx_buffer_len, 3161 PCI_DMA_FROMDEVICE); 3162 3163 /* Fix for errata 23, can't cross 64kB boundary */ 3164 if (!e1000_check_64k_bound(adapter, 3165 (void *)(unsigned long)buffer_info->dma, 3166 adapter->rx_buffer_len)) { 3167 DPRINTK(RX_ERR, ERR, 3168 "dma align check failed: %u bytes at %p\n", 3169 adapter->rx_buffer_len, 3170 (void *)(unsigned long)buffer_info->dma); 3171 dev_kfree_skb(skb); 3172 buffer_info->skb = NULL; 3173 3174 pci_unmap_single(pdev, buffer_info->dma, 3175 adapter->rx_buffer_len, 3176 PCI_DMA_FROMDEVICE); 3177 3178 break; /* while !buffer_info->skb */ 3179 } 3180 rx_desc = E1000_RX_DESC(*rx_ring, i); 3181 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 3182 3183 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) { 3184 /* Force memory writes to complete before letting h/w 3185 * know there are new descriptors to fetch. (Only 3186 * applicable for weak-ordered memory model archs, 3187 * such as IA-64). */ 3188 wmb(); 3189 E1000_WRITE_REG(&adapter->hw, RDT, i); 3190 } 3191 3192 if(unlikely(++i == rx_ring->count)) i = 0; 3193 buffer_info = &rx_ring->buffer_info[i]; 3194 } 3195 3196 rx_ring->next_to_use = i; 3197} 3198 3199/** 3200 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 3201 * @adapter: address of board private structure 3202 **/ 3203 3204static void 3205e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter) 3206{ 3207 struct e1000_desc_ring *rx_ring = &adapter->rx_ring; 3208 struct net_device *netdev = adapter->netdev; 3209 struct pci_dev *pdev = adapter->pdev; 3210 union e1000_rx_desc_packet_split *rx_desc; 3211 struct e1000_buffer *buffer_info; 3212 struct e1000_ps_page *ps_page; 3213 struct e1000_ps_page_dma *ps_page_dma; 3214 struct sk_buff *skb; 3215 unsigned int i, j; 3216 3217 i = rx_ring->next_to_use; 3218 buffer_info = &rx_ring->buffer_info[i]; 3219 ps_page = &rx_ring->ps_page[i]; 3220 ps_page_dma = &rx_ring->ps_page_dma[i]; 3221 3222 while(!buffer_info->skb) { 3223 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 3224 3225 for(j = 0; j < PS_PAGE_BUFFERS; j++) { 3226 if(unlikely(!ps_page->ps_page[j])) { 3227 ps_page->ps_page[j] = 3228 alloc_page(GFP_ATOMIC); 3229 if(unlikely(!ps_page->ps_page[j])) 3230 goto no_buffers; 3231 ps_page_dma->ps_page_dma[j] = 3232 pci_map_page(pdev, 3233 ps_page->ps_page[j], 3234 0, PAGE_SIZE, 3235 PCI_DMA_FROMDEVICE); 3236 } 3237 /* Refresh the desc even if buffer_addrs didn't 3238 * change because each write-back erases this info. 3239 */ 3240 rx_desc->read.buffer_addr[j+1] = 3241 cpu_to_le64(ps_page_dma->ps_page_dma[j]); 3242 } 3243 3244 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN); 3245 3246 if(unlikely(!skb)) 3247 break; 3248 3249 /* Make buffer alignment 2 beyond a 16 byte boundary 3250 * this will result in a 16 byte aligned IP header after 3251 * the 14 byte MAC header is removed 3252 */ 3253 skb_reserve(skb, NET_IP_ALIGN); 3254 3255 skb->dev = netdev; 3256 3257 buffer_info->skb = skb; 3258 buffer_info->length = adapter->rx_ps_bsize0; 3259 buffer_info->dma = pci_map_single(pdev, skb->data, 3260 adapter->rx_ps_bsize0, 3261 PCI_DMA_FROMDEVICE); 3262 3263 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 3264 3265 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) { 3266 /* Force memory writes to complete before letting h/w 3267 * know there are new descriptors to fetch. (Only 3268 * applicable for weak-ordered memory model archs, 3269 * such as IA-64). */ 3270 wmb(); 3271 /* Hardware increments by 16 bytes, but packet split 3272 * descriptors are 32 bytes...so we increment tail 3273 * twice as much. 3274 */ 3275 E1000_WRITE_REG(&adapter->hw, RDT, i<<1); 3276 } 3277 3278 if(unlikely(++i == rx_ring->count)) i = 0; 3279 buffer_info = &rx_ring->buffer_info[i]; 3280 ps_page = &rx_ring->ps_page[i]; 3281 ps_page_dma = &rx_ring->ps_page_dma[i]; 3282 } 3283 3284no_buffers: 3285 rx_ring->next_to_use = i; 3286} 3287 3288/** 3289 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. 3290 * @adapter: 3291 **/ 3292 3293static void 3294e1000_smartspeed(struct e1000_adapter *adapter) 3295{ 3296 uint16_t phy_status; 3297 uint16_t phy_ctrl; 3298 3299 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || 3300 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) 3301 return; 3302 3303 if(adapter->smartspeed == 0) { 3304 /* If Master/Slave config fault is asserted twice, 3305 * we assume back-to-back */ 3306 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); 3307 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; 3308 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); 3309 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; 3310 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); 3311 if(phy_ctrl & CR_1000T_MS_ENABLE) { 3312 phy_ctrl &= ~CR_1000T_MS_ENABLE; 3313 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, 3314 phy_ctrl); 3315 adapter->smartspeed++; 3316 if(!e1000_phy_setup_autoneg(&adapter->hw) && 3317 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, 3318 &phy_ctrl)) { 3319 phy_ctrl |= (MII_CR_AUTO_NEG_EN | 3320 MII_CR_RESTART_AUTO_NEG); 3321 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 3322 phy_ctrl); 3323 } 3324 } 3325 return; 3326 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { 3327 /* If still no link, perhaps using 2/3 pair cable */ 3328 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); 3329 phy_ctrl |= CR_1000T_MS_ENABLE; 3330 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); 3331 if(!e1000_phy_setup_autoneg(&adapter->hw) && 3332 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { 3333 phy_ctrl |= (MII_CR_AUTO_NEG_EN | 3334 MII_CR_RESTART_AUTO_NEG); 3335 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); 3336 } 3337 } 3338 /* Restart process after E1000_SMARTSPEED_MAX iterations */ 3339 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX) 3340 adapter->smartspeed = 0; 3341} 3342 3343/** 3344 * e1000_ioctl - 3345 * @netdev: 3346 * @ifreq: 3347 * @cmd: 3348 **/ 3349 3350static int 3351e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 3352{ 3353 switch (cmd) { 3354 case SIOCGMIIPHY: 3355 case SIOCGMIIREG: 3356 case SIOCSMIIREG: 3357 return e1000_mii_ioctl(netdev, ifr, cmd); 3358 default: 3359 return -EOPNOTSUPP; 3360 } 3361} 3362 3363/** 3364 * e1000_mii_ioctl - 3365 * @netdev: 3366 * @ifreq: 3367 * @cmd: 3368 **/ 3369 3370static int 3371e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 3372{ 3373 struct e1000_adapter *adapter = netdev->priv; 3374 struct mii_ioctl_data *data = if_mii(ifr); 3375 int retval; 3376 uint16_t mii_reg; 3377 uint16_t spddplx; 3378 3379 if(adapter->hw.media_type != e1000_media_type_copper) 3380 return -EOPNOTSUPP; 3381 3382 switch (cmd) { 3383 case SIOCGMIIPHY: 3384 data->phy_id = adapter->hw.phy_addr; 3385 break; 3386 case SIOCGMIIREG: 3387 if (!capable(CAP_NET_ADMIN)) 3388 return -EPERM; 3389 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 3390 &data->val_out)) 3391 return -EIO; 3392 break; 3393 case SIOCSMIIREG: 3394 if (!capable(CAP_NET_ADMIN)) 3395 return -EPERM; 3396 if (data->reg_num & ~(0x1F)) 3397 return -EFAULT; 3398 mii_reg = data->val_in; 3399 if (e1000_write_phy_reg(&adapter->hw, data->reg_num, 3400 mii_reg)) 3401 return -EIO; 3402 if (adapter->hw.phy_type == e1000_phy_m88) { 3403 switch (data->reg_num) { 3404 case PHY_CTRL: 3405 if(mii_reg & MII_CR_POWER_DOWN) 3406 break; 3407 if(mii_reg & MII_CR_AUTO_NEG_EN) { 3408 adapter->hw.autoneg = 1; 3409 adapter->hw.autoneg_advertised = 0x2F; 3410 } else { 3411 if (mii_reg & 0x40) 3412 spddplx = SPEED_1000; 3413 else if (mii_reg & 0x2000) 3414 spddplx = SPEED_100; 3415 else 3416 spddplx = SPEED_10; 3417 spddplx += (mii_reg & 0x100) 3418 ? FULL_DUPLEX : 3419 HALF_DUPLEX; 3420 retval = e1000_set_spd_dplx(adapter, 3421 spddplx); 3422 if(retval) 3423 return retval; 3424 } 3425 if(netif_running(adapter->netdev)) { 3426 e1000_down(adapter); 3427 e1000_up(adapter); 3428 } else 3429 e1000_reset(adapter); 3430 break; 3431 case M88E1000_PHY_SPEC_CTRL: 3432 case M88E1000_EXT_PHY_SPEC_CTRL: 3433 if (e1000_phy_reset(&adapter->hw)) 3434 return -EIO; 3435 break; 3436 } 3437 } else { 3438 switch (data->reg_num) { 3439 case PHY_CTRL: 3440 if(mii_reg & MII_CR_POWER_DOWN) 3441 break; 3442 if(netif_running(adapter->netdev)) { 3443 e1000_down(adapter); 3444 e1000_up(adapter); 3445 } else 3446 e1000_reset(adapter); 3447 break; 3448 } 3449 } 3450 break; 3451 default: 3452 return -EOPNOTSUPP; 3453 } 3454 return E1000_SUCCESS; 3455} 3456 3457void 3458e1000_pci_set_mwi(struct e1000_hw *hw) 3459{ 3460 struct e1000_adapter *adapter = hw->back; 3461 int ret_val = pci_set_mwi(adapter->pdev); 3462 3463 if(ret_val) 3464 DPRINTK(PROBE, ERR, "Error in setting MWI\n"); 3465} 3466 3467void 3468e1000_pci_clear_mwi(struct e1000_hw *hw) 3469{ 3470 struct e1000_adapter *adapter = hw->back; 3471 3472 pci_clear_mwi(adapter->pdev); 3473} 3474 3475void 3476e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) 3477{ 3478 struct e1000_adapter *adapter = hw->back; 3479 3480 pci_read_config_word(adapter->pdev, reg, value); 3481} 3482 3483void 3484e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) 3485{ 3486 struct e1000_adapter *adapter = hw->back; 3487 3488 pci_write_config_word(adapter->pdev, reg, *value); 3489} 3490 3491uint32_t 3492e1000_io_read(struct e1000_hw *hw, unsigned long port) 3493{ 3494 return inl(port); 3495} 3496 3497void 3498e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) 3499{ 3500 outl(value, port); 3501} 3502 3503static void 3504e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 3505{ 3506 struct e1000_adapter *adapter = netdev->priv; 3507 uint32_t ctrl, rctl; 3508 3509 e1000_irq_disable(adapter); 3510 adapter->vlgrp = grp; 3511 3512 if(grp) { 3513 /* enable VLAN tag insert/strip */ 3514 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 3515 ctrl |= E1000_CTRL_VME; 3516 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 3517 3518 /* enable VLAN receive filtering */ 3519 rctl = E1000_READ_REG(&adapter->hw, RCTL); 3520 rctl |= E1000_RCTL_VFE; 3521 rctl &= ~E1000_RCTL_CFIEN; 3522 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 3523 e1000_update_mng_vlan(adapter); 3524 } else { 3525 /* disable VLAN tag insert/strip */ 3526 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 3527 ctrl &= ~E1000_CTRL_VME; 3528 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 3529 3530 /* disable VLAN filtering */ 3531 rctl = E1000_READ_REG(&adapter->hw, RCTL); 3532 rctl &= ~E1000_RCTL_VFE; 3533 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 3534 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) { 3535 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3536 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3537 } 3538 } 3539 3540 e1000_irq_enable(adapter); 3541} 3542 3543static void 3544e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) 3545{ 3546 struct e1000_adapter *adapter = netdev->priv; 3547 uint32_t vfta, index; 3548 if((adapter->hw.mng_cookie.status & 3549 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && 3550 (vid == adapter->mng_vlan_id)) 3551 return; 3552 /* add VID to filter table */ 3553 index = (vid >> 5) & 0x7F; 3554 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); 3555 vfta |= (1 << (vid & 0x1F)); 3556 e1000_write_vfta(&adapter->hw, index, vfta); 3557} 3558 3559static void 3560e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) 3561{ 3562 struct e1000_adapter *adapter = netdev->priv; 3563 uint32_t vfta, index; 3564 3565 e1000_irq_disable(adapter); 3566 3567 if(adapter->vlgrp) 3568 adapter->vlgrp->vlan_devices[vid] = NULL; 3569 3570 e1000_irq_enable(adapter); 3571 3572 if((adapter->hw.mng_cookie.status & 3573 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && 3574 (vid == adapter->mng_vlan_id)) 3575 return; 3576 /* remove VID from filter table */ 3577 index = (vid >> 5) & 0x7F; 3578 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); 3579 vfta &= ~(1 << (vid & 0x1F)); 3580 e1000_write_vfta(&adapter->hw, index, vfta); 3581} 3582 3583static void 3584e1000_restore_vlan(struct e1000_adapter *adapter) 3585{ 3586 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); 3587 3588 if(adapter->vlgrp) { 3589 uint16_t vid; 3590 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { 3591 if(!adapter->vlgrp->vlan_devices[vid]) 3592 continue; 3593 e1000_vlan_rx_add_vid(adapter->netdev, vid); 3594 } 3595 } 3596} 3597 3598int 3599e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) 3600{ 3601 adapter->hw.autoneg = 0; 3602 3603 switch(spddplx) { 3604 case SPEED_10 + DUPLEX_HALF: 3605 adapter->hw.forced_speed_duplex = e1000_10_half; 3606 break; 3607 case SPEED_10 + DUPLEX_FULL: 3608 adapter->hw.forced_speed_duplex = e1000_10_full; 3609 break; 3610 case SPEED_100 + DUPLEX_HALF: 3611 adapter->hw.forced_speed_duplex = e1000_100_half; 3612 break; 3613 case SPEED_100 + DUPLEX_FULL: 3614 adapter->hw.forced_speed_duplex = e1000_100_full; 3615 break; 3616 case SPEED_1000 + DUPLEX_FULL: 3617 adapter->hw.autoneg = 1; 3618 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; 3619 break; 3620 case SPEED_1000 + DUPLEX_HALF: /* not supported */ 3621 default: 3622 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); 3623 return -EINVAL; 3624 } 3625 return 0; 3626} 3627 3628static int 3629e1000_notify_reboot(struct notifier_block *nb, unsigned long event, void *p) 3630{ 3631 struct pci_dev *pdev = NULL; 3632 3633 switch(event) { 3634 case SYS_DOWN: 3635 case SYS_HALT: 3636 case SYS_POWER_OFF: 3637 while((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) { 3638 if(pci_dev_driver(pdev) == &e1000_driver) 3639 e1000_suspend(pdev, 3); 3640 } 3641 } 3642 return NOTIFY_DONE; 3643} 3644 3645static int 3646e1000_suspend(struct pci_dev *pdev, uint32_t state) 3647{ 3648 struct net_device *netdev = pci_get_drvdata(pdev); 3649 struct e1000_adapter *adapter = netdev->priv; 3650 uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm; 3651 uint32_t wufc = adapter->wol; 3652 3653 netif_device_detach(netdev); 3654 3655 if(netif_running(netdev)) 3656 e1000_down(adapter); 3657 3658 status = E1000_READ_REG(&adapter->hw, STATUS); 3659 if(status & E1000_STATUS_LU) 3660 wufc &= ~E1000_WUFC_LNKC; 3661 3662 if(wufc) { 3663 e1000_setup_rctl(adapter); 3664 e1000_set_multi(netdev); 3665 3666 /* turn on all-multi mode if wake on multicast is enabled */ 3667 if(adapter->wol & E1000_WUFC_MC) { 3668 rctl = E1000_READ_REG(&adapter->hw, RCTL); 3669 rctl |= E1000_RCTL_MPE; 3670 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 3671 } 3672 3673 if(adapter->hw.mac_type >= e1000_82540) { 3674 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 3675 /* advertise wake from D3Cold */ 3676 #define E1000_CTRL_ADVD3WUC 0x00100000 3677 /* phy power management enable */ 3678 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 3679 ctrl |= E1000_CTRL_ADVD3WUC | 3680 E1000_CTRL_EN_PHY_PWR_MGMT; 3681 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 3682 } 3683 3684 if(adapter->hw.media_type == e1000_media_type_fiber || 3685 adapter->hw.media_type == e1000_media_type_internal_serdes) { 3686 /* keep the laser running in D3 */ 3687 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); 3688 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; 3689 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); 3690 } 3691 3692 /* Allow time for pending master requests to run */ 3693 e1000_disable_pciex_master(&adapter->hw); 3694 3695 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); 3696 E1000_WRITE_REG(&adapter->hw, WUFC, wufc); 3697 pci_enable_wake(pdev, 3, 1); 3698 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */ 3699 } else { 3700 E1000_WRITE_REG(&adapter->hw, WUC, 0); 3701 E1000_WRITE_REG(&adapter->hw, WUFC, 0); 3702 pci_enable_wake(pdev, 3, 0); 3703 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ 3704 } 3705 3706 pci_save_state(pdev); 3707 3708 if(adapter->hw.mac_type >= e1000_82540 && 3709 adapter->hw.media_type == e1000_media_type_copper) { 3710 manc = E1000_READ_REG(&adapter->hw, MANC); 3711 if(manc & E1000_MANC_SMBUS_EN) { 3712 manc |= E1000_MANC_ARP_EN; 3713 E1000_WRITE_REG(&adapter->hw, MANC, manc); 3714 pci_enable_wake(pdev, 3, 1); 3715 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */ 3716 } 3717 } 3718 3719 switch(adapter->hw.mac_type) { 3720 case e1000_82573: 3721 swsm = E1000_READ_REG(&adapter->hw, SWSM); 3722 E1000_WRITE_REG(&adapter->hw, SWSM, 3723 swsm & ~E1000_SWSM_DRV_LOAD); 3724 break; 3725 default: 3726 break; 3727 } 3728 3729 pci_disable_device(pdev); 3730 3731 state = (state > 0) ? 3 : 0; 3732 pci_set_power_state(pdev, state); 3733 3734 return 0; 3735} 3736 3737#ifdef CONFIG_PM 3738static int 3739e1000_resume(struct pci_dev *pdev) 3740{ 3741 struct net_device *netdev = pci_get_drvdata(pdev); 3742 struct e1000_adapter *adapter = netdev->priv; 3743 uint32_t manc, ret, swsm; 3744 3745 pci_set_power_state(pdev, 0); 3746 pci_restore_state(pdev); 3747 ret = pci_enable_device(pdev); 3748 pci_set_master(pdev); 3749 3750 pci_enable_wake(pdev, 3, 0); 3751 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ 3752 3753 e1000_reset(adapter); 3754 E1000_WRITE_REG(&adapter->hw, WUS, ~0); 3755 3756 if(netif_running(netdev)) 3757 e1000_up(adapter); 3758 3759 netif_device_attach(netdev); 3760 3761 if(adapter->hw.mac_type >= e1000_82540 && 3762 adapter->hw.media_type == e1000_media_type_copper) { 3763 manc = E1000_READ_REG(&adapter->hw, MANC); 3764 manc &= ~(E1000_MANC_ARP_EN); 3765 E1000_WRITE_REG(&adapter->hw, MANC, manc); 3766 } 3767 3768 switch(adapter->hw.mac_type) { 3769 case e1000_82573: 3770 swsm = E1000_READ_REG(&adapter->hw, SWSM); 3771 E1000_WRITE_REG(&adapter->hw, SWSM, 3772 swsm | E1000_SWSM_DRV_LOAD); 3773 break; 3774 default: 3775 break; 3776 } 3777 3778 return 0; 3779} 3780#endif 3781#ifdef CONFIG_NET_POLL_CONTROLLER 3782/* 3783 * Polling 'interrupt' - used by things like netconsole to send skbs 3784 * without having to re-enable interrupts. It's not called while 3785 * the interrupt routine is executing. 3786 */ 3787static void 3788e1000_netpoll(struct net_device *netdev) 3789{ 3790 struct e1000_adapter *adapter = netdev->priv; 3791 disable_irq(adapter->pdev->irq); 3792 e1000_intr(adapter->pdev->irq, netdev, NULL); 3793 enable_irq(adapter->pdev->irq); 3794} 3795#endif 3796 3797/* e1000_main.c */