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1#ifndef __PPC_ELF_H
2#define __PPC_ELF_H
3
4/*
5 * ELF register definitions..
6 */
7#include <asm/types.h>
8#include <asm/ptrace.h>
9#include <asm/cputable.h>
10
11/* PowerPC relocations defined by the ABIs */
12#define R_PPC_NONE 0
13#define R_PPC_ADDR32 1 /* 32bit absolute address */
14#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
15#define R_PPC_ADDR16 3 /* 16bit absolute address */
16#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
17#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
18#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
19#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
20#define R_PPC_ADDR14_BRTAKEN 8
21#define R_PPC_ADDR14_BRNTAKEN 9
22#define R_PPC_REL24 10 /* PC relative 26 bit */
23#define R_PPC_REL14 11 /* PC relative 16 bit */
24#define R_PPC_REL14_BRTAKEN 12
25#define R_PPC_REL14_BRNTAKEN 13
26#define R_PPC_GOT16 14
27#define R_PPC_GOT16_LO 15
28#define R_PPC_GOT16_HI 16
29#define R_PPC_GOT16_HA 17
30#define R_PPC_PLTREL24 18
31#define R_PPC_COPY 19
32#define R_PPC_GLOB_DAT 20
33#define R_PPC_JMP_SLOT 21
34#define R_PPC_RELATIVE 22
35#define R_PPC_LOCAL24PC 23
36#define R_PPC_UADDR32 24
37#define R_PPC_UADDR16 25
38#define R_PPC_REL32 26
39#define R_PPC_PLT32 27
40#define R_PPC_PLTREL32 28
41#define R_PPC_PLT16_LO 29
42#define R_PPC_PLT16_HI 30
43#define R_PPC_PLT16_HA 31
44#define R_PPC_SDAREL16 32
45#define R_PPC_SECTOFF 33
46#define R_PPC_SECTOFF_LO 34
47#define R_PPC_SECTOFF_HI 35
48#define R_PPC_SECTOFF_HA 36
49/* Keep this the last entry. */
50#define R_PPC_NUM 37
51
52#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
53#define ELF_NFPREG 33 /* includes fpscr */
54#define ELF_NVRREG 33 /* includes vscr */
55#define ELF_NEVRREG 34 /* includes acc (as 2) */
56
57/*
58 * These are used to set parameters in the core dumps.
59 */
60#define ELF_ARCH EM_PPC
61#define ELF_CLASS ELFCLASS32
62#define ELF_DATA ELFDATA2MSB
63
64/* General registers */
65typedef unsigned long elf_greg_t;
66typedef elf_greg_t elf_gregset_t[ELF_NGREG];
67
68/* Floating point registers */
69typedef double elf_fpreg_t;
70typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
71
72/* Altivec registers */
73typedef __vector128 elf_vrreg_t;
74typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
75
76#ifdef __KERNEL__
77
78struct task_struct;
79
80/*
81 * This is used to ensure we don't load something for the wrong architecture.
82 */
83
84#define elf_check_arch(x) ((x)->e_machine == EM_PPC)
85
86/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
87 use of this is to invoke "./ld.so someprog" to test out a new version of
88 the loader. We need to make sure that it is out of the way of the program
89 that it will "exec", and that there is sufficient room for the brk. */
90
91#define ELF_ET_DYN_BASE (0x08000000)
92
93#define USE_ELF_CORE_DUMP
94#define ELF_EXEC_PAGESIZE 4096
95
96#define ELF_CORE_COPY_REGS(gregs, regs) \
97 memcpy((gregs), (regs), sizeof(struct pt_regs)); \
98 memset((char *)(gregs) + sizeof(struct pt_regs), 0, \
99 sizeof(elf_gregset_t) - sizeof(struct pt_regs));
100
101#define ELF_CORE_COPY_TASK_REGS(t, elfregs) \
102 ((t)->thread.regs? \
103 ({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)
104
105extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);
106#define ELF_CORE_COPY_FPREGS(t, fpu) dump_task_fpu((t), (fpu))
107
108/* This yields a mask that user programs can use to figure out what
109 instruction set this cpu supports. This could be done in userspace,
110 but it's not easy, and we've already done it here. */
111
112#define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
113
114/* This yields a string that ld.so will use to load implementation
115 specific libraries for optimization. This is more specific in
116 intent than poking at uname or /proc/cpuinfo.
117
118 For the moment, we have only optimizations for the Intel generations,
119 but that could change... */
120
121#define ELF_PLATFORM (NULL)
122
123#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
124
125/*
126 * We need to put in some extra aux table entries to tell glibc what
127 * the cache block size is, so it can use the dcbz instruction safely.
128 */
129#define AT_DCACHEBSIZE 19
130#define AT_ICACHEBSIZE 20
131#define AT_UCACHEBSIZE 21
132/* A special ignored type value for PPC, for glibc compatibility. */
133#define AT_IGNOREPPC 22
134
135extern int dcache_bsize;
136extern int icache_bsize;
137extern int ucache_bsize;
138
139/*
140 * The requirements here are:
141 * - keep the final alignment of sp (sp & 0xf)
142 * - make sure the 32-bit value at the first 16 byte aligned position of
143 * AUXV is greater than 16 for glibc compatibility.
144 * AT_IGNOREPPC is used for that.
145 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
146 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
147 */
148#define ARCH_DLINFO \
149do { \
150 /* Handle glibc compatibility. */ \
151 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
152 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
153 /* Cache size items */ \
154 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
155 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
156 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
157 } while (0)
158
159#endif /* __KERNEL__ */
160#endif