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Linux kernel mirror (for testing)
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linux
1/* system.h: FR-V CPU control definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SYSTEM_H
13#define _ASM_SYSTEM_H
14
15#include <linux/config.h> /* get configuration macros */
16#include <linux/linkage.h>
17#include <asm/atomic.h>
18
19struct thread_struct;
20
21#define prepare_to_switch() do { } while(0)
22
23/*
24 * switch_to(prev, next) should switch from task `prev' to `next'
25 * `prev' will never be the same as `next'.
26 * The `mb' is to tell GCC not to cache `current' across this call.
27 */
28extern asmlinkage
29struct task_struct *__switch_to(struct thread_struct *prev_thread,
30 struct thread_struct *next_thread,
31 struct task_struct *prev);
32
33#define switch_to(prev, next, last) \
34do { \
35 (prev)->thread.sched_lr = \
36 (unsigned long) __builtin_return_address(0); \
37 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
38 mb(); \
39} while(0)
40
41/*
42 * interrupt flag manipulation
43 */
44#define local_irq_disable() \
45do { \
46 unsigned long psr; \
47 asm volatile(" movsg psr,%0 \n" \
48 " andi %0,%2,%0 \n" \
49 " ori %0,%1,%0 \n" \
50 " movgs %0,psr \n" \
51 : "=r"(psr) \
52 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
53 : "memory"); \
54} while(0)
55
56#define local_irq_enable() \
57do { \
58 unsigned long psr; \
59 asm volatile(" movsg psr,%0 \n" \
60 " andi %0,%1,%0 \n" \
61 " movgs %0,psr \n" \
62 : "=r"(psr) \
63 : "i" (~PSR_PIL) \
64 : "memory"); \
65} while(0)
66
67#define local_save_flags(flags) \
68do { \
69 typecheck(unsigned long, flags); \
70 asm("movsg psr,%0" \
71 : "=r"(flags) \
72 : \
73 : "memory"); \
74} while(0)
75
76#define local_irq_save(flags) \
77do { \
78 unsigned long npsr; \
79 typecheck(unsigned long, flags); \
80 asm volatile(" movsg psr,%0 \n" \
81 " andi %0,%3,%1 \n" \
82 " ori %1,%2,%1 \n" \
83 " movgs %1,psr \n" \
84 : "=r"(flags), "=r"(npsr) \
85 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
86 : "memory"); \
87} while(0)
88
89#define local_irq_restore(flags) \
90do { \
91 typecheck(unsigned long, flags); \
92 asm volatile(" movgs %0,psr \n" \
93 : \
94 : "r" (flags) \
95 : "memory"); \
96} while(0)
97
98#define irqs_disabled() \
99 ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
100
101/*
102 * Force strict CPU ordering.
103 */
104#define nop() asm volatile ("nop"::)
105#define mb() asm volatile ("membar" : : :"memory")
106#define rmb() asm volatile ("membar" : : :"memory")
107#define wmb() asm volatile ("membar" : : :"memory")
108#define set_mb(var, value) do { var = value; mb(); } while (0)
109#define set_wmb(var, value) do { var = value; wmb(); } while (0)
110
111#define smp_mb() mb()
112#define smp_rmb() rmb()
113#define smp_wmb() wmb()
114
115#define read_barrier_depends() do {} while(0)
116#define smp_read_barrier_depends() read_barrier_depends()
117
118#define HARD_RESET_NOW() \
119do { \
120 cli(); \
121} while(1)
122
123extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
124extern void free_initmem(void);
125
126#define arch_align_stack(x) (x)
127
128#endif /* _ASM_SYSTEM_H */