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1/* 2 * Intel Multimedia Timer device implementation for SGI SN platforms. 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved. 9 * 10 * This driver exports an API that should be supportable by any HPET or IA-PC 11 * multimedia timer. The code below is currently specific to the SGI Altix 12 * SHub RTC, however. 13 * 14 * 11/01/01 - jbarnes - initial revision 15 * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion 16 * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE 17 * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt 18 * support via the posix timer interface 19 */ 20 21#include <linux/types.h> 22#include <linux/kernel.h> 23#include <linux/ioctl.h> 24#include <linux/module.h> 25#include <linux/init.h> 26#include <linux/errno.h> 27#include <linux/mm.h> 28#include <linux/devfs_fs_kernel.h> 29#include <linux/mmtimer.h> 30#include <linux/miscdevice.h> 31#include <linux/posix-timers.h> 32#include <linux/interrupt.h> 33 34#include <asm/uaccess.h> 35#include <asm/sn/addrs.h> 36#include <asm/sn/intr.h> 37#include <asm/sn/shub_mmr.h> 38#include <asm/sn/nodepda.h> 39#include <asm/sn/shubio.h> 40 41MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>"); 42MODULE_DESCRIPTION("SGI Altix RTC Timer"); 43MODULE_LICENSE("GPL"); 44 45/* name of the device, usually in /dev */ 46#define MMTIMER_NAME "mmtimer" 47#define MMTIMER_DESC "SGI Altix RTC Timer" 48#define MMTIMER_VERSION "2.0" 49 50#define RTC_BITS 55 /* 55 bits for this implementation */ 51 52extern unsigned long sn_rtc_cycles_per_second; 53 54#define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC)) 55 56#define rtc_time() (*RTC_COUNTER_ADDR) 57 58static int mmtimer_ioctl(struct inode *inode, struct file *file, 59 unsigned int cmd, unsigned long arg); 60static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma); 61 62/* 63 * Period in femtoseconds (10^-15 s) 64 */ 65static unsigned long mmtimer_femtoperiod = 0; 66 67static struct file_operations mmtimer_fops = { 68 .owner = THIS_MODULE, 69 .mmap = mmtimer_mmap, 70 .ioctl = mmtimer_ioctl, 71}; 72 73/* 74 * We only have comparison registers RTC1-4 currently available per 75 * node. RTC0 is used by SAL. 76 */ 77#define NUM_COMPARATORS 3 78/* Check for an RTC interrupt pending */ 79static int inline mmtimer_int_pending(int comparator) 80{ 81 if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) & 82 SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator) 83 return 1; 84 else 85 return 0; 86} 87/* Clear the RTC interrupt pending bit */ 88static void inline mmtimer_clr_int_pending(int comparator) 89{ 90 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), 91 SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator); 92} 93 94/* Setup timer on comparator RTC1 */ 95static void inline mmtimer_setup_int_0(u64 expires) 96{ 97 u64 val; 98 99 /* Disable interrupt */ 100 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL); 101 102 /* Initialize comparator value */ 103 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L); 104 105 /* Clear pending bit */ 106 mmtimer_clr_int_pending(0); 107 108 val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) | 109 ((u64)cpu_physical_id(smp_processor_id()) << 110 SH_RTC1_INT_CONFIG_PID_SHFT); 111 112 /* Set configuration */ 113 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val); 114 115 /* Enable RTC interrupts */ 116 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL); 117 118 /* Initialize comparator value */ 119 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires); 120 121 122} 123 124/* Setup timer on comparator RTC2 */ 125static void inline mmtimer_setup_int_1(u64 expires) 126{ 127 u64 val; 128 129 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL); 130 131 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L); 132 133 mmtimer_clr_int_pending(1); 134 135 val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) | 136 ((u64)cpu_physical_id(smp_processor_id()) << 137 SH_RTC2_INT_CONFIG_PID_SHFT); 138 139 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val); 140 141 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL); 142 143 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires); 144} 145 146/* Setup timer on comparator RTC3 */ 147static void inline mmtimer_setup_int_2(u64 expires) 148{ 149 u64 val; 150 151 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL); 152 153 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L); 154 155 mmtimer_clr_int_pending(2); 156 157 val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) | 158 ((u64)cpu_physical_id(smp_processor_id()) << 159 SH_RTC3_INT_CONFIG_PID_SHFT); 160 161 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val); 162 163 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL); 164 165 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires); 166} 167 168/* 169 * This function must be called with interrupts disabled and preemption off 170 * in order to insure that the setup succeeds in a deterministic time frame. 171 * It will check if the interrupt setup succeeded. 172 */ 173static int inline mmtimer_setup(int comparator, unsigned long expires) 174{ 175 176 switch (comparator) { 177 case 0: 178 mmtimer_setup_int_0(expires); 179 break; 180 case 1: 181 mmtimer_setup_int_1(expires); 182 break; 183 case 2: 184 mmtimer_setup_int_2(expires); 185 break; 186 } 187 /* We might've missed our expiration time */ 188 if (rtc_time() < expires) 189 return 1; 190 191 /* 192 * If an interrupt is already pending then its okay 193 * if not then we failed 194 */ 195 return mmtimer_int_pending(comparator); 196} 197 198static int inline mmtimer_disable_int(long nasid, int comparator) 199{ 200 switch (comparator) { 201 case 0: 202 nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 203 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL); 204 break; 205 case 1: 206 nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 207 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL); 208 break; 209 case 2: 210 nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 211 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL); 212 break; 213 default: 214 return -EFAULT; 215 } 216 return 0; 217} 218 219#define TIMER_OFF 0xbadcabLL 220 221/* There is one of these for each comparator */ 222typedef struct mmtimer { 223 spinlock_t lock ____cacheline_aligned; 224 struct k_itimer *timer; 225 int i; 226 int cpu; 227 struct tasklet_struct tasklet; 228} mmtimer_t; 229 230/* 231 * Total number of comparators is comparators/node * MAX nodes/running kernel 232 */ 233static mmtimer_t timers[NUM_COMPARATORS*MAX_COMPACT_NODES]; 234 235/** 236 * mmtimer_ioctl - ioctl interface for /dev/mmtimer 237 * @inode: inode of the device 238 * @file: file structure for the device 239 * @cmd: command to execute 240 * @arg: optional argument to command 241 * 242 * Executes the command specified by @cmd. Returns 0 for success, < 0 for 243 * failure. 244 * 245 * Valid commands: 246 * 247 * %MMTIMER_GETOFFSET - Should return the offset (relative to the start 248 * of the page where the registers are mapped) for the counter in question. 249 * 250 * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15) 251 * seconds 252 * 253 * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address 254 * specified by @arg 255 * 256 * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter 257 * 258 * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace 259 * 260 * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it 261 * in the address specified by @arg. 262 */ 263static int mmtimer_ioctl(struct inode *inode, struct file *file, 264 unsigned int cmd, unsigned long arg) 265{ 266 int ret = 0; 267 268 switch (cmd) { 269 case MMTIMER_GETOFFSET: /* offset of the counter */ 270 /* 271 * SN RTC registers are on their own 64k page 272 */ 273 if(PAGE_SIZE <= (1 << 16)) 274 ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8; 275 else 276 ret = -ENOSYS; 277 break; 278 279 case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */ 280 if(copy_to_user((unsigned long __user *)arg, 281 &mmtimer_femtoperiod, sizeof(unsigned long))) 282 return -EFAULT; 283 break; 284 285 case MMTIMER_GETFREQ: /* frequency in Hz */ 286 if(copy_to_user((unsigned long __user *)arg, 287 &sn_rtc_cycles_per_second, 288 sizeof(unsigned long))) 289 return -EFAULT; 290 ret = 0; 291 break; 292 293 case MMTIMER_GETBITS: /* number of bits in the clock */ 294 ret = RTC_BITS; 295 break; 296 297 case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */ 298 ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0; 299 break; 300 301 case MMTIMER_GETCOUNTER: 302 if(copy_to_user((unsigned long __user *)arg, 303 RTC_COUNTER_ADDR, sizeof(unsigned long))) 304 return -EFAULT; 305 break; 306 default: 307 ret = -ENOSYS; 308 break; 309 } 310 311 return ret; 312} 313 314/** 315 * mmtimer_mmap - maps the clock's registers into userspace 316 * @file: file structure for the device 317 * @vma: VMA to map the registers into 318 * 319 * Calls remap_pfn_range() to map the clock's registers into 320 * the calling process' address space. 321 */ 322static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma) 323{ 324 unsigned long mmtimer_addr; 325 326 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 327 return -EINVAL; 328 329 if (vma->vm_flags & VM_WRITE) 330 return -EPERM; 331 332 if (PAGE_SIZE > (1 << 16)) 333 return -ENOSYS; 334 335 vma->vm_flags |= (VM_IO | VM_SHM | VM_LOCKED ); 336 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 337 338 mmtimer_addr = __pa(RTC_COUNTER_ADDR); 339 mmtimer_addr &= ~(PAGE_SIZE - 1); 340 mmtimer_addr &= 0xfffffffffffffffUL; 341 342 if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT, 343 PAGE_SIZE, vma->vm_page_prot)) { 344 printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n"); 345 return -EAGAIN; 346 } 347 348 return 0; 349} 350 351static struct miscdevice mmtimer_miscdev = { 352 SGI_MMTIMER, 353 MMTIMER_NAME, 354 &mmtimer_fops 355}; 356 357static struct timespec sgi_clock_offset; 358static int sgi_clock_period; 359 360/* 361 * Posix Timer Interface 362 */ 363 364static struct timespec sgi_clock_offset; 365static int sgi_clock_period; 366 367static int sgi_clock_get(clockid_t clockid, struct timespec *tp) 368{ 369 u64 nsec; 370 371 nsec = rtc_time() * sgi_clock_period 372 + sgi_clock_offset.tv_nsec; 373 tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec) 374 + sgi_clock_offset.tv_sec; 375 return 0; 376}; 377 378static int sgi_clock_set(clockid_t clockid, struct timespec *tp) 379{ 380 381 u64 nsec; 382 u64 rem; 383 384 nsec = rtc_time() * sgi_clock_period; 385 386 sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem); 387 388 if (rem <= tp->tv_nsec) 389 sgi_clock_offset.tv_nsec = tp->tv_sec - rem; 390 else { 391 sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem; 392 sgi_clock_offset.tv_sec--; 393 } 394 return 0; 395} 396 397/* 398 * Schedule the next periodic interrupt. This function will attempt 399 * to schedule a periodic interrupt later if necessary. If the scheduling 400 * of an interrupt fails then the time to skip is lengthened 401 * exponentially in order to ensure that the next interrupt 402 * can be properly scheduled.. 403 */ 404static int inline reschedule_periodic_timer(mmtimer_t *x) 405{ 406 int n; 407 struct k_itimer *t = x->timer; 408 409 t->it.mmtimer.clock = x->i; 410 t->it_overrun--; 411 412 n = 0; 413 do { 414 415 t->it.mmtimer.expires += t->it.mmtimer.incr << n; 416 t->it_overrun += 1 << n; 417 n++; 418 if (n > 20) 419 return 1; 420 421 } while (!mmtimer_setup(x->i, t->it.mmtimer.expires)); 422 423 return 0; 424} 425 426/** 427 * mmtimer_interrupt - timer interrupt handler 428 * @irq: irq received 429 * @dev_id: device the irq came from 430 * @regs: register state upon receipt of the interrupt 431 * 432 * Called when one of the comarators matches the counter, This 433 * routine will send signals to processes that have requested 434 * them. 435 * 436 * This interrupt is run in an interrupt context 437 * by the SHUB. It is therefore safe to locally access SHub 438 * registers. 439 */ 440static irqreturn_t 441mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 442{ 443 int i; 444 mmtimer_t *base = timers + cpuid_to_cnodeid(smp_processor_id()) * 445 NUM_COMPARATORS; 446 unsigned long expires = 0; 447 int result = IRQ_NONE; 448 449 /* 450 * Do this once for each comparison register 451 */ 452 for (i = 0; i < NUM_COMPARATORS; i++) { 453 /* Make sure this doesn't get reused before tasklet_sched */ 454 spin_lock(&base[i].lock); 455 if (base[i].cpu == smp_processor_id()) { 456 if (base[i].timer) 457 expires = base[i].timer->it.mmtimer.expires; 458 /* expires test won't work with shared irqs */ 459 if ((mmtimer_int_pending(i) > 0) || 460 (expires && (expires < rtc_time()))) { 461 mmtimer_clr_int_pending(i); 462 tasklet_schedule(&base[i].tasklet); 463 result = IRQ_HANDLED; 464 } 465 } 466 spin_unlock(&base[i].lock); 467 expires = 0; 468 } 469 return result; 470} 471 472void mmtimer_tasklet(unsigned long data) { 473 mmtimer_t *x = (mmtimer_t *)data; 474 struct k_itimer *t = x->timer; 475 unsigned long flags; 476 477 if (t == NULL) 478 return; 479 480 /* Send signal and deal with periodic signals */ 481 spin_lock_irqsave(&t->it_lock, flags); 482 spin_lock(&x->lock); 483 /* If timer was deleted between interrupt and here, leave */ 484 if (t != x->timer) 485 goto out; 486 t->it_overrun = 0; 487 488 if (tasklist_lock.write_lock || posix_timer_event(t, 0) != 0) { 489 490 // printk(KERN_WARNING "mmtimer: cannot deliver signal.\n"); 491 492 t->it_overrun++; 493 } 494 if(t->it.mmtimer.incr) { 495 /* Periodic timer */ 496 if (reschedule_periodic_timer(x)) { 497 printk(KERN_WARNING "mmtimer: unable to reschedule\n"); 498 x->timer = NULL; 499 } 500 } else { 501 /* Ensure we don't false trigger in mmtimer_interrupt */ 502 t->it.mmtimer.expires = 0; 503 } 504 t->it_overrun_last = t->it_overrun; 505out: 506 spin_unlock(&x->lock); 507 spin_unlock_irqrestore(&t->it_lock, flags); 508} 509 510static int sgi_timer_create(struct k_itimer *timer) 511{ 512 /* Insure that a newly created timer is off */ 513 timer->it.mmtimer.clock = TIMER_OFF; 514 return 0; 515} 516 517/* This does not really delete a timer. It just insures 518 * that the timer is not active 519 * 520 * Assumption: it_lock is already held with irq's disabled 521 */ 522static int sgi_timer_del(struct k_itimer *timr) 523{ 524 int i = timr->it.mmtimer.clock; 525 cnodeid_t nodeid = timr->it.mmtimer.node; 526 mmtimer_t *t = timers + nodeid * NUM_COMPARATORS +i; 527 unsigned long irqflags; 528 529 if (i != TIMER_OFF) { 530 spin_lock_irqsave(&t->lock, irqflags); 531 mmtimer_disable_int(cnodeid_to_nasid(nodeid),i); 532 t->timer = NULL; 533 timr->it.mmtimer.clock = TIMER_OFF; 534 timr->it.mmtimer.expires = 0; 535 spin_unlock_irqrestore(&t->lock, irqflags); 536 } 537 return 0; 538} 539 540#define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC) 541#define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec) 542 543/* Assumption: it_lock is already held with irq's disabled */ 544static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting) 545{ 546 547 if (timr->it.mmtimer.clock == TIMER_OFF) { 548 cur_setting->it_interval.tv_nsec = 0; 549 cur_setting->it_interval.tv_sec = 0; 550 cur_setting->it_value.tv_nsec = 0; 551 cur_setting->it_value.tv_sec =0; 552 return; 553 } 554 555 ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period); 556 ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period); 557 return; 558} 559 560 561static int sgi_timer_set(struct k_itimer *timr, int flags, 562 struct itimerspec * new_setting, 563 struct itimerspec * old_setting) 564{ 565 566 int i; 567 unsigned long when, period, irqflags; 568 int err = 0; 569 cnodeid_t nodeid; 570 mmtimer_t *base; 571 572 if (old_setting) 573 sgi_timer_get(timr, old_setting); 574 575 sgi_timer_del(timr); 576 when = timespec_to_ns(new_setting->it_value); 577 period = timespec_to_ns(new_setting->it_interval); 578 579 if (when == 0) 580 /* Clear timer */ 581 return 0; 582 583 if (flags & TIMER_ABSTIME) { 584 struct timespec n; 585 unsigned long now; 586 587 getnstimeofday(&n); 588 now = timespec_to_ns(n); 589 if (when > now) 590 when -= now; 591 else 592 /* Fire the timer immediately */ 593 when = 0; 594 } 595 596 /* 597 * Convert to sgi clock period. Need to keep rtc_time() as near as possible 598 * to getnstimeofday() in order to be as faithful as possible to the time 599 * specified. 600 */ 601 when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time(); 602 period = (period + sgi_clock_period - 1) / sgi_clock_period; 603 604 /* 605 * We are allocating a local SHub comparator. If we would be moved to another 606 * cpu then another SHub may be local to us. Prohibit that by switching off 607 * preemption. 608 */ 609 preempt_disable(); 610 611 nodeid = cpuid_to_cnodeid(smp_processor_id()); 612 base = timers + nodeid * NUM_COMPARATORS; 613retry: 614 /* Don't use an allocated timer, or a deleted one that's pending */ 615 for(i = 0; i< NUM_COMPARATORS; i++) { 616 if (!base[i].timer && !base[i].tasklet.state) { 617 break; 618 } 619 } 620 621 if (i == NUM_COMPARATORS) { 622 preempt_enable(); 623 return -EBUSY; 624 } 625 626 spin_lock_irqsave(&base[i].lock, irqflags); 627 628 if (base[i].timer || base[i].tasklet.state != 0) { 629 spin_unlock_irqrestore(&base[i].lock, irqflags); 630 goto retry; 631 } 632 base[i].timer = timr; 633 base[i].cpu = smp_processor_id(); 634 635 timr->it.mmtimer.clock = i; 636 timr->it.mmtimer.node = nodeid; 637 timr->it.mmtimer.incr = period; 638 timr->it.mmtimer.expires = when; 639 640 if (period == 0) { 641 if (!mmtimer_setup(i, when)) { 642 mmtimer_disable_int(-1, i); 643 posix_timer_event(timr, 0); 644 timr->it.mmtimer.expires = 0; 645 } 646 } else { 647 timr->it.mmtimer.expires -= period; 648 if (reschedule_periodic_timer(base+i)) 649 err = -EINVAL; 650 } 651 652 spin_unlock_irqrestore(&base[i].lock, irqflags); 653 654 preempt_enable(); 655 656 return err; 657} 658 659static struct k_clock sgi_clock = { 660 .res = 0, 661 .clock_set = sgi_clock_set, 662 .clock_get = sgi_clock_get, 663 .timer_create = sgi_timer_create, 664 .nsleep = do_posix_clock_nonanosleep, 665 .timer_set = sgi_timer_set, 666 .timer_del = sgi_timer_del, 667 .timer_get = sgi_timer_get 668}; 669 670/** 671 * mmtimer_init - device initialization routine 672 * 673 * Does initial setup for the mmtimer device. 674 */ 675static int __init mmtimer_init(void) 676{ 677 unsigned i; 678 679 if (!ia64_platform_is("sn2")) 680 return -1; 681 682 /* 683 * Sanity check the cycles/sec variable 684 */ 685 if (sn_rtc_cycles_per_second < 100000) { 686 printk(KERN_ERR "%s: unable to determine clock frequency\n", 687 MMTIMER_NAME); 688 return -1; 689 } 690 691 mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second / 692 2) / sn_rtc_cycles_per_second; 693 694 for (i=0; i< NUM_COMPARATORS*MAX_COMPACT_NODES; i++) { 695 spin_lock_init(&timers[i].lock); 696 timers[i].timer = NULL; 697 timers[i].cpu = 0; 698 timers[i].i = i % NUM_COMPARATORS; 699 tasklet_init(&timers[i].tasklet, mmtimer_tasklet, (unsigned long) (timers+i)); 700 } 701 702 if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) { 703 printk(KERN_WARNING "%s: unable to allocate interrupt.", 704 MMTIMER_NAME); 705 return -1; 706 } 707 708 strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME); 709 if (misc_register(&mmtimer_miscdev)) { 710 printk(KERN_ERR "%s: failed to register device\n", 711 MMTIMER_NAME); 712 return -1; 713 } 714 715 sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second; 716 register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock); 717 718 printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION, 719 sn_rtc_cycles_per_second/(unsigned long)1E6); 720 721 return 0; 722} 723 724module_init(mmtimer_init); 725