tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (c) 2024 MediaTek Inc.
4// Copyright (c) 2025 Collabora Ltd
5// AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
6
7#include <linux/module.h>
8#include <linux/of.h>
9#include <linux/regmap.h>
10#include <linux/spmi.h>
11
12#include <linux/regulator/driver.h>
13#include <linux/regulator/machine.h>
14#include <linux/regulator/of_regulator.h>
15
16#define MT6316_BUCK_MODE_AUTO 0
17#define MT6316_BUCK_MODE_FORCE_PWM 1
18#define MT6316_BUCK_MODE_LP 2
19
20#define MT6316_CHIP_ID 0x20b
21#define MT6316_BUCK_TOP_CON0 0x1440
22#define EN_SET_OFFSET 0x1
23#define EN_CLR_OFFSET 0x2
24
25#define MT6316_BUCK_TOP_CON1 0x1443
26
27#define MT6316_BUCK_TOP_ELR0 0x1448
28#define MT6316_BUCK_TOP_ELR2 0x144a
29#define MT6316_BUCK_TOP_ELR4 0x144c
30#define MT6316_BUCK_TOP_ELR6 0x144e
31#define MT6316_VSEL_MASK GENMASK(8, 0)
32
33#define MT6316_VBUCK1_DBG 0x14a8
34#define MT6316_VBUCK2_DBG 0x1528
35#define MT6316_VBUCK3_DBG 0x15a8
36#define MT6316_VBUCK4_DBG 0x1628
37#define MT6316_BUCK_QI BIT(0)
38
39#define MT6316_BUCK_TOP_4PHASE_TOP_ANA_CON0 0x1688
40#define MT6316_BUCK_TOP_4PHASE_TOP_ELR_0 0x1690
41
42enum mt6316_type {
43 MT6316_TYPE_2PHASE,
44 MT6316_TYPE_3PHASE,
45 MT6316_TYPE_4PHASE
46};
47
48/**
49 * struct mt6316_regulator_info - MT6316 regulators information
50 * @desc: Regulator description structure
51 * @debug_reg: Debug register for regulator status
52 * @lp_mode_reg: Low Power mode register (normal/idle)
53 * @lp_mode_mask: Low Power mode regulator mask
54 * @modeset_reg: AUTO/PWM mode register
55 * @modeset_mask: AUTO/PWM regulator mask
56 */
57struct mt6316_regulator_info {
58 struct regulator_desc desc;
59 u16 debug_reg;
60 u16 lp_mode_reg;
61 u16 lp_mode_mask;
62 u16 modeset_reg;
63 u16 modeset_mask;
64};
65
66#define MT6316_BUCK(match, vreg_id, min, max, step, vs_reg) \
67{ \
68 .desc = { \
69 .name = match, \
70 .of_match = of_match_ptr(match), \
71 .ops = &mt6316_vreg_setclr_ops, \
72 .type = REGULATOR_VOLTAGE, \
73 .owner = THIS_MODULE, \
74 .n_voltages = (max - min) / step + 1, \
75 .min_uV = min, \
76 .uV_step = step, \
77 .enable_reg = MT6316_BUCK_TOP_CON0, \
78 .enable_mask = BIT(vreg_id - 1), \
79 .vsel_reg = vs_reg, \
80 .vsel_mask = MT6316_VSEL_MASK, \
81 .of_map_mode = mt6316_map_mode, \
82 }, \
83 .lp_mode_reg = MT6316_BUCK_TOP_CON1, \
84 .lp_mode_mask = BIT(vreg_id - 1), \
85 .modeset_reg = MT6316_BUCK_TOP_4PHASE_TOP_ANA_CON0, \
86 .modeset_mask = BIT(vreg_id - 1), \
87 .debug_reg = MT6316_VBUCK##vreg_id##_DBG, \
88}
89
90/* Values in some MT6316 registers are big endian, 9 bits long... */
91static inline u16 mt6316_be9_to_cpu(u16 val)
92{
93 return ((val >> 8) & BIT(0)) | ((val & GENMASK(7, 0)) << 1);
94}
95
96static inline u16 mt6316_cpu_to_be9(u16 val)
97{
98 return ((val & BIT(0)) << 8) | (val >> 1);
99}
100
101static unsigned int mt6316_map_mode(u32 mode)
102{
103 switch (mode) {
104 case MT6316_BUCK_MODE_AUTO:
105 return REGULATOR_MODE_NORMAL;
106 case MT6316_BUCK_MODE_FORCE_PWM:
107 return REGULATOR_MODE_FAST;
108 case MT6316_BUCK_MODE_LP:
109 return REGULATOR_MODE_IDLE;
110 default:
111 return REGULATOR_MODE_INVALID;
112 }
113}
114
115static int mt6316_vreg_enable_setclr(struct regulator_dev *rdev)
116{
117 return regmap_write(rdev->regmap, rdev->desc->enable_reg + EN_SET_OFFSET,
118 rdev->desc->enable_mask);
119}
120
121static int mt6316_vreg_disable_setclr(struct regulator_dev *rdev)
122{
123 return regmap_write(rdev->regmap, rdev->desc->enable_reg + EN_CLR_OFFSET,
124 rdev->desc->enable_mask);
125}
126
127static int mt6316_regulator_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector)
128{
129 u16 val = mt6316_cpu_to_be9(selector);
130
131 return regmap_bulk_write(rdev->regmap, rdev->desc->vsel_reg, &val, sizeof(val));
132}
133
134static int mt6316_regulator_get_voltage_sel(struct regulator_dev *rdev)
135{
136 u16 val;
137 int ret;
138
139 ret = regmap_bulk_read(rdev->regmap, rdev->desc->vsel_reg, &val, sizeof(val));
140 if (ret)
141 return ret;
142
143 return mt6316_be9_to_cpu(val & rdev->desc->vsel_mask);
144}
145
146static int mt6316_regulator_get_status(struct regulator_dev *rdev)
147{
148 struct mt6316_regulator_info *info = rdev_get_drvdata(rdev);
149 u32 val;
150 int ret;
151
152 ret = regmap_read(rdev->regmap, info->debug_reg, &val);
153 if (ret)
154 return ret;
155
156 return val & MT6316_BUCK_QI ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
157}
158
159static unsigned int mt6316_regulator_get_mode(struct regulator_dev *rdev)
160{
161 struct mt6316_regulator_info *info = rdev_get_drvdata(rdev);
162 unsigned int val;
163 int ret;
164
165 ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
166 if (ret) {
167 dev_err(&rdev->dev, "Failed to get mode: %d\n", ret);
168 return ret;
169 }
170
171 if ((val & info->modeset_mask) == info->modeset_mask)
172 return REGULATOR_MODE_FAST;
173
174 ret = regmap_read(rdev->regmap, info->lp_mode_reg, &val);
175 val &= info->lp_mode_mask;
176 if (ret) {
177 dev_err(&rdev->dev, "Failed to get lp mode: %d\n", ret);
178 return ret;
179 }
180
181 return val ? REGULATOR_MODE_IDLE : REGULATOR_MODE_NORMAL;
182}
183
184static int mt6316_regulator_set_mode(struct regulator_dev *rdev,
185 unsigned int mode)
186{
187 struct mt6316_regulator_info *info = rdev_get_drvdata(rdev);
188 struct regmap *regmap = rdev->regmap;
189 int cur_mode, ret;
190
191 switch (mode) {
192 case REGULATOR_MODE_FAST:
193 ret = regmap_set_bits(regmap, info->modeset_reg, info->modeset_mask);
194 break;
195 case REGULATOR_MODE_NORMAL:
196 cur_mode = mt6316_regulator_get_mode(rdev);
197 if (cur_mode < 0) {
198 ret = cur_mode;
199 break;
200 }
201
202 if (cur_mode == REGULATOR_MODE_FAST) {
203 ret = regmap_clear_bits(regmap, info->modeset_reg, info->modeset_mask);
204 break;
205 } else if (cur_mode == REGULATOR_MODE_IDLE) {
206 ret = regmap_clear_bits(regmap, info->lp_mode_reg, info->lp_mode_mask);
207 if (ret == 0)
208 usleep_range(100, 200);
209 } else {
210 ret = 0;
211 }
212 break;
213 case REGULATOR_MODE_IDLE:
214 ret = regmap_set_bits(regmap, info->lp_mode_reg, info->lp_mode_mask);
215 break;
216 default:
217 ret = -EINVAL;
218 }
219
220 if (ret) {
221 dev_err(&rdev->dev, "Failed to set mode %u: %d\n", mode, ret);
222 return ret;
223 }
224
225 return 0;
226}
227
228static const struct regulator_ops mt6316_vreg_setclr_ops = {
229 .list_voltage = regulator_list_voltage_linear,
230 .map_voltage = regulator_map_voltage_linear,
231 .set_voltage_sel = mt6316_regulator_set_voltage_sel,
232 .get_voltage_sel = mt6316_regulator_get_voltage_sel,
233 .set_voltage_time_sel = regulator_set_voltage_time_sel,
234 .enable = mt6316_vreg_enable_setclr,
235 .disable = mt6316_vreg_disable_setclr,
236 .is_enabled = regulator_is_enabled_regmap,
237 .get_status = mt6316_regulator_get_status,
238 .set_mode = mt6316_regulator_set_mode,
239 .get_mode = mt6316_regulator_get_mode,
240};
241
242/* MT6316BP/VP - 2+2 phase buck */
243static struct mt6316_regulator_info mt6316bv_regulators[] = {
244 MT6316_BUCK("vbuck12", 1, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR0),
245 MT6316_BUCK("vbuck34", 3, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR4),
246};
247
248/* MT6316CP/HP/KP - 3+1 phase buck */
249static struct mt6316_regulator_info mt6316chk_regulators[] = {
250 MT6316_BUCK("vbuck124", 1, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR0),
251 MT6316_BUCK("vbuck3", 3, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR4),
252};
253
254/* MT6316DP/TP - 4 phase buck */
255static struct mt6316_regulator_info mt6316dt_regulators[] = {
256 MT6316_BUCK("vbuck1234", 1, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR0),
257};
258
259static const struct regmap_config mt6316_spmi_regmap_config = {
260 .reg_bits = 16,
261 .val_bits = 8,
262 .max_register = 0x1700,
263 .fast_io = true,
264};
265
266static int mt6316_regulator_probe(struct spmi_device *sdev)
267{
268 struct regulator_config config = {};
269 struct mt6316_regulator_info *info;
270 struct regulator_dev *rdev;
271 enum mt6316_type type;
272 int num_vregs, ret;
273 unsigned int i;
274 u32 chip_id;
275
276 config.regmap = devm_regmap_init_spmi_ext(sdev, &mt6316_spmi_regmap_config);
277 if (IS_ERR(config.regmap))
278 return PTR_ERR(config.regmap);
279
280 /*
281 * The first read is expected to fail: this PMIC needs to be woken up
282 * and that can be done with any activity over the SPMI bus.
283 */
284 regmap_read(config.regmap, MT6316_CHIP_ID, &chip_id);
285
286 /* The second read, instead, shall not fail! */
287 ret = regmap_read(config.regmap, MT6316_CHIP_ID, &chip_id);
288 if (ret) {
289 dev_err(&sdev->dev, "Cannot read Chip ID!\n");
290 return ret;
291 }
292 dev_dbg(&sdev->dev, "Chip ID: 0x%x\n", chip_id);
293
294 config.dev = &sdev->dev;
295
296 type = (uintptr_t)device_get_match_data(&sdev->dev);
297 switch (type) {
298 case MT6316_TYPE_2PHASE:
299 info = mt6316bv_regulators;
300 num_vregs = ARRAY_SIZE(mt6316bv_regulators);
301 break;
302 case MT6316_TYPE_3PHASE:
303 info = mt6316chk_regulators;
304 num_vregs = ARRAY_SIZE(mt6316chk_regulators);
305 break;
306 case MT6316_TYPE_4PHASE:
307 info = mt6316dt_regulators;
308 num_vregs = ARRAY_SIZE(mt6316dt_regulators);
309 break;
310 default:
311 return -EINVAL;
312 }
313
314 for (i = 0; i < num_vregs; i++) {
315 config.driver_data = &info[i];
316
317 rdev = devm_regulator_register(&sdev->dev, &info[i].desc, &config);
318 if (IS_ERR(rdev))
319 return dev_err_probe(&sdev->dev, PTR_ERR(rdev),
320 "failed to register %s\n", info[i].desc.name);
321 }
322
323 return 0;
324}
325
326static const struct of_device_id mt6316_regulator_match[] = {
327 { .compatible = "mediatek,mt6316b-regulator", .data = (void *)MT6316_TYPE_2PHASE },
328 { .compatible = "mediatek,mt6316c-regulator", .data = (void *)MT6316_TYPE_3PHASE },
329 { .compatible = "mediatek,mt6316d-regulator", .data = (void *)MT6316_TYPE_4PHASE },
330 { /* sentinel */ }
331};
332
333static struct spmi_driver mt6316_regulator_driver = {
334 .driver = {
335 .name = "mt6316-regulator",
336 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
337 .of_match_table = mt6316_regulator_match,
338 },
339 .probe = mt6316_regulator_probe,
340};
341module_spmi_driver(mt6316_regulator_driver);
342
343MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>");
344MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6316 PMIC");
345MODULE_LICENSE("GPL");